1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -amdgpu-codegenprepare-break-large-phis=0 < %s | FileCheck %s
3 %struct.wombat = type { [4 x i32], [4 x i32], [4 x i32] }
5 define amdgpu_kernel void @wobble(ptr addrspace(1) nocapture readonly %arg) #0 !dbg !4 {
7 %tmp = load i32, ptr addrspace(1) undef, align 4
8 %tmp1 = load <4 x float>, ptr addrspace(1) undef, align 16
9 %tmp2 = sext i32 %tmp to i64
10 %tmp3 = shufflevector <4 x float> undef, <4 x float> %tmp1, <2 x i32> <i32 3, i32 7>
11 %tmp4 = call float @barney() #2
12 %tmp9 = getelementptr inbounds %struct.wombat, ptr addrspace(1) %arg, i64 %tmp2, i32 2, i64 0
13 %tmp10 = load i32, ptr addrspace(1) %tmp9, align 4
14 %tmp11 = sext i32 %tmp10 to i64
15 %tmp12 = getelementptr inbounds <2 x float>, ptr addrspace(1) %arg, i64 %tmp11
16 %tmp14 = getelementptr inbounds i8, ptr addrspace(1) %arg, i64 undef
17 %tmp16 = getelementptr inbounds <4 x float>, ptr addrspace(1) %tmp14, i64 undef
18 %tmp17 = load <4 x float>, ptr addrspace(1) %tmp16, align 16
19 %tmp18 = fsub <4 x float> %tmp17, %tmp17
20 %ext = extractelement <4 x float> %tmp18, i32 1
21 %tmp19 = fadd float %ext, 0.000000e+00
22 %tmp20 = fcmp oeq float %tmp19, 0.000000e+00
23 br i1 %tmp20, label %bb21, label %bb25
26 %tmp22 = fmul <4 x float> %tmp18, %tmp18
27 %tmp23 = fadd <4 x float> %tmp22, %tmp22
28 %tmp24 = fmul <4 x float> %tmp23, %tmp23
32 %tmp26 = insertelement <4 x float> undef, float 0.000000e+00, i32 1
33 %tmp27 = insertelement <4 x float> %tmp26, float undef, i32 2
36 bb28: ; preds = %bb25, %bb21
37 %tmp29 = phi <4 x float> [ %tmp27, %bb25 ], [ %tmp24, %bb21 ]
38 store <4 x float> %tmp29, ptr addrspace(5) undef, align 16
39 %tmp30 = getelementptr inbounds %struct.wombat, ptr addrspace(1) %arg, i64 %tmp2, i32 2, i64 2
40 %tmp31 = load i32, ptr addrspace(1) %tmp30, align 4
41 %tmp32 = sext i32 %tmp31 to i64
42 %tmp33 = getelementptr inbounds <2 x float>, ptr addrspace(1) %arg, i64 %tmp32
43 %tmp35 = load i64, ptr addrspace(1) %tmp33, align 8
44 %tmp36 = load i32, ptr addrspace(1) undef, align 4
45 %tmp37 = sext i32 %tmp36 to i64
46 %tmp38 = getelementptr inbounds <4 x float>, ptr addrspace(1) null, i64 %tmp37
47 %tmp39 = load <4 x float>, ptr addrspace(1) %tmp38, align 16
48 %tmp40 = load <4 x float>, ptr addrspace(1) undef, align 16
49 %tmp41 = fsub <4 x float> zeroinitializer, %tmp40
50 %tmp42 = fsub <4 x float> %tmp39, %tmp40
51 %tmp43 = extractelement <4 x float> %tmp40, i32 1
52 %tmp44 = fsub float %tmp43, undef
53 %tmp45 = fadd float undef, undef
54 %tmp46 = fdiv float %tmp44, %tmp45
55 %tmp47 = insertelement <4 x float> undef, float %tmp46, i32 0
56 %tmp48 = shufflevector <4 x float> %tmp47, <4 x float> undef, <4 x i32> zeroinitializer
57 %tmp49 = fsub <4 x float> %tmp48, %tmp40
58 %tmp50 = extractelement <4 x float> %tmp41, i32 1
59 %tmp51 = extractelement <4 x float> %tmp42, i32 2
60 %tmp52 = fmul float undef, undef
61 %tmp53 = fadd float %tmp52, undef
62 %tmp54 = fadd float %tmp51, %tmp53
63 %tmp55 = extractelement <4 x float> %tmp49, i32 1
64 %tmp56 = fmul float %tmp55, %tmp50
65 %tmp57 = fmul float %tmp54, %tmp56
66 %tmp58 = fdiv float %tmp57, 0.000000e+00
67 ; Make sure this isn't double emitted
68 ; CHECK-NOT: ;DEBUG_VALUE:
69 ; CHECK: ;DEBUG_VALUE: foo:var <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef]
70 ; CHECK-NOT: ;DEBUG_VALUE:
71 call void @llvm.dbg.value(metadata <4 x float> %tmp29, metadata !3, metadata !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef)) #2, !dbg !5
72 %tmp59 = bitcast i64 %tmp35 to <2 x float>
73 %tmp60 = insertelement <2 x float> undef, float %tmp58, i32 0
74 %tmp61 = shufflevector <2 x float> %tmp60, <2 x float> undef, <2 x i32> zeroinitializer
75 %tmp62 = fmul <2 x float> %tmp61, undef
76 %tmp63 = fsub <2 x float> %tmp62, %tmp59
77 %tmp64 = extractelement <2 x float> %tmp63, i64 0
78 call void @eggs(float %tmp64) #2
79 store <2 x float> %tmp3, ptr addrspace(1) undef, align 8
80 store float 0.000000e+00, ptr addrspace(1) undef, align 4
84 declare float @barney() #2
85 declare void @eggs(float) #2
86 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
88 attributes #0 = { convergent nounwind "target-cpu"="gfx900" }
89 attributes #1 = { nounwind readnone speculatable }
90 attributes #2 = { nounwind }
93 !llvm.module.flags = !{!2}
95 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
96 !1 = !DIFile(filename: "foo.cl", directory: "/tmp")
97 !2 = !{i32 2, !"Debug Info Version", i32 3}
98 !3 = !DILocalVariable(name: "var", arg: 8, scope: !4)
99 !4 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, type: !12, isLocal: false, isDefinition: true, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
100 !5 = !DILocation(line: 69, scope: !4)
101 !12 = !DISubroutineType(types: !13)
103 !14 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)