| blob | 1a51c8708b941f1cb057bcf1b4a26a0e4ca35963 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s
3 ; RUN: llc -march=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefix=CI %s
5 define amdgpu_kernel void @round_f64(ptr addrspace(1) %out, double %x) #0 {
6 ; SI-LABEL: round_f64:
7 ; SI: ; %bb.0:
8 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
9 ; SI-NEXT: s_mov_b32 s6, -1
10 ; SI-NEXT: s_mov_b32 s5, 0xfffff
11 ; SI-NEXT: s_mov_b32 s4, s6
12 ; SI-NEXT: s_waitcnt lgkmcnt(0)
13 ; SI-NEXT: s_bfe_u32 s7, s3, 0xb0014
14 ; SI-NEXT: s_addk_i32 s7, 0xfc01
15 ; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], s7
16 ; SI-NEXT: s_and_b32 s8, s3, 0x80000000
17 ; SI-NEXT: s_andn2_b64 s[4:5], s[2:3], s[4:5]
18 ; SI-NEXT: s_cmp_lt_i32 s7, 0
19 ; SI-NEXT: s_cselect_b32 s4, 0, s4
20 ; SI-NEXT: s_cselect_b32 s5, s8, s5
21 ; SI-NEXT: s_cmp_gt_i32 s7, 51
22 ; SI-NEXT: s_cselect_b32 s8, s2, s4
23 ; SI-NEXT: s_cselect_b32 s9, s3, s5
24 ; SI-NEXT: v_mov_b32_e32 v0, s8
25 ; SI-NEXT: v_mov_b32_e32 v1, s9
26 ; SI-NEXT: v_add_f64 v[0:1], s[2:3], -v[0:1]
27 ; SI-NEXT: s_mov_b32 s4, s0
28 ; SI-NEXT: v_cmp_ge_f64_e64 s[10:11], |v[0:1]|, 0.5
29 ; SI-NEXT: s_brev_b32 s2, -2
30 ; SI-NEXT: s_and_b64 s[10:11], s[10:11], exec
31 ; SI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0
32 ; SI-NEXT: v_mov_b32_e32 v0, s0
33 ; SI-NEXT: v_mov_b32_e32 v1, s3
34 ; SI-NEXT: v_bfi_b32 v1, s2, v0, v1
35 ; SI-NEXT: v_mov_b32_e32 v0, 0
36 ; SI-NEXT: v_add_f64 v[0:1], s[8:9], v[0:1]
37 ; SI-NEXT: s_mov_b32 s7, 0xf000
38 ; SI-NEXT: s_mov_b32 s5, s1
39 ; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
40 ; SI-NEXT: s_endpgm
41 ;
42 ; CI-LABEL: round_f64:
43 ; CI: ; %bb.0:
44 ; CI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
45 ; CI-NEXT: s_brev_b32 s5, -2
46 ; CI-NEXT: s_mov_b32 s7, 0xf000
47 ; CI-NEXT: s_mov_b32 s6, -1
48 ; CI-NEXT: s_waitcnt lgkmcnt(0)
49 ; CI-NEXT: v_trunc_f64_e32 v[0:1], s[2:3]
50 ; CI-NEXT: s_mov_b32 s4, s0
51 ; CI-NEXT: v_add_f64 v[2:3], s[2:3], -v[0:1]
52 ; CI-NEXT: v_cmp_ge_f64_e64 s[8:9], |v[2:3]|, 0.5
53 ; CI-NEXT: v_mov_b32_e32 v2, s3
54 ; CI-NEXT: s_and_b64 s[2:3], s[8:9], exec
55 ; CI-NEXT: s_cselect_b32 s0, 0x3ff00000, 0
56 ; CI-NEXT: v_mov_b32_e32 v3, s0
57 ; CI-NEXT: v_bfi_b32 v3, s5, v3, v2
58 ; CI-NEXT: v_mov_b32_e32 v2, 0
59 ; CI-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]
60 ; CI-NEXT: s_mov_b32 s5, s1
61 ; CI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
62 ; CI-NEXT: s_endpgm
63 %result = call double @llvm.round.f64(double %x) #1
64 store double %result, ptr addrspace(1) %out
65 ret void
66 }
68 define amdgpu_kernel void @v_round_f64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
69 ; SI-LABEL: v_round_f64:
70 ; SI: ; %bb.0:
71 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
72 ; SI-NEXT: s_mov_b32 s7, 0xf000
73 ; SI-NEXT: s_mov_b32 s6, 0
74 ; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
75 ; SI-NEXT: v_mov_b32_e32 v1, 0
76 ; SI-NEXT: s_waitcnt lgkmcnt(0)
77 ; SI-NEXT: s_mov_b64 s[4:5], s[2:3]
78 ; SI-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
79 ; SI-NEXT: s_movk_i32 s4, 0xfc01
80 ; SI-NEXT: s_mov_b32 s2, -1
81 ; SI-NEXT: s_mov_b32 s3, 0xfffff
82 ; SI-NEXT: v_mov_b32_e32 v8, 0x3ff00000
83 ; SI-NEXT: s_waitcnt vmcnt(0)
84 ; SI-NEXT: v_bfe_u32 v4, v3, 20, 11
85 ; SI-NEXT: v_add_i32_e32 v6, vcc, s4, v4
86 ; SI-NEXT: v_lshr_b64 v[4:5], s[2:3], v6
87 ; SI-NEXT: v_and_b32_e32 v7, 0x80000000, v3
88 ; SI-NEXT: v_not_b32_e32 v5, v5
89 ; SI-NEXT: v_not_b32_e32 v4, v4
90 ; SI-NEXT: v_and_b32_e32 v5, v3, v5
91 ; SI-NEXT: v_and_b32_e32 v4, v2, v4
92 ; SI-NEXT: v_cmp_gt_i32_e32 vcc, 0, v6
93 ; SI-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc
94 ; SI-NEXT: v_cndmask_b32_e64 v4, v4, 0, vcc
95 ; SI-NEXT: v_cmp_lt_i32_e32 vcc, 51, v6
96 ; SI-NEXT: v_cndmask_b32_e32 v5, v5, v3, vcc
97 ; SI-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
98 ; SI-NEXT: v_add_f64 v[6:7], v[2:3], -v[4:5]
99 ; SI-NEXT: s_brev_b32 s2, -2
100 ; SI-NEXT: v_cmp_ge_f64_e64 vcc, |v[6:7]|, 0.5
101 ; SI-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc
102 ; SI-NEXT: v_bfi_b32 v3, s2, v2, v3
103 ; SI-NEXT: v_mov_b32_e32 v2, v1
104 ; SI-NEXT: v_add_f64 v[2:3], v[4:5], v[2:3]
105 ; SI-NEXT: s_mov_b64 s[2:3], s[6:7]
106 ; SI-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64
107 ; SI-NEXT: s_endpgm
108 ;
109 ; CI-LABEL: v_round_f64:
110 ; CI: ; %bb.0:
111 ; CI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
112 ; CI-NEXT: s_mov_b32 s7, 0xf000
113 ; CI-NEXT: s_mov_b32 s6, 0
114 ; CI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
115 ; CI-NEXT: v_mov_b32_e32 v1, 0
116 ; CI-NEXT: s_waitcnt lgkmcnt(0)
117 ; CI-NEXT: s_mov_b64 s[4:5], s[2:3]
118 ; CI-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
119 ; CI-NEXT: v_mov_b32_e32 v8, 0x3ff00000
120 ; CI-NEXT: s_brev_b32 s2, -2
121 ; CI-NEXT: s_waitcnt vmcnt(0)
122 ; CI-NEXT: v_trunc_f64_e32 v[4:5], v[2:3]
123 ; CI-NEXT: v_add_f64 v[6:7], v[2:3], -v[4:5]
124 ; CI-NEXT: v_cmp_ge_f64_e64 vcc, |v[6:7]|, 0.5
125 ; CI-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc
126 ; CI-NEXT: v_bfi_b32 v3, s2, v2, v3
127 ; CI-NEXT: v_mov_b32_e32 v2, v1
128 ; CI-NEXT: v_add_f64 v[2:3], v[4:5], v[2:3]
129 ; CI-NEXT: s_mov_b64 s[2:3], s[6:7]
130 ; CI-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64
131 ; CI-NEXT: s_endpgm
132 %tid = call i32 @llvm.amdgcn.workitem.id.x() #1
133 %gep = getelementptr double, ptr addrspace(1) %in, i32 %tid
134 %out.gep = getelementptr double, ptr addrspace(1) %out, i32 %tid
135 %x = load double, ptr addrspace(1) %gep
136 %result = call double @llvm.round.f64(double %x) #1
137 store double %result, ptr addrspace(1) %out.gep
138 ret void
139 }
141 define amdgpu_kernel void @round_v2f64(ptr addrspace(1) %out, <2 x double> %in) #0 {
142 ; SI-LABEL: round_v2f64:
143 ; SI: ; %bb.0:
144 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0xd
145 ; SI-NEXT: s_mov_b32 s2, -1
146 ; SI-NEXT: s_mov_b32 s9, 0xfffff
147 ; SI-NEXT: s_mov_b32 s8, s2
148 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
149 ; SI-NEXT: s_waitcnt lgkmcnt(0)
150 ; SI-NEXT: s_bfe_u32 s3, s7, 0xb0014
151 ; SI-NEXT: s_addk_i32 s3, 0xfc01
152 ; SI-NEXT: s_lshr_b64 s[10:11], s[8:9], s3
153 ; SI-NEXT: s_and_b32 s12, s7, 0x80000000
154 ; SI-NEXT: s_andn2_b64 s[10:11], s[6:7], s[10:11]
155 ; SI-NEXT: s_cmp_lt_i32 s3, 0
156 ; SI-NEXT: s_cselect_b32 s10, 0, s10
157 ; SI-NEXT: s_cselect_b32 s11, s12, s11
158 ; SI-NEXT: s_cmp_gt_i32 s3, 51
159 ; SI-NEXT: s_cselect_b32 s10, s6, s10
160 ; SI-NEXT: s_cselect_b32 s11, s7, s11
161 ; SI-NEXT: v_mov_b32_e32 v0, s10
162 ; SI-NEXT: v_mov_b32_e32 v1, s11
163 ; SI-NEXT: v_add_f64 v[0:1], s[6:7], -v[0:1]
164 ; SI-NEXT: v_mov_b32_e32 v4, s5
165 ; SI-NEXT: v_cmp_ge_f64_e64 s[12:13], |v[0:1]|, 0.5
166 ; SI-NEXT: v_mov_b32_e32 v1, s7
167 ; SI-NEXT: s_and_b64 s[12:13], s[12:13], exec
168 ; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0
169 ; SI-NEXT: v_mov_b32_e32 v0, s3
170 ; SI-NEXT: s_bfe_u32 s3, s5, 0xb0014
171 ; SI-NEXT: s_addk_i32 s3, 0xfc01
172 ; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], s3
173 ; SI-NEXT: s_andn2_b64 s[6:7], s[4:5], s[6:7]
174 ; SI-NEXT: s_and_b32 s8, s5, 0x80000000
175 ; SI-NEXT: s_cmp_lt_i32 s3, 0
176 ; SI-NEXT: s_cselect_b32 s6, 0, s6
177 ; SI-NEXT: s_cselect_b32 s7, s8, s7
178 ; SI-NEXT: s_cmp_gt_i32 s3, 51
179 ; SI-NEXT: s_cselect_b32 s6, s4, s6
180 ; SI-NEXT: s_cselect_b32 s7, s5, s7
181 ; SI-NEXT: v_mov_b32_e32 v2, s6
182 ; SI-NEXT: v_mov_b32_e32 v3, s7
183 ; SI-NEXT: v_add_f64 v[2:3], s[4:5], -v[2:3]
184 ; SI-NEXT: s_brev_b32 s12, -2
185 ; SI-NEXT: v_cmp_ge_f64_e64 s[8:9], |v[2:3]|, 0.5
186 ; SI-NEXT: v_bfi_b32 v1, s12, v0, v1
187 ; SI-NEXT: s_and_b64 s[8:9], s[8:9], exec
188 ; SI-NEXT: v_mov_b32_e32 v0, 0
189 ; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0
190 ; SI-NEXT: v_add_f64 v[2:3], s[10:11], v[0:1]
191 ; SI-NEXT: v_mov_b32_e32 v1, s3
192 ; SI-NEXT: v_bfi_b32 v1, s12, v1, v4
193 ; SI-NEXT: v_add_f64 v[0:1], s[6:7], v[0:1]
194 ; SI-NEXT: s_mov_b32 s3, 0xf000
195 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
196 ; SI-NEXT: s_endpgm
197 ;
198 ; CI-LABEL: round_v2f64:
199 ; CI: ; %bb.0:
200 ; CI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0xd
201 ; CI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
202 ; CI-NEXT: s_brev_b32 s2, -2
203 ; CI-NEXT: v_mov_b32_e32 v0, 0
204 ; CI-NEXT: s_mov_b32 s3, 0xf000
205 ; CI-NEXT: s_waitcnt lgkmcnt(0)
206 ; CI-NEXT: v_trunc_f64_e32 v[2:3], s[6:7]
207 ; CI-NEXT: v_trunc_f64_e32 v[6:7], s[4:5]
208 ; CI-NEXT: v_add_f64 v[4:5], s[6:7], -v[2:3]
209 ; CI-NEXT: v_mov_b32_e32 v1, s7
210 ; CI-NEXT: v_cmp_ge_f64_e64 s[6:7], |v[4:5]|, 0.5
211 ; CI-NEXT: v_add_f64 v[4:5], s[4:5], -v[6:7]
212 ; CI-NEXT: s_and_b64 s[6:7], s[6:7], exec
213 ; CI-NEXT: v_cmp_ge_f64_e64 s[6:7], |v[4:5]|, 0.5
214 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
215 ; CI-NEXT: v_mov_b32_e32 v8, s4
216 ; CI-NEXT: s_and_b64 s[6:7], s[6:7], exec
217 ; CI-NEXT: v_bfi_b32 v1, s2, v8, v1
218 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
219 ; CI-NEXT: v_add_f64 v[2:3], v[2:3], v[0:1]
220 ; CI-NEXT: v_mov_b32_e32 v1, s4
221 ; CI-NEXT: v_mov_b32_e32 v4, s5
222 ; CI-NEXT: v_bfi_b32 v1, s2, v1, v4
223 ; CI-NEXT: v_add_f64 v[0:1], v[6:7], v[0:1]
224 ; CI-NEXT: s_mov_b32 s2, -1
225 ; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
226 ; CI-NEXT: s_endpgm
227 %result = call <2 x double> @llvm.round.v2f64(<2 x double> %in) #1
228 store <2 x double> %result, ptr addrspace(1) %out
229 ret void
230 }
232 define amdgpu_kernel void @round_v4f64(ptr addrspace(1) %out, <4 x double> %in) #0 {
233 ; SI-LABEL: round_v4f64:
234 ; SI: ; %bb.0:
235 ; SI-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x11
236 ; SI-NEXT: s_mov_b32 s2, -1
237 ; SI-NEXT: s_mov_b32 s13, 0xfffff
238 ; SI-NEXT: s_mov_b32 s12, s2
239 ; SI-NEXT: s_brev_b32 s18, -2
240 ; SI-NEXT: s_waitcnt lgkmcnt(0)
241 ; SI-NEXT: s_bfe_u32 s3, s7, 0xb0014
242 ; SI-NEXT: s_addk_i32 s3, 0xfc01
243 ; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], s3
244 ; SI-NEXT: s_and_b32 s16, s7, 0x80000000
245 ; SI-NEXT: s_andn2_b64 s[14:15], s[6:7], s[14:15]
246 ; SI-NEXT: s_cmp_lt_i32 s3, 0
247 ; SI-NEXT: s_cselect_b32 s14, 0, s14
248 ; SI-NEXT: s_cselect_b32 s15, s16, s15
249 ; SI-NEXT: s_cmp_gt_i32 s3, 51
250 ; SI-NEXT: s_cselect_b32 s14, s6, s14
251 ; SI-NEXT: s_cselect_b32 s15, s7, s15
252 ; SI-NEXT: v_mov_b32_e32 v0, s14
253 ; SI-NEXT: v_mov_b32_e32 v1, s15
254 ; SI-NEXT: v_add_f64 v[0:1], s[6:7], -v[0:1]
255 ; SI-NEXT: v_mov_b32_e32 v4, 0
256 ; SI-NEXT: v_cmp_ge_f64_e64 s[16:17], |v[0:1]|, 0.5
257 ; SI-NEXT: v_mov_b32_e32 v1, s7
258 ; SI-NEXT: s_and_b64 s[16:17], s[16:17], exec
259 ; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0
260 ; SI-NEXT: v_mov_b32_e32 v0, s3
261 ; SI-NEXT: s_bfe_u32 s3, s5, 0xb0014
262 ; SI-NEXT: s_addk_i32 s3, 0xfc01
263 ; SI-NEXT: s_lshr_b64 s[6:7], s[12:13], s3
264 ; SI-NEXT: s_andn2_b64 s[6:7], s[4:5], s[6:7]
265 ; SI-NEXT: s_and_b32 s16, s5, 0x80000000
266 ; SI-NEXT: s_cmp_lt_i32 s3, 0
267 ; SI-NEXT: s_cselect_b32 s6, 0, s6
268 ; SI-NEXT: s_cselect_b32 s7, s16, s7
269 ; SI-NEXT: s_cmp_gt_i32 s3, 51
270 ; SI-NEXT: s_cselect_b32 s6, s4, s6
271 ; SI-NEXT: v_bfi_b32 v5, s18, v0, v1
272 ; SI-NEXT: s_cselect_b32 s7, s5, s7
273 ; SI-NEXT: v_mov_b32_e32 v0, s6
274 ; SI-NEXT: v_mov_b32_e32 v1, s7
275 ; SI-NEXT: v_add_f64 v[0:1], s[4:5], -v[0:1]
276 ; SI-NEXT: v_add_f64 v[2:3], s[14:15], v[4:5]
277 ; SI-NEXT: v_cmp_ge_f64_e64 s[16:17], |v[0:1]|, 0.5
278 ; SI-NEXT: v_mov_b32_e32 v6, s5
279 ; SI-NEXT: s_and_b64 s[14:15], s[16:17], exec
280 ; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0
281 ; SI-NEXT: v_mov_b32_e32 v5, s3
282 ; SI-NEXT: s_bfe_u32 s3, s11, 0xb0014
283 ; SI-NEXT: s_addk_i32 s3, 0xfc01
284 ; SI-NEXT: s_lshr_b64 s[4:5], s[12:13], s3
285 ; SI-NEXT: s_andn2_b64 s[4:5], s[10:11], s[4:5]
286 ; SI-NEXT: s_and_b32 s14, s11, 0x80000000
287 ; SI-NEXT: s_cmp_lt_i32 s3, 0
288 ; SI-NEXT: s_cselect_b32 s4, 0, s4
289 ; SI-NEXT: s_cselect_b32 s5, s14, s5
290 ; SI-NEXT: s_cmp_gt_i32 s3, 51
291 ; SI-NEXT: s_cselect_b32 s4, s10, s4
292 ; SI-NEXT: s_cselect_b32 s5, s11, s5
293 ; SI-NEXT: v_mov_b32_e32 v0, s4
294 ; SI-NEXT: v_mov_b32_e32 v1, s5
295 ; SI-NEXT: v_add_f64 v[0:1], s[10:11], -v[0:1]
296 ; SI-NEXT: v_bfi_b32 v5, s18, v5, v6
297 ; SI-NEXT: v_cmp_ge_f64_e64 s[14:15], |v[0:1]|, 0.5
298 ; SI-NEXT: v_add_f64 v[0:1], s[6:7], v[4:5]
299 ; SI-NEXT: s_and_b64 s[6:7], s[14:15], exec
300 ; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0
301 ; SI-NEXT: v_mov_b32_e32 v8, s3
302 ; SI-NEXT: s_bfe_u32 s3, s9, 0xb0014
303 ; SI-NEXT: s_addk_i32 s3, 0xfc01
304 ; SI-NEXT: s_lshr_b64 s[6:7], s[12:13], s3
305 ; SI-NEXT: s_andn2_b64 s[6:7], s[8:9], s[6:7]
306 ; SI-NEXT: s_and_b32 s10, s9, 0x80000000
307 ; SI-NEXT: s_cmp_lt_i32 s3, 0
308 ; SI-NEXT: s_cselect_b32 s6, 0, s6
309 ; SI-NEXT: s_cselect_b32 s7, s10, s7
310 ; SI-NEXT: s_cmp_gt_i32 s3, 51
311 ; SI-NEXT: s_cselect_b32 s6, s8, s6
312 ; SI-NEXT: s_cselect_b32 s7, s9, s7
313 ; SI-NEXT: v_mov_b32_e32 v5, s6
314 ; SI-NEXT: v_mov_b32_e32 v6, s7
315 ; SI-NEXT: v_add_f64 v[6:7], s[8:9], -v[5:6]
316 ; SI-NEXT: v_mov_b32_e32 v9, s11
317 ; SI-NEXT: v_cmp_ge_f64_e64 s[10:11], |v[6:7]|, 0.5
318 ; SI-NEXT: v_bfi_b32 v5, s18, v8, v9
319 ; SI-NEXT: v_add_f64 v[6:7], s[4:5], v[4:5]
320 ; SI-NEXT: s_and_b64 s[4:5], s[10:11], exec
321 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
322 ; SI-NEXT: s_cselect_b32 s3, 0x3ff00000, 0
323 ; SI-NEXT: v_mov_b32_e32 v5, s3
324 ; SI-NEXT: v_mov_b32_e32 v8, s9
325 ; SI-NEXT: v_bfi_b32 v5, s18, v5, v8
326 ; SI-NEXT: v_add_f64 v[4:5], s[6:7], v[4:5]
327 ; SI-NEXT: s_mov_b32 s3, 0xf000
328 ; SI-NEXT: s_waitcnt lgkmcnt(0)
329 ; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
330 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
331 ; SI-NEXT: s_endpgm
332 ;
333 ; CI-LABEL: round_v4f64:
334 ; CI: ; %bb.0:
335 ; CI-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x11
336 ; CI-NEXT: s_brev_b32 s2, -2
337 ; CI-NEXT: v_mov_b32_e32 v4, 0
338 ; CI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
339 ; CI-NEXT: s_mov_b32 s3, 0xf000
340 ; CI-NEXT: s_waitcnt lgkmcnt(0)
341 ; CI-NEXT: v_trunc_f64_e32 v[0:1], s[6:7]
342 ; CI-NEXT: v_mov_b32_e32 v5, s7
343 ; CI-NEXT: v_add_f64 v[2:3], s[6:7], -v[0:1]
344 ; CI-NEXT: v_trunc_f64_e32 v[6:7], s[4:5]
345 ; CI-NEXT: v_cmp_ge_f64_e64 s[6:7], |v[2:3]|, 0.5
346 ; CI-NEXT: v_add_f64 v[2:3], s[4:5], -v[6:7]
347 ; CI-NEXT: s_and_b64 s[6:7], s[6:7], exec
348 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
349 ; CI-NEXT: v_mov_b32_e32 v8, s4
350 ; CI-NEXT: v_cmp_ge_f64_e64 s[6:7], |v[2:3]|, 0.5
351 ; CI-NEXT: v_bfi_b32 v5, s2, v8, v5
352 ; CI-NEXT: v_trunc_f64_e32 v[8:9], s[10:11]
353 ; CI-NEXT: s_and_b64 s[6:7], s[6:7], exec
354 ; CI-NEXT: v_add_f64 v[2:3], v[0:1], v[4:5]
355 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
356 ; CI-NEXT: v_add_f64 v[0:1], s[10:11], -v[8:9]
357 ; CI-NEXT: v_mov_b32_e32 v5, s4
358 ; CI-NEXT: v_mov_b32_e32 v10, s5
359 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v10
360 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[0:1]|, 0.5
361 ; CI-NEXT: v_trunc_f64_e32 v[10:11], s[8:9]
362 ; CI-NEXT: v_add_f64 v[0:1], v[6:7], v[4:5]
363 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
364 ; CI-NEXT: v_add_f64 v[6:7], s[8:9], -v[10:11]
365 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
366 ; CI-NEXT: v_mov_b32_e32 v5, s4
367 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[6:7]|, 0.5
368 ; CI-NEXT: v_mov_b32_e32 v12, s11
369 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
370 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v12
371 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
372 ; CI-NEXT: v_add_f64 v[6:7], v[8:9], v[4:5]
373 ; CI-NEXT: v_mov_b32_e32 v5, s4
374 ; CI-NEXT: v_mov_b32_e32 v8, s9
375 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v8
376 ; CI-NEXT: v_add_f64 v[4:5], v[10:11], v[4:5]
377 ; CI-NEXT: s_mov_b32 s2, -1
378 ; CI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
379 ; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
380 ; CI-NEXT: s_endpgm
381 %result = call <4 x double> @llvm.round.v4f64(<4 x double> %in) #1
382 store <4 x double> %result, ptr addrspace(1) %out
383 ret void
384 }
386 define amdgpu_kernel void @round_v8f64(ptr addrspace(1) %out, <8 x double> %in) #0 {
387 ; SI-LABEL: round_v8f64:
388 ; SI: ; %bb.0:
389 ; SI-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0x19
390 ; SI-NEXT: s_mov_b32 s2, -1
391 ; SI-NEXT: s_mov_b32 s21, 0xfffff
392 ; SI-NEXT: s_mov_b32 s20, s2
393 ; SI-NEXT: v_mov_b32_e32 v8, 0
394 ; SI-NEXT: s_waitcnt lgkmcnt(0)
395 ; SI-NEXT: s_bfe_u32 s3, s7, 0xb0014
396 ; SI-NEXT: s_addk_i32 s3, 0xfc01
397 ; SI-NEXT: s_lshr_b64 s[22:23], s[20:21], s3
398 ; SI-NEXT: s_and_b32 s24, s7, 0x80000000
399 ; SI-NEXT: s_andn2_b64 s[22:23], s[6:7], s[22:23]
400 ; SI-NEXT: s_cmp_lt_i32 s3, 0
401 ; SI-NEXT: s_cselect_b32 s22, 0, s22
402 ; SI-NEXT: s_cselect_b32 s23, s24, s23
403 ; SI-NEXT: s_cmp_gt_i32 s3, 51
404 ; SI-NEXT: s_cselect_b32 s22, s6, s22
405 ; SI-NEXT: s_cselect_b32 s23, s7, s23
406 ; SI-NEXT: v_mov_b32_e32 v0, s22
407 ; SI-NEXT: v_mov_b32_e32 v1, s23
408 ; SI-NEXT: v_add_f64 v[0:1], s[6:7], -v[0:1]
409 ; SI-NEXT: s_brev_b32 s3, -2
410 ; SI-NEXT: v_cmp_ge_f64_e64 s[24:25], |v[0:1]|, 0.5
411 ; SI-NEXT: v_mov_b32_e32 v1, s7
412 ; SI-NEXT: s_and_b64 s[24:25], s[24:25], exec
413 ; SI-NEXT: s_cselect_b32 s6, 0x3ff00000, 0
414 ; SI-NEXT: v_mov_b32_e32 v0, s6
415 ; SI-NEXT: s_bfe_u32 s6, s5, 0xb0014
416 ; SI-NEXT: s_add_i32 s24, s6, 0xfffffc01
417 ; SI-NEXT: s_lshr_b64 s[6:7], s[20:21], s24
418 ; SI-NEXT: s_andn2_b64 s[6:7], s[4:5], s[6:7]
419 ; SI-NEXT: s_and_b32 s25, s5, 0x80000000
420 ; SI-NEXT: s_cmp_lt_i32 s24, 0
421 ; SI-NEXT: s_cselect_b32 s6, 0, s6
422 ; SI-NEXT: s_cselect_b32 s7, s25, s7
423 ; SI-NEXT: s_cmp_gt_i32 s24, 51
424 ; SI-NEXT: s_cselect_b32 s6, s4, s6
425 ; SI-NEXT: v_bfi_b32 v9, s3, v0, v1
426 ; SI-NEXT: s_cselect_b32 s7, s5, s7
427 ; SI-NEXT: v_mov_b32_e32 v0, s6
428 ; SI-NEXT: v_mov_b32_e32 v1, s7
429 ; SI-NEXT: v_add_f64 v[0:1], s[4:5], -v[0:1]
430 ; SI-NEXT: v_add_f64 v[2:3], s[22:23], v[8:9]
431 ; SI-NEXT: v_cmp_ge_f64_e64 s[24:25], |v[0:1]|, 0.5
432 ; SI-NEXT: v_mov_b32_e32 v5, s5
433 ; SI-NEXT: s_and_b64 s[22:23], s[24:25], exec
434 ; SI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
435 ; SI-NEXT: v_mov_b32_e32 v4, s4
436 ; SI-NEXT: s_bfe_u32 s4, s11, 0xb0014
437 ; SI-NEXT: s_add_i32 s22, s4, 0xfffffc01
438 ; SI-NEXT: s_lshr_b64 s[4:5], s[20:21], s22
439 ; SI-NEXT: s_andn2_b64 s[4:5], s[10:11], s[4:5]
440 ; SI-NEXT: s_and_b32 s23, s11, 0x80000000
441 ; SI-NEXT: s_cmp_lt_i32 s22, 0
442 ; SI-NEXT: s_cselect_b32 s4, 0, s4
443 ; SI-NEXT: s_cselect_b32 s5, s23, s5
444 ; SI-NEXT: s_cmp_gt_i32 s22, 51
445 ; SI-NEXT: s_cselect_b32 s4, s10, s4
446 ; SI-NEXT: s_cselect_b32 s5, s11, s5
447 ; SI-NEXT: v_mov_b32_e32 v0, s4
448 ; SI-NEXT: v_mov_b32_e32 v1, s5
449 ; SI-NEXT: v_add_f64 v[0:1], s[10:11], -v[0:1]
450 ; SI-NEXT: v_bfi_b32 v9, s3, v4, v5
451 ; SI-NEXT: v_cmp_ge_f64_e64 s[22:23], |v[0:1]|, 0.5
452 ; SI-NEXT: v_add_f64 v[0:1], s[6:7], v[8:9]
453 ; SI-NEXT: s_and_b64 s[6:7], s[22:23], exec
454 ; SI-NEXT: s_cselect_b32 s6, 0x3ff00000, 0
455 ; SI-NEXT: v_mov_b32_e32 v6, s6
456 ; SI-NEXT: s_bfe_u32 s6, s9, 0xb0014
457 ; SI-NEXT: s_add_i32 s10, s6, 0xfffffc01
458 ; SI-NEXT: s_lshr_b64 s[6:7], s[20:21], s10
459 ; SI-NEXT: v_mov_b32_e32 v7, s11
460 ; SI-NEXT: s_andn2_b64 s[6:7], s[8:9], s[6:7]
461 ; SI-NEXT: s_and_b32 s11, s9, 0x80000000
462 ; SI-NEXT: s_cmp_lt_i32 s10, 0
463 ; SI-NEXT: s_cselect_b32 s6, 0, s6
464 ; SI-NEXT: s_cselect_b32 s7, s11, s7
465 ; SI-NEXT: s_cmp_gt_i32 s10, 51
466 ; SI-NEXT: s_cselect_b32 s6, s8, s6
467 ; SI-NEXT: s_cselect_b32 s7, s9, s7
468 ; SI-NEXT: v_mov_b32_e32 v4, s6
469 ; SI-NEXT: v_mov_b32_e32 v5, s7
470 ; SI-NEXT: v_add_f64 v[4:5], s[8:9], -v[4:5]
471 ; SI-NEXT: v_bfi_b32 v9, s3, v6, v7
472 ; SI-NEXT: v_cmp_ge_f64_e64 s[10:11], |v[4:5]|, 0.5
473 ; SI-NEXT: v_add_f64 v[6:7], s[4:5], v[8:9]
474 ; SI-NEXT: s_and_b64 s[4:5], s[10:11], exec
475 ; SI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
476 ; SI-NEXT: v_mov_b32_e32 v9, s4
477 ; SI-NEXT: s_bfe_u32 s4, s15, 0xb0014
478 ; SI-NEXT: s_add_i32 s8, s4, 0xfffffc01
479 ; SI-NEXT: s_lshr_b64 s[4:5], s[20:21], s8
480 ; SI-NEXT: v_mov_b32_e32 v10, s9
481 ; SI-NEXT: s_andn2_b64 s[4:5], s[14:15], s[4:5]
482 ; SI-NEXT: s_and_b32 s9, s15, 0x80000000
483 ; SI-NEXT: s_cmp_lt_i32 s8, 0
484 ; SI-NEXT: s_cselect_b32 s4, 0, s4
485 ; SI-NEXT: s_cselect_b32 s5, s9, s5
486 ; SI-NEXT: s_cmp_gt_i32 s8, 51
487 ; SI-NEXT: s_cselect_b32 s4, s14, s4
488 ; SI-NEXT: s_cselect_b32 s5, s15, s5
489 ; SI-NEXT: v_mov_b32_e32 v4, s4
490 ; SI-NEXT: v_mov_b32_e32 v5, s5
491 ; SI-NEXT: v_add_f64 v[4:5], s[14:15], -v[4:5]
492 ; SI-NEXT: v_bfi_b32 v9, s3, v9, v10
493 ; SI-NEXT: v_cmp_ge_f64_e64 s[8:9], |v[4:5]|, 0.5
494 ; SI-NEXT: v_add_f64 v[4:5], s[6:7], v[8:9]
495 ; SI-NEXT: s_and_b64 s[6:7], s[8:9], exec
496 ; SI-NEXT: s_cselect_b32 s6, 0x3ff00000, 0
497 ; SI-NEXT: v_mov_b32_e32 v12, s6
498 ; SI-NEXT: s_bfe_u32 s6, s13, 0xb0014
499 ; SI-NEXT: s_add_i32 s8, s6, 0xfffffc01
500 ; SI-NEXT: s_lshr_b64 s[6:7], s[20:21], s8
501 ; SI-NEXT: s_andn2_b64 s[6:7], s[12:13], s[6:7]
502 ; SI-NEXT: s_and_b32 s9, s13, 0x80000000
503 ; SI-NEXT: s_cmp_lt_i32 s8, 0
504 ; SI-NEXT: s_cselect_b32 s6, 0, s6
505 ; SI-NEXT: s_cselect_b32 s7, s9, s7
506 ; SI-NEXT: s_cmp_gt_i32 s8, 51
507 ; SI-NEXT: s_cselect_b32 s7, s13, s7
508 ; SI-NEXT: s_cselect_b32 s6, s12, s6
509 ; SI-NEXT: v_mov_b32_e32 v10, s7
510 ; SI-NEXT: v_mov_b32_e32 v9, s6
511 ; SI-NEXT: v_add_f64 v[10:11], s[12:13], -v[9:10]
512 ; SI-NEXT: v_mov_b32_e32 v13, s15
513 ; SI-NEXT: v_cmp_ge_f64_e64 s[8:9], |v[10:11]|, 0.5
514 ; SI-NEXT: v_bfi_b32 v9, s3, v12, v13
515 ; SI-NEXT: v_add_f64 v[12:13], s[4:5], v[8:9]
516 ; SI-NEXT: s_and_b64 s[4:5], s[8:9], exec
517 ; SI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
518 ; SI-NEXT: v_mov_b32_e32 v14, s4
519 ; SI-NEXT: s_bfe_u32 s4, s19, 0xb0014
520 ; SI-NEXT: s_add_i32 s8, s4, 0xfffffc01
521 ; SI-NEXT: s_lshr_b64 s[4:5], s[20:21], s8
522 ; SI-NEXT: s_andn2_b64 s[4:5], s[18:19], s[4:5]
523 ; SI-NEXT: s_and_b32 s9, s19, 0x80000000
524 ; SI-NEXT: s_cmp_lt_i32 s8, 0
525 ; SI-NEXT: s_cselect_b32 s4, 0, s4
526 ; SI-NEXT: s_cselect_b32 s5, s9, s5
527 ; SI-NEXT: s_cmp_gt_i32 s8, 51
528 ; SI-NEXT: s_cselect_b32 s5, s19, s5
529 ; SI-NEXT: s_cselect_b32 s4, s18, s4
530 ; SI-NEXT: v_mov_b32_e32 v10, s5
531 ; SI-NEXT: v_mov_b32_e32 v9, s4
532 ; SI-NEXT: v_add_f64 v[10:11], s[18:19], -v[9:10]
533 ; SI-NEXT: v_mov_b32_e32 v15, s13
534 ; SI-NEXT: v_cmp_ge_f64_e64 s[8:9], |v[10:11]|, 0.5
535 ; SI-NEXT: v_bfi_b32 v9, s3, v14, v15
536 ; SI-NEXT: v_add_f64 v[10:11], s[6:7], v[8:9]
537 ; SI-NEXT: s_and_b64 s[6:7], s[8:9], exec
538 ; SI-NEXT: s_cselect_b32 s6, 0x3ff00000, 0
539 ; SI-NEXT: v_mov_b32_e32 v9, s6
540 ; SI-NEXT: s_bfe_u32 s6, s17, 0xb0014
541 ; SI-NEXT: s_add_i32 s8, s6, 0xfffffc01
542 ; SI-NEXT: s_lshr_b64 s[6:7], s[20:21], s8
543 ; SI-NEXT: s_andn2_b64 s[6:7], s[16:17], s[6:7]
544 ; SI-NEXT: s_and_b32 s9, s17, 0x80000000
545 ; SI-NEXT: s_cmp_lt_i32 s8, 0
546 ; SI-NEXT: s_cselect_b32 s6, 0, s6
547 ; SI-NEXT: s_cselect_b32 s7, s9, s7
548 ; SI-NEXT: s_cmp_gt_i32 s8, 51
549 ; SI-NEXT: s_cselect_b32 s7, s17, s7
550 ; SI-NEXT: s_cselect_b32 s6, s16, s6
551 ; SI-NEXT: v_mov_b32_e32 v15, s7
552 ; SI-NEXT: v_mov_b32_e32 v14, s6
553 ; SI-NEXT: v_add_f64 v[14:15], s[16:17], -v[14:15]
554 ; SI-NEXT: v_mov_b32_e32 v16, s19
555 ; SI-NEXT: v_cmp_ge_f64_e64 s[8:9], |v[14:15]|, 0.5
556 ; SI-NEXT: v_bfi_b32 v9, s3, v9, v16
557 ; SI-NEXT: v_add_f64 v[16:17], s[4:5], v[8:9]
558 ; SI-NEXT: s_and_b64 s[4:5], s[8:9], exec
559 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
560 ; SI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
561 ; SI-NEXT: v_mov_b32_e32 v9, s4
562 ; SI-NEXT: v_mov_b32_e32 v14, s17
563 ; SI-NEXT: v_bfi_b32 v9, s3, v9, v14
564 ; SI-NEXT: v_add_f64 v[14:15], s[6:7], v[8:9]
565 ; SI-NEXT: s_mov_b32 s3, 0xf000
566 ; SI-NEXT: s_waitcnt lgkmcnt(0)
567 ; SI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:48
568 ; SI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:32
569 ; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
570 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
571 ; SI-NEXT: s_endpgm
572 ;
573 ; CI-LABEL: round_v8f64:
574 ; CI: ; %bb.0:
575 ; CI-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0x19
576 ; CI-NEXT: s_brev_b32 s2, -2
577 ; CI-NEXT: v_mov_b32_e32 v4, 0
578 ; CI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
579 ; CI-NEXT: s_mov_b32 s3, 0xf000
580 ; CI-NEXT: s_waitcnt lgkmcnt(0)
581 ; CI-NEXT: v_trunc_f64_e32 v[0:1], s[6:7]
582 ; CI-NEXT: v_trunc_f64_e32 v[6:7], s[4:5]
583 ; CI-NEXT: v_add_f64 v[2:3], s[6:7], -v[0:1]
584 ; CI-NEXT: v_mov_b32_e32 v5, s7
585 ; CI-NEXT: v_cmp_ge_f64_e64 s[6:7], |v[2:3]|, 0.5
586 ; CI-NEXT: v_add_f64 v[2:3], s[4:5], -v[6:7]
587 ; CI-NEXT: s_and_b64 s[6:7], s[6:7], exec
588 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
589 ; CI-NEXT: v_cmp_ge_f64_e64 s[6:7], |v[2:3]|, 0.5
590 ; CI-NEXT: v_mov_b32_e32 v8, s4
591 ; CI-NEXT: v_bfi_b32 v5, s2, v8, v5
592 ; CI-NEXT: s_and_b64 s[6:7], s[6:7], exec
593 ; CI-NEXT: v_trunc_f64_e32 v[8:9], s[10:11]
594 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
595 ; CI-NEXT: v_add_f64 v[2:3], v[0:1], v[4:5]
596 ; CI-NEXT: v_mov_b32_e32 v5, s4
597 ; CI-NEXT: v_mov_b32_e32 v10, s5
598 ; CI-NEXT: v_add_f64 v[0:1], s[10:11], -v[8:9]
599 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v10
600 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[0:1]|, 0.5
601 ; CI-NEXT: v_add_f64 v[0:1], v[6:7], v[4:5]
602 ; CI-NEXT: v_trunc_f64_e32 v[6:7], s[8:9]
603 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
604 ; CI-NEXT: v_add_f64 v[10:11], s[8:9], -v[6:7]
605 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
606 ; CI-NEXT: v_mov_b32_e32 v5, s4
607 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[10:11]|, 0.5
608 ; CI-NEXT: v_trunc_f64_e32 v[10:11], s[14:15]
609 ; CI-NEXT: v_mov_b32_e32 v12, s11
610 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
611 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v12
612 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
613 ; CI-NEXT: v_add_f64 v[12:13], s[14:15], -v[10:11]
614 ; CI-NEXT: v_add_f64 v[8:9], v[8:9], v[4:5]
615 ; CI-NEXT: v_mov_b32_e32 v5, s4
616 ; CI-NEXT: v_mov_b32_e32 v14, s9
617 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v14
618 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[12:13]|, 0.5
619 ; CI-NEXT: v_trunc_f64_e32 v[14:15], s[12:13]
620 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
621 ; CI-NEXT: v_add_f64 v[12:13], s[12:13], -v[14:15]
622 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
623 ; CI-NEXT: v_add_f64 v[6:7], v[6:7], v[4:5]
624 ; CI-NEXT: v_mov_b32_e32 v5, s4
625 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[12:13]|, 0.5
626 ; CI-NEXT: v_mov_b32_e32 v16, s15
627 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v16
628 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
629 ; CI-NEXT: v_trunc_f64_e32 v[16:17], s[18:19]
630 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
631 ; CI-NEXT: v_add_f64 v[12:13], v[10:11], v[4:5]
632 ; CI-NEXT: v_mov_b32_e32 v5, s4
633 ; CI-NEXT: v_mov_b32_e32 v18, s13
634 ; CI-NEXT: v_add_f64 v[10:11], s[18:19], -v[16:17]
635 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v18
636 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[10:11]|, 0.5
637 ; CI-NEXT: v_add_f64 v[10:11], v[14:15], v[4:5]
638 ; CI-NEXT: v_trunc_f64_e32 v[14:15], s[16:17]
639 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
640 ; CI-NEXT: v_add_f64 v[18:19], s[16:17], -v[14:15]
641 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
642 ; CI-NEXT: v_mov_b32_e32 v5, s4
643 ; CI-NEXT: v_cmp_ge_f64_e64 s[4:5], |v[18:19]|, 0.5
644 ; CI-NEXT: v_mov_b32_e32 v20, s19
645 ; CI-NEXT: s_and_b64 s[4:5], s[4:5], exec
646 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v20
647 ; CI-NEXT: s_cselect_b32 s4, 0x3ff00000, 0
648 ; CI-NEXT: v_add_f64 v[16:17], v[16:17], v[4:5]
649 ; CI-NEXT: v_mov_b32_e32 v5, s4
650 ; CI-NEXT: v_mov_b32_e32 v18, s17
651 ; CI-NEXT: v_bfi_b32 v5, s2, v5, v18
652 ; CI-NEXT: v_add_f64 v[14:15], v[14:15], v[4:5]
653 ; CI-NEXT: s_mov_b32 s2, -1
654 ; CI-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:48
655 ; CI-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:32
656 ; CI-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:16
657 ; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
658 ; CI-NEXT: s_endpgm
659 %result = call <8 x double> @llvm.round.v8f64(<8 x double> %in) #1
660 store <8 x double> %result, ptr addrspace(1) %out
661 ret void
662 }
664 declare i32 @llvm.amdgcn.workitem.id.x() #1
666 declare double @llvm.round.f64(double) #1
667 declare <2 x double> @llvm.round.v2f64(<2 x double>) #1
668 declare <4 x double> @llvm.round.v4f64(<4 x double>) #1
669 declare <8 x double> @llvm.round.v8f64(<8 x double>) #1
671 attributes #0 = { nounwind }
672 attributes #1 = { nounwind readnone }