| blob | 2a1488652d887a47c6929a82fde90c443ce66120 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -mtriple=amdgcn-- -verify-machineinstrs < %s | FileCheck -check-prefix=GFX6 %s
3 ; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8 %s
4 ; RUN: llc -march=r600 -mtriple=r600-- -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
6 define amdgpu_kernel void @constant_load_i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
7 ; GFX6-LABEL: constant_load_i1:
8 ; GFX6: ; %bb.0:
9 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
10 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
11 ; GFX6-NEXT: s_mov_b32 s6, -1
12 ; GFX6-NEXT: s_mov_b32 s10, s6
13 ; GFX6-NEXT: s_mov_b32 s11, s7
14 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
15 ; GFX6-NEXT: s_mov_b32 s8, s2
16 ; GFX6-NEXT: s_mov_b32 s9, s3
17 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
18 ; GFX6-NEXT: s_mov_b32 s4, s0
19 ; GFX6-NEXT: s_mov_b32 s5, s1
20 ; GFX6-NEXT: s_waitcnt vmcnt(0)
21 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
22 ; GFX6-NEXT: buffer_store_byte v0, off, s[4:7], 0
23 ; GFX6-NEXT: s_endpgm
24 ;
25 ; GFX8-LABEL: constant_load_i1:
26 ; GFX8: ; %bb.0:
27 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
28 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
29 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
30 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
31 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
32 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
33 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
34 ; GFX8-NEXT: s_waitcnt vmcnt(0)
35 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
36 ; GFX8-NEXT: flat_store_byte v[0:1], v2
37 ; GFX8-NEXT: s_endpgm
38 ;
39 ; EG-LABEL: constant_load_i1:
40 ; EG: ; %bb.0:
41 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
42 ; EG-NEXT: TEX 0 @6
43 ; EG-NEXT: ALU 11, @9, KC0[CB0:0-32], KC1[]
44 ; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X
45 ; EG-NEXT: CF_END
46 ; EG-NEXT: PAD
47 ; EG-NEXT: Fetch clause starting at 6:
48 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
49 ; EG-NEXT: ALU clause starting at 8:
50 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
51 ; EG-NEXT: ALU clause starting at 9:
52 ; EG-NEXT: AND_INT T0.W, KC0[2].Y, literal.x,
53 ; EG-NEXT: AND_INT * T1.W, T0.X, 1,
54 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
55 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
56 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
57 ; EG-NEXT: LSHL T0.X, T1.W, PV.W,
58 ; EG-NEXT: LSHL * T0.W, literal.x, PV.W,
59 ; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)
60 ; EG-NEXT: MOV T0.Y, 0.0,
61 ; EG-NEXT: MOV * T0.Z, 0.0,
62 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
63 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
64 %load = load i1, ptr addrspace(4) %in
65 store i1 %load, ptr addrspace(1) %out
66 ret void
67 }
69 define amdgpu_kernel void @constant_load_v2i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
70 ; GFX6-LABEL: constant_load_v2i1:
71 ; GFX6: ; %bb.0:
72 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
73 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
74 ; GFX6-NEXT: s_mov_b32 s6, -1
75 ; GFX6-NEXT: s_mov_b32 s10, s6
76 ; GFX6-NEXT: s_mov_b32 s11, s7
77 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
78 ; GFX6-NEXT: s_mov_b32 s8, s2
79 ; GFX6-NEXT: s_mov_b32 s9, s3
80 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
81 ; GFX6-NEXT: s_mov_b32 s4, s0
82 ; GFX6-NEXT: s_mov_b32 s5, s1
83 ; GFX6-NEXT: s_waitcnt vmcnt(0)
84 ; GFX6-NEXT: buffer_store_byte v0, off, s[4:7], 0
85 ; GFX6-NEXT: s_endpgm
86 ;
87 ; GFX8-LABEL: constant_load_v2i1:
88 ; GFX8: ; %bb.0:
89 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
90 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
91 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
92 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
93 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
94 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
95 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
96 ; GFX8-NEXT: s_waitcnt vmcnt(0)
97 ; GFX8-NEXT: flat_store_byte v[0:1], v2
98 ; GFX8-NEXT: s_endpgm
99 ;
100 ; EG-LABEL: constant_load_v2i1:
101 ; EG: ; %bb.0:
102 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
103 ; EG-NEXT: TEX 0 @6
104 ; EG-NEXT: ALU 11, @9, KC0[CB0:0-32], KC1[]
105 ; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X
106 ; EG-NEXT: CF_END
107 ; EG-NEXT: PAD
108 ; EG-NEXT: Fetch clause starting at 6:
109 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
110 ; EG-NEXT: ALU clause starting at 8:
111 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
112 ; EG-NEXT: ALU clause starting at 9:
113 ; EG-NEXT: AND_INT T0.W, KC0[2].Y, literal.x,
114 ; EG-NEXT: AND_INT * T1.W, T0.X, literal.x,
115 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
116 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
117 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
118 ; EG-NEXT: LSHL T0.X, T1.W, PV.W,
119 ; EG-NEXT: LSHL * T0.W, literal.x, PV.W,
120 ; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)
121 ; EG-NEXT: MOV T0.Y, 0.0,
122 ; EG-NEXT: MOV * T0.Z, 0.0,
123 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
124 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
125 %load = load <2 x i1>, ptr addrspace(4) %in
126 store <2 x i1> %load, ptr addrspace(1) %out
127 ret void
128 }
130 define amdgpu_kernel void @constant_load_v3i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
131 ; GFX6-LABEL: constant_load_v3i1:
132 ; GFX6: ; %bb.0:
133 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
134 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
135 ; GFX6-NEXT: s_mov_b32 s6, -1
136 ; GFX6-NEXT: s_mov_b32 s10, s6
137 ; GFX6-NEXT: s_mov_b32 s11, s7
138 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
139 ; GFX6-NEXT: s_mov_b32 s8, s2
140 ; GFX6-NEXT: s_mov_b32 s9, s3
141 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
142 ; GFX6-NEXT: s_mov_b32 s4, s0
143 ; GFX6-NEXT: s_mov_b32 s5, s1
144 ; GFX6-NEXT: s_waitcnt vmcnt(0)
145 ; GFX6-NEXT: buffer_store_byte v0, off, s[4:7], 0
146 ; GFX6-NEXT: s_endpgm
147 ;
148 ; GFX8-LABEL: constant_load_v3i1:
149 ; GFX8: ; %bb.0:
150 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
151 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
152 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
153 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
154 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
155 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
156 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
157 ; GFX8-NEXT: s_waitcnt vmcnt(0)
158 ; GFX8-NEXT: flat_store_byte v[0:1], v2
159 ; GFX8-NEXT: s_endpgm
160 ;
161 ; EG-LABEL: constant_load_v3i1:
162 ; EG: ; %bb.0:
163 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
164 ; EG-NEXT: TEX 0 @6
165 ; EG-NEXT: ALU 10, @9, KC0[CB0:0-32], KC1[]
166 ; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X
167 ; EG-NEXT: CF_END
168 ; EG-NEXT: PAD
169 ; EG-NEXT: Fetch clause starting at 6:
170 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
171 ; EG-NEXT: ALU clause starting at 8:
172 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
173 ; EG-NEXT: ALU clause starting at 9:
174 ; EG-NEXT: AND_INT * T0.W, KC0[2].Y, literal.x,
175 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
176 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
177 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
178 ; EG-NEXT: LSHL T0.X, T0.X, PV.W,
179 ; EG-NEXT: LSHL * T0.W, literal.x, PV.W,
180 ; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)
181 ; EG-NEXT: MOV T0.Y, 0.0,
182 ; EG-NEXT: MOV * T0.Z, 0.0,
183 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
184 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
185 %load = load <3 x i1>, ptr addrspace(4) %in
186 store <3 x i1> %load, ptr addrspace(1) %out
187 ret void
188 }
190 define amdgpu_kernel void @constant_load_v4i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
191 ; GFX6-LABEL: constant_load_v4i1:
192 ; GFX6: ; %bb.0:
193 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
194 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
195 ; GFX6-NEXT: s_mov_b32 s6, -1
196 ; GFX6-NEXT: s_mov_b32 s10, s6
197 ; GFX6-NEXT: s_mov_b32 s11, s7
198 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
199 ; GFX6-NEXT: s_mov_b32 s8, s2
200 ; GFX6-NEXT: s_mov_b32 s9, s3
201 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
202 ; GFX6-NEXT: s_mov_b32 s4, s0
203 ; GFX6-NEXT: s_mov_b32 s5, s1
204 ; GFX6-NEXT: s_waitcnt vmcnt(0)
205 ; GFX6-NEXT: buffer_store_byte v0, off, s[4:7], 0
206 ; GFX6-NEXT: s_endpgm
207 ;
208 ; GFX8-LABEL: constant_load_v4i1:
209 ; GFX8: ; %bb.0:
210 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
211 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
212 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
213 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
214 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
215 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
216 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
217 ; GFX8-NEXT: s_waitcnt vmcnt(0)
218 ; GFX8-NEXT: flat_store_byte v[0:1], v2
219 ; GFX8-NEXT: s_endpgm
220 ;
221 ; EG-LABEL: constant_load_v4i1:
222 ; EG: ; %bb.0:
223 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
224 ; EG-NEXT: TEX 0 @6
225 ; EG-NEXT: ALU 11, @9, KC0[CB0:0-32], KC1[]
226 ; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X
227 ; EG-NEXT: CF_END
228 ; EG-NEXT: PAD
229 ; EG-NEXT: Fetch clause starting at 6:
230 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
231 ; EG-NEXT: ALU clause starting at 8:
232 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
233 ; EG-NEXT: ALU clause starting at 9:
234 ; EG-NEXT: AND_INT T0.W, KC0[2].Y, literal.x,
235 ; EG-NEXT: AND_INT * T1.W, T0.X, literal.y,
236 ; EG-NEXT: 3(4.203895e-45), 15(2.101948e-44)
237 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
238 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
239 ; EG-NEXT: LSHL T0.X, T1.W, PV.W,
240 ; EG-NEXT: LSHL * T0.W, literal.x, PV.W,
241 ; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)
242 ; EG-NEXT: MOV T0.Y, 0.0,
243 ; EG-NEXT: MOV * T0.Z, 0.0,
244 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
245 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
246 %load = load <4 x i1>, ptr addrspace(4) %in
247 store <4 x i1> %load, ptr addrspace(1) %out
248 ret void
249 }
251 define amdgpu_kernel void @constant_load_v8i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
252 ; GFX6-LABEL: constant_load_v8i1:
253 ; GFX6: ; %bb.0:
254 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
255 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
256 ; GFX6-NEXT: s_mov_b32 s6, -1
257 ; GFX6-NEXT: s_mov_b32 s10, s6
258 ; GFX6-NEXT: s_mov_b32 s11, s7
259 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
260 ; GFX6-NEXT: s_mov_b32 s8, s2
261 ; GFX6-NEXT: s_mov_b32 s9, s3
262 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
263 ; GFX6-NEXT: s_mov_b32 s4, s0
264 ; GFX6-NEXT: s_mov_b32 s5, s1
265 ; GFX6-NEXT: s_waitcnt vmcnt(0)
266 ; GFX6-NEXT: buffer_store_byte v0, off, s[4:7], 0
267 ; GFX6-NEXT: s_endpgm
268 ;
269 ; GFX8-LABEL: constant_load_v8i1:
270 ; GFX8: ; %bb.0:
271 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
272 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
273 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
274 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
275 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
276 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
277 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
278 ; GFX8-NEXT: s_waitcnt vmcnt(0)
279 ; GFX8-NEXT: flat_store_byte v[0:1], v2
280 ; GFX8-NEXT: s_endpgm
281 ;
282 ; EG-LABEL: constant_load_v8i1:
283 ; EG: ; %bb.0:
284 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
285 ; EG-NEXT: TEX 0 @6
286 ; EG-NEXT: ALU 11, @9, KC0[CB0:0-32], KC1[]
287 ; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X
288 ; EG-NEXT: CF_END
289 ; EG-NEXT: PAD
290 ; EG-NEXT: Fetch clause starting at 6:
291 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
292 ; EG-NEXT: ALU clause starting at 8:
293 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
294 ; EG-NEXT: ALU clause starting at 9:
295 ; EG-NEXT: AND_INT T0.W, KC0[2].Y, literal.x,
296 ; EG-NEXT: AND_INT * T1.W, T0.X, literal.y,
297 ; EG-NEXT: 3(4.203895e-45), 255(3.573311e-43)
298 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
299 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
300 ; EG-NEXT: LSHL T0.X, T1.W, PV.W,
301 ; EG-NEXT: LSHL * T0.W, literal.x, PV.W,
302 ; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)
303 ; EG-NEXT: MOV T0.Y, 0.0,
304 ; EG-NEXT: MOV * T0.Z, 0.0,
305 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
306 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
307 %load = load <8 x i1>, ptr addrspace(4) %in
308 store <8 x i1> %load, ptr addrspace(1) %out
309 ret void
310 }
312 define amdgpu_kernel void @constant_load_v16i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
313 ; GFX6-LABEL: constant_load_v16i1:
314 ; GFX6: ; %bb.0:
315 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
316 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
317 ; GFX6-NEXT: s_mov_b32 s6, -1
318 ; GFX6-NEXT: s_mov_b32 s10, s6
319 ; GFX6-NEXT: s_mov_b32 s11, s7
320 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
321 ; GFX6-NEXT: s_mov_b32 s8, s2
322 ; GFX6-NEXT: s_mov_b32 s9, s3
323 ; GFX6-NEXT: buffer_load_ushort v0, off, s[8:11], 0
324 ; GFX6-NEXT: s_mov_b32 s4, s0
325 ; GFX6-NEXT: s_mov_b32 s5, s1
326 ; GFX6-NEXT: s_waitcnt vmcnt(0)
327 ; GFX6-NEXT: buffer_store_short v0, off, s[4:7], 0
328 ; GFX6-NEXT: s_endpgm
329 ;
330 ; GFX8-LABEL: constant_load_v16i1:
331 ; GFX8: ; %bb.0:
332 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
333 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
334 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
335 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
336 ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
337 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
338 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
339 ; GFX8-NEXT: s_waitcnt vmcnt(0)
340 ; GFX8-NEXT: flat_store_short v[0:1], v2
341 ; GFX8-NEXT: s_endpgm
342 ;
343 ; EG-LABEL: constant_load_v16i1:
344 ; EG: ; %bb.0:
345 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
346 ; EG-NEXT: TEX 0 @6
347 ; EG-NEXT: ALU 11, @9, KC0[CB0:0-32], KC1[]
348 ; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X
349 ; EG-NEXT: CF_END
350 ; EG-NEXT: PAD
351 ; EG-NEXT: Fetch clause starting at 6:
352 ; EG-NEXT: VTX_READ_16 T0.X, T0.X, 0, #1
353 ; EG-NEXT: ALU clause starting at 8:
354 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
355 ; EG-NEXT: ALU clause starting at 9:
356 ; EG-NEXT: AND_INT T0.W, KC0[2].Y, literal.x,
357 ; EG-NEXT: AND_INT * T1.W, T0.X, literal.y,
358 ; EG-NEXT: 3(4.203895e-45), 65535(9.183409e-41)
359 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
360 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
361 ; EG-NEXT: LSHL T0.X, T1.W, PV.W,
362 ; EG-NEXT: LSHL * T0.W, literal.x, PV.W,
363 ; EG-NEXT: 65535(9.183409e-41), 0(0.000000e+00)
364 ; EG-NEXT: MOV T0.Y, 0.0,
365 ; EG-NEXT: MOV * T0.Z, 0.0,
366 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
367 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
368 %load = load <16 x i1>, ptr addrspace(4) %in
369 store <16 x i1> %load, ptr addrspace(1) %out
370 ret void
371 }
373 define amdgpu_kernel void @constant_load_v32i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
374 ; GFX6-LABEL: constant_load_v32i1:
375 ; GFX6: ; %bb.0:
376 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
377 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
378 ; GFX6-NEXT: s_load_dword s4, s[2:3], 0x0
379 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
380 ; GFX6-NEXT: s_mov_b32 s2, -1
381 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
382 ; GFX6-NEXT: v_mov_b32_e32 v0, s4
383 ; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0
384 ; GFX6-NEXT: s_endpgm
385 ;
386 ; GFX8-LABEL: constant_load_v32i1:
387 ; GFX8: ; %bb.0:
388 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
389 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
390 ; GFX8-NEXT: s_load_dword s2, s[2:3], 0x0
391 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
392 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
393 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
394 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
395 ; GFX8-NEXT: flat_store_dword v[0:1], v2
396 ; GFX8-NEXT: s_endpgm
397 ;
398 ; EG-LABEL: constant_load_v32i1:
399 ; EG: ; %bb.0:
400 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
401 ; EG-NEXT: TEX 0 @6
402 ; EG-NEXT: ALU 1, @9, KC0[CB0:0-32], KC1[]
403 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
404 ; EG-NEXT: CF_END
405 ; EG-NEXT: PAD
406 ; EG-NEXT: Fetch clause starting at 6:
407 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
408 ; EG-NEXT: ALU clause starting at 8:
409 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
410 ; EG-NEXT: ALU clause starting at 9:
411 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
412 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
413 %load = load <32 x i1>, ptr addrspace(4) %in
414 store <32 x i1> %load, ptr addrspace(1) %out
415 ret void
416 }
418 define amdgpu_kernel void @constant_load_v64i1(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
419 ; GFX6-LABEL: constant_load_v64i1:
420 ; GFX6: ; %bb.0:
421 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
422 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
423 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
424 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
425 ; GFX6-NEXT: s_mov_b32 s2, -1
426 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
427 ; GFX6-NEXT: v_mov_b32_e32 v0, s4
428 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
429 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
430 ; GFX6-NEXT: s_endpgm
431 ;
432 ; GFX8-LABEL: constant_load_v64i1:
433 ; GFX8: ; %bb.0:
434 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
435 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
436 ; GFX8-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
437 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
438 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
439 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
440 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
441 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
442 ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
443 ; GFX8-NEXT: s_endpgm
444 ;
445 ; EG-LABEL: constant_load_v64i1:
446 ; EG: ; %bb.0:
447 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
448 ; EG-NEXT: TEX 0 @6
449 ; EG-NEXT: ALU 1, @9, KC0[CB0:0-32], KC1[]
450 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
451 ; EG-NEXT: CF_END
452 ; EG-NEXT: PAD
453 ; EG-NEXT: Fetch clause starting at 6:
454 ; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #1
455 ; EG-NEXT: ALU clause starting at 8:
456 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
457 ; EG-NEXT: ALU clause starting at 9:
458 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
459 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
460 %load = load <64 x i1>, ptr addrspace(4) %in
461 store <64 x i1> %load, ptr addrspace(1) %out
462 ret void
463 }
465 define amdgpu_kernel void @constant_zextload_i1_to_i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
466 ; GFX6-LABEL: constant_zextload_i1_to_i32:
467 ; GFX6: ; %bb.0:
468 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
469 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
470 ; GFX6-NEXT: s_mov_b32 s6, -1
471 ; GFX6-NEXT: s_mov_b32 s10, s6
472 ; GFX6-NEXT: s_mov_b32 s11, s7
473 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
474 ; GFX6-NEXT: s_mov_b32 s8, s2
475 ; GFX6-NEXT: s_mov_b32 s9, s3
476 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
477 ; GFX6-NEXT: s_mov_b32 s4, s0
478 ; GFX6-NEXT: s_mov_b32 s5, s1
479 ; GFX6-NEXT: s_waitcnt vmcnt(0)
480 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
481 ; GFX6-NEXT: s_endpgm
482 ;
483 ; GFX8-LABEL: constant_zextload_i1_to_i32:
484 ; GFX8: ; %bb.0:
485 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
486 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
487 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
488 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
489 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
490 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
491 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
492 ; GFX8-NEXT: s_waitcnt vmcnt(0)
493 ; GFX8-NEXT: flat_store_dword v[0:1], v2
494 ; GFX8-NEXT: s_endpgm
495 ;
496 ; EG-LABEL: constant_zextload_i1_to_i32:
497 ; EG: ; %bb.0:
498 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
499 ; EG-NEXT: TEX 0 @6
500 ; EG-NEXT: ALU 1, @9, KC0[CB0:0-32], KC1[]
501 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
502 ; EG-NEXT: CF_END
503 ; EG-NEXT: PAD
504 ; EG-NEXT: Fetch clause starting at 6:
505 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
506 ; EG-NEXT: ALU clause starting at 8:
507 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
508 ; EG-NEXT: ALU clause starting at 9:
509 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
510 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
511 %a = load i1, ptr addrspace(4) %in
512 %ext = zext i1 %a to i32
513 store i32 %ext, ptr addrspace(1) %out
514 ret void
515 }
517 define amdgpu_kernel void @constant_sextload_i1_to_i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
518 ; GFX6-LABEL: constant_sextload_i1_to_i32:
519 ; GFX6: ; %bb.0:
520 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
521 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
522 ; GFX6-NEXT: s_mov_b32 s6, -1
523 ; GFX6-NEXT: s_mov_b32 s10, s6
524 ; GFX6-NEXT: s_mov_b32 s11, s7
525 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
526 ; GFX6-NEXT: s_mov_b32 s8, s2
527 ; GFX6-NEXT: s_mov_b32 s9, s3
528 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
529 ; GFX6-NEXT: s_mov_b32 s4, s0
530 ; GFX6-NEXT: s_mov_b32 s5, s1
531 ; GFX6-NEXT: s_waitcnt vmcnt(0)
532 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
533 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
534 ; GFX6-NEXT: s_endpgm
535 ;
536 ; GFX8-LABEL: constant_sextload_i1_to_i32:
537 ; GFX8: ; %bb.0:
538 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
539 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
540 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
541 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
542 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
543 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
544 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
545 ; GFX8-NEXT: s_waitcnt vmcnt(0)
546 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
547 ; GFX8-NEXT: flat_store_dword v[0:1], v2
548 ; GFX8-NEXT: s_endpgm
549 ;
550 ; EG-LABEL: constant_sextload_i1_to_i32:
551 ; EG: ; %bb.0:
552 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
553 ; EG-NEXT: TEX 0 @6
554 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
555 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
556 ; EG-NEXT: CF_END
557 ; EG-NEXT: PAD
558 ; EG-NEXT: Fetch clause starting at 6:
559 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
560 ; EG-NEXT: ALU clause starting at 8:
561 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
562 ; EG-NEXT: ALU clause starting at 9:
563 ; EG-NEXT: BFE_INT T0.X, T0.X, 0.0, 1,
564 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
565 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
566 %a = load i1, ptr addrspace(4) %in
567 %ext = sext i1 %a to i32
568 store i32 %ext, ptr addrspace(1) %out
569 ret void
570 }
572 define amdgpu_kernel void @constant_zextload_v1i1_to_v1i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
573 ; GFX6-LABEL: constant_zextload_v1i1_to_v1i32:
574 ; GFX6: ; %bb.0:
575 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
576 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
577 ; GFX6-NEXT: s_mov_b32 s6, -1
578 ; GFX6-NEXT: s_mov_b32 s10, s6
579 ; GFX6-NEXT: s_mov_b32 s11, s7
580 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
581 ; GFX6-NEXT: s_mov_b32 s8, s2
582 ; GFX6-NEXT: s_mov_b32 s9, s3
583 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
584 ; GFX6-NEXT: s_mov_b32 s4, s0
585 ; GFX6-NEXT: s_mov_b32 s5, s1
586 ; GFX6-NEXT: s_waitcnt vmcnt(0)
587 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
588 ; GFX6-NEXT: s_endpgm
589 ;
590 ; GFX8-LABEL: constant_zextload_v1i1_to_v1i32:
591 ; GFX8: ; %bb.0:
592 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
593 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
594 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
595 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
596 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
597 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
598 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
599 ; GFX8-NEXT: s_waitcnt vmcnt(0)
600 ; GFX8-NEXT: flat_store_dword v[0:1], v2
601 ; GFX8-NEXT: s_endpgm
602 ;
603 ; EG-LABEL: constant_zextload_v1i1_to_v1i32:
604 ; EG: ; %bb.0:
605 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
606 ; EG-NEXT: TEX 0 @6
607 ; EG-NEXT: ALU 1, @9, KC0[CB0:0-32], KC1[]
608 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
609 ; EG-NEXT: CF_END
610 ; EG-NEXT: PAD
611 ; EG-NEXT: Fetch clause starting at 6:
612 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
613 ; EG-NEXT: ALU clause starting at 8:
614 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
615 ; EG-NEXT: ALU clause starting at 9:
616 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
617 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
618 %load = load <1 x i1>, ptr addrspace(4) %in
619 %ext = zext <1 x i1> %load to <1 x i32>
620 store <1 x i32> %ext, ptr addrspace(1) %out
621 ret void
622 }
624 define amdgpu_kernel void @constant_sextload_v1i1_to_v1i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
625 ; GFX6-LABEL: constant_sextload_v1i1_to_v1i32:
626 ; GFX6: ; %bb.0:
627 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
628 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
629 ; GFX6-NEXT: s_mov_b32 s6, -1
630 ; GFX6-NEXT: s_mov_b32 s10, s6
631 ; GFX6-NEXT: s_mov_b32 s11, s7
632 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
633 ; GFX6-NEXT: s_mov_b32 s8, s2
634 ; GFX6-NEXT: s_mov_b32 s9, s3
635 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
636 ; GFX6-NEXT: s_mov_b32 s4, s0
637 ; GFX6-NEXT: s_mov_b32 s5, s1
638 ; GFX6-NEXT: s_waitcnt vmcnt(0)
639 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
640 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
641 ; GFX6-NEXT: s_endpgm
642 ;
643 ; GFX8-LABEL: constant_sextload_v1i1_to_v1i32:
644 ; GFX8: ; %bb.0:
645 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
646 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
647 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
648 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
649 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
650 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
651 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
652 ; GFX8-NEXT: s_waitcnt vmcnt(0)
653 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
654 ; GFX8-NEXT: flat_store_dword v[0:1], v2
655 ; GFX8-NEXT: s_endpgm
656 ;
657 ; EG-LABEL: constant_sextload_v1i1_to_v1i32:
658 ; EG: ; %bb.0:
659 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
660 ; EG-NEXT: TEX 0 @6
661 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
662 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
663 ; EG-NEXT: CF_END
664 ; EG-NEXT: PAD
665 ; EG-NEXT: Fetch clause starting at 6:
666 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
667 ; EG-NEXT: ALU clause starting at 8:
668 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
669 ; EG-NEXT: ALU clause starting at 9:
670 ; EG-NEXT: BFE_INT T0.X, T0.X, 0.0, 1,
671 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
672 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
673 %load = load <1 x i1>, ptr addrspace(4) %in
674 %ext = sext <1 x i1> %load to <1 x i32>
675 store <1 x i32> %ext, ptr addrspace(1) %out
676 ret void
677 }
679 define amdgpu_kernel void @constant_zextload_v2i1_to_v2i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
680 ; GFX6-LABEL: constant_zextload_v2i1_to_v2i32:
681 ; GFX6: ; %bb.0:
682 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
683 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
684 ; GFX6-NEXT: s_mov_b32 s6, -1
685 ; GFX6-NEXT: s_mov_b32 s10, s6
686 ; GFX6-NEXT: s_mov_b32 s11, s7
687 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
688 ; GFX6-NEXT: s_mov_b32 s8, s2
689 ; GFX6-NEXT: s_mov_b32 s9, s3
690 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
691 ; GFX6-NEXT: s_mov_b32 s4, s0
692 ; GFX6-NEXT: s_mov_b32 s5, s1
693 ; GFX6-NEXT: s_waitcnt vmcnt(0)
694 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 1, v0
695 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
696 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
697 ; GFX6-NEXT: s_endpgm
698 ;
699 ; GFX8-LABEL: constant_zextload_v2i1_to_v2i32:
700 ; GFX8: ; %bb.0:
701 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
702 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
703 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
704 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
705 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
706 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
707 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
708 ; GFX8-NEXT: s_waitcnt vmcnt(0)
709 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v2
710 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 1, v2
711 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v4
712 ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
713 ; GFX8-NEXT: s_endpgm
714 ;
715 ; EG-LABEL: constant_zextload_v2i1_to_v2i32:
716 ; EG: ; %bb.0:
717 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
718 ; EG-NEXT: TEX 0 @6
719 ; EG-NEXT: ALU 3, @9, KC0[CB0:0-32], KC1[]
720 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
721 ; EG-NEXT: CF_END
722 ; EG-NEXT: PAD
723 ; EG-NEXT: Fetch clause starting at 6:
724 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
725 ; EG-NEXT: ALU clause starting at 8:
726 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
727 ; EG-NEXT: ALU clause starting at 9:
728 ; EG-NEXT: BFE_UINT * T0.Y, T0.X, 1, 1,
729 ; EG-NEXT: AND_INT T0.X, T0.X, 1,
730 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
731 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
732 %load = load <2 x i1>, ptr addrspace(4) %in
733 %ext = zext <2 x i1> %load to <2 x i32>
734 store <2 x i32> %ext, ptr addrspace(1) %out
735 ret void
736 }
738 define amdgpu_kernel void @constant_sextload_v2i1_to_v2i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
739 ; GFX6-LABEL: constant_sextload_v2i1_to_v2i32:
740 ; GFX6: ; %bb.0:
741 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
742 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
743 ; GFX6-NEXT: s_mov_b32 s6, -1
744 ; GFX6-NEXT: s_mov_b32 s10, s6
745 ; GFX6-NEXT: s_mov_b32 s11, s7
746 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
747 ; GFX6-NEXT: s_mov_b32 s8, s2
748 ; GFX6-NEXT: s_mov_b32 s9, s3
749 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
750 ; GFX6-NEXT: s_mov_b32 s4, s0
751 ; GFX6-NEXT: s_mov_b32 s5, s1
752 ; GFX6-NEXT: s_waitcnt vmcnt(0)
753 ; GFX6-NEXT: v_bfe_i32 v1, v0, 1, 1
754 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
755 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
756 ; GFX6-NEXT: s_endpgm
757 ;
758 ; GFX8-LABEL: constant_sextload_v2i1_to_v2i32:
759 ; GFX8: ; %bb.0:
760 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
761 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
762 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
763 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
764 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
765 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
766 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
767 ; GFX8-NEXT: s_waitcnt vmcnt(0)
768 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 1, v2
769 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
770 ; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 1
771 ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
772 ; GFX8-NEXT: s_endpgm
773 ;
774 ; EG-LABEL: constant_sextload_v2i1_to_v2i32:
775 ; EG: ; %bb.0:
776 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
777 ; EG-NEXT: TEX 0 @6
778 ; EG-NEXT: ALU 4, @9, KC0[CB0:0-32], KC1[]
779 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XY, T0.X, 1
780 ; EG-NEXT: CF_END
781 ; EG-NEXT: PAD
782 ; EG-NEXT: Fetch clause starting at 6:
783 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
784 ; EG-NEXT: ALU clause starting at 8:
785 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
786 ; EG-NEXT: ALU clause starting at 9:
787 ; EG-NEXT: BFE_INT T1.X, T0.X, 0.0, 1,
788 ; EG-NEXT: LSHR T0.W, T0.X, 1,
789 ; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,
790 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
791 ; EG-NEXT: BFE_INT * T1.Y, PV.W, 0.0, 1,
792 %load = load <2 x i1>, ptr addrspace(4) %in
793 %ext = sext <2 x i1> %load to <2 x i32>
794 store <2 x i32> %ext, ptr addrspace(1) %out
795 ret void
796 }
798 define amdgpu_kernel void @constant_zextload_v3i1_to_v3i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
799 ; GFX6-LABEL: constant_zextload_v3i1_to_v3i32:
800 ; GFX6: ; %bb.0:
801 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
802 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
803 ; GFX6-NEXT: s_mov_b32 s6, -1
804 ; GFX6-NEXT: s_mov_b32 s10, s6
805 ; GFX6-NEXT: s_mov_b32 s11, s7
806 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
807 ; GFX6-NEXT: s_mov_b32 s8, s2
808 ; GFX6-NEXT: s_mov_b32 s9, s3
809 ; GFX6-NEXT: buffer_load_ubyte v2, off, s[8:11], 0
810 ; GFX6-NEXT: s_mov_b32 s4, s0
811 ; GFX6-NEXT: s_mov_b32 s5, s1
812 ; GFX6-NEXT: s_waitcnt vmcnt(0)
813 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v2
814 ; GFX6-NEXT: v_bfe_u32 v1, v2, 1, 1
815 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 2, v2
816 ; GFX6-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:8
817 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
818 ; GFX6-NEXT: s_endpgm
819 ;
820 ; GFX8-LABEL: constant_zextload_v3i1_to_v3i32:
821 ; GFX8: ; %bb.0:
822 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
823 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
824 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
825 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
826 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
827 ; GFX8-NEXT: v_mov_b32_e32 v3, s0
828 ; GFX8-NEXT: v_mov_b32_e32 v4, s1
829 ; GFX8-NEXT: s_waitcnt vmcnt(0)
830 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v0
831 ; GFX8-NEXT: v_and_b32_e32 v5, 1, v0
832 ; GFX8-NEXT: v_and_b32_e32 v1, 1, v1
833 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 2, v0
834 ; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v5
835 ; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v1
836 ; GFX8-NEXT: flat_store_dwordx3 v[3:4], v[0:2]
837 ; GFX8-NEXT: s_endpgm
838 ;
839 ; EG-LABEL: constant_zextload_v3i1_to_v3i32:
840 ; EG: ; %bb.0:
841 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
842 ; EG-NEXT: TEX 0 @6
843 ; EG-NEXT: ALU 8, @9, KC0[CB0:0-32], KC1[]
844 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T3.X, 0
845 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XY, T2.X, 1
846 ; EG-NEXT: CF_END
847 ; EG-NEXT: Fetch clause starting at 6:
848 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
849 ; EG-NEXT: ALU clause starting at 8:
850 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
851 ; EG-NEXT: ALU clause starting at 9:
852 ; EG-NEXT: BFE_UINT * T1.Y, T0.X, 1, 1,
853 ; EG-NEXT: AND_INT T1.X, T0.X, 1,
854 ; EG-NEXT: LSHR * T2.X, KC0[2].Y, literal.x,
855 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
856 ; EG-NEXT: LSHR T0.X, T0.X, literal.x,
857 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
858 ; EG-NEXT: 2(2.802597e-45), 8(1.121039e-44)
859 ; EG-NEXT: LSHR * T3.X, PV.W, literal.x,
860 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
861 %load = load <3 x i1>, ptr addrspace(4) %in
862 %ext = zext <3 x i1> %load to <3 x i32>
863 store <3 x i32> %ext, ptr addrspace(1) %out
864 ret void
865 }
867 define amdgpu_kernel void @constant_sextload_v3i1_to_v3i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
868 ; GFX6-LABEL: constant_sextload_v3i1_to_v3i32:
869 ; GFX6: ; %bb.0:
870 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
871 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
872 ; GFX6-NEXT: s_mov_b32 s6, -1
873 ; GFX6-NEXT: s_mov_b32 s10, s6
874 ; GFX6-NEXT: s_mov_b32 s11, s7
875 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
876 ; GFX6-NEXT: s_mov_b32 s8, s2
877 ; GFX6-NEXT: s_mov_b32 s9, s3
878 ; GFX6-NEXT: buffer_load_ubyte v2, off, s[8:11], 0
879 ; GFX6-NEXT: s_mov_b32 s4, s0
880 ; GFX6-NEXT: s_mov_b32 s5, s1
881 ; GFX6-NEXT: s_waitcnt vmcnt(0)
882 ; GFX6-NEXT: v_bfe_i32 v1, v2, 1, 1
883 ; GFX6-NEXT: v_bfe_i32 v0, v2, 0, 1
884 ; GFX6-NEXT: v_bfe_i32 v2, v2, 2, 1
885 ; GFX6-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:8
886 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
887 ; GFX6-NEXT: s_endpgm
888 ;
889 ; GFX8-LABEL: constant_sextload_v3i1_to_v3i32:
890 ; GFX8: ; %bb.0:
891 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
892 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
893 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
894 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
895 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
896 ; GFX8-NEXT: v_mov_b32_e32 v3, s0
897 ; GFX8-NEXT: v_mov_b32_e32 v4, s1
898 ; GFX8-NEXT: s_waitcnt vmcnt(0)
899 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v0
900 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 2, v0
901 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
902 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
903 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 1
904 ; GFX8-NEXT: flat_store_dwordx3 v[3:4], v[0:2]
905 ; GFX8-NEXT: s_endpgm
906 ;
907 ; EG-LABEL: constant_sextload_v3i1_to_v3i32:
908 ; EG: ; %bb.0:
909 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
910 ; EG-NEXT: TEX 0 @6
911 ; EG-NEXT: ALU 10, @9, KC0[CB0:0-32], KC1[]
912 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.X, T0.X, 0
913 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T3.XY, T1.X, 1
914 ; EG-NEXT: CF_END
915 ; EG-NEXT: Fetch clause starting at 6:
916 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
917 ; EG-NEXT: ALU clause starting at 8:
918 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
919 ; EG-NEXT: ALU clause starting at 9:
920 ; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,
921 ; EG-NEXT: LSHR * T0.W, T0.X, literal.x,
922 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
923 ; EG-NEXT: BFE_INT * T2.X, PV.W, 0.0, 1,
924 ; EG-NEXT: BFE_INT T3.X, T0.X, 0.0, 1,
925 ; EG-NEXT: LSHR T0.W, T0.X, 1,
926 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.x,
927 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
928 ; EG-NEXT: LSHR T0.X, PS, literal.x,
929 ; EG-NEXT: BFE_INT * T3.Y, PV.W, 0.0, 1,
930 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
931 %load = load <3 x i1>, ptr addrspace(4) %in
932 %ext = sext <3 x i1> %load to <3 x i32>
933 store <3 x i32> %ext, ptr addrspace(1) %out
934 ret void
935 }
937 define amdgpu_kernel void @constant_zextload_v4i1_to_v4i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
938 ; GFX6-LABEL: constant_zextload_v4i1_to_v4i32:
939 ; GFX6: ; %bb.0:
940 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
941 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
942 ; GFX6-NEXT: s_mov_b32 s6, -1
943 ; GFX6-NEXT: s_mov_b32 s10, s6
944 ; GFX6-NEXT: s_mov_b32 s11, s7
945 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
946 ; GFX6-NEXT: s_mov_b32 s8, s2
947 ; GFX6-NEXT: s_mov_b32 s9, s3
948 ; GFX6-NEXT: buffer_load_ubyte v1, off, s[8:11], 0
949 ; GFX6-NEXT: s_mov_b32 s4, s0
950 ; GFX6-NEXT: s_mov_b32 s5, s1
951 ; GFX6-NEXT: s_waitcnt vmcnt(0)
952 ; GFX6-NEXT: v_lshrrev_b32_e32 v3, 3, v1
953 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v1
954 ; GFX6-NEXT: v_bfe_u32 v2, v1, 2, 1
955 ; GFX6-NEXT: v_bfe_u32 v1, v1, 1, 1
956 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
957 ; GFX6-NEXT: s_endpgm
958 ;
959 ; GFX8-LABEL: constant_zextload_v4i1_to_v4i32:
960 ; GFX8: ; %bb.0:
961 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
962 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
963 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
964 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
965 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
966 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
967 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
968 ; GFX8-NEXT: s_waitcnt vmcnt(0)
969 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v0
970 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 2, v0
971 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v0
972 ; GFX8-NEXT: v_and_b32_e32 v1, 1, v1
973 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
974 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 3, v0
975 ; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v6
976 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2
977 ; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v1
978 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
979 ; GFX8-NEXT: s_endpgm
980 ;
981 ; EG-LABEL: constant_zextload_v4i1_to_v4i32:
982 ; EG: ; %bb.0:
983 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
984 ; EG-NEXT: TEX 0 @6
985 ; EG-NEXT: ALU 7, @9, KC0[CB0:0-32], KC1[]
986 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
987 ; EG-NEXT: CF_END
988 ; EG-NEXT: PAD
989 ; EG-NEXT: Fetch clause starting at 6:
990 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
991 ; EG-NEXT: ALU clause starting at 8:
992 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
993 ; EG-NEXT: ALU clause starting at 9:
994 ; EG-NEXT: BFE_UINT * T0.W, T0.X, literal.x, 1,
995 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
996 ; EG-NEXT: BFE_UINT * T0.Z, T0.X, literal.x, 1,
997 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
998 ; EG-NEXT: BFE_UINT * T0.Y, T0.X, 1, 1,
999 ; EG-NEXT: AND_INT T0.X, T0.X, 1,
1000 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
1001 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1002 %load = load <4 x i1>, ptr addrspace(4) %in
1003 %ext = zext <4 x i1> %load to <4 x i32>
1004 store <4 x i32> %ext, ptr addrspace(1) %out
1005 ret void
1006 }
1008 define amdgpu_kernel void @constant_sextload_v4i1_to_v4i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
1009 ; GFX6-LABEL: constant_sextload_v4i1_to_v4i32:
1010 ; GFX6: ; %bb.0:
1011 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1012 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
1013 ; GFX6-NEXT: s_mov_b32 s6, -1
1014 ; GFX6-NEXT: s_mov_b32 s10, s6
1015 ; GFX6-NEXT: s_mov_b32 s11, s7
1016 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1017 ; GFX6-NEXT: s_mov_b32 s8, s2
1018 ; GFX6-NEXT: s_mov_b32 s9, s3
1019 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
1020 ; GFX6-NEXT: s_mov_b32 s4, s0
1021 ; GFX6-NEXT: s_mov_b32 s5, s1
1022 ; GFX6-NEXT: s_waitcnt vmcnt(0)
1023 ; GFX6-NEXT: v_bfe_i32 v3, v0, 3, 1
1024 ; GFX6-NEXT: v_bfe_i32 v2, v0, 2, 1
1025 ; GFX6-NEXT: v_bfe_i32 v1, v0, 1, 1
1026 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
1027 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1028 ; GFX6-NEXT: s_endpgm
1029 ;
1030 ; GFX8-LABEL: constant_sextload_v4i1_to_v4i32:
1031 ; GFX8: ; %bb.0:
1032 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1033 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
1034 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
1035 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
1036 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
1037 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
1038 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
1039 ; GFX8-NEXT: s_waitcnt vmcnt(0)
1040 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v0
1041 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 2, v0
1042 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 3, v0
1043 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
1044 ; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 1
1045 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
1046 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 1
1047 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1048 ; GFX8-NEXT: s_endpgm
1049 ;
1050 ; EG-LABEL: constant_sextload_v4i1_to_v4i32:
1051 ; EG: ; %bb.0:
1052 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1053 ; EG-NEXT: TEX 0 @6
1054 ; EG-NEXT: ALU 10, @9, KC0[CB0:0-32], KC1[]
1055 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
1056 ; EG-NEXT: CF_END
1057 ; EG-NEXT: PAD
1058 ; EG-NEXT: Fetch clause starting at 6:
1059 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
1060 ; EG-NEXT: ALU clause starting at 8:
1061 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1062 ; EG-NEXT: ALU clause starting at 9:
1063 ; EG-NEXT: BFE_INT T1.X, T0.X, 0.0, 1,
1064 ; EG-NEXT: LSHR * T0.W, T0.X, literal.x,
1065 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
1066 ; EG-NEXT: BFE_INT T1.W, PV.W, 0.0, 1,
1067 ; EG-NEXT: LSHR * T0.W, T0.X, literal.x,
1068 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1069 ; EG-NEXT: BFE_INT T1.Z, PS, 0.0, 1,
1070 ; EG-NEXT: LSHR * T0.W, T0.X, 1,
1071 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
1072 ; EG-NEXT: BFE_INT * T1.Y, PV.W, 0.0, 1,
1073 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1074 %load = load <4 x i1>, ptr addrspace(4) %in
1075 %ext = sext <4 x i1> %load to <4 x i32>
1076 store <4 x i32> %ext, ptr addrspace(1) %out
1077 ret void
1078 }
1080 define amdgpu_kernel void @constant_zextload_v8i1_to_v8i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
1081 ; GFX6-LABEL: constant_zextload_v8i1_to_v8i32:
1082 ; GFX6: ; %bb.0:
1083 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1084 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
1085 ; GFX6-NEXT: s_mov_b32 s6, -1
1086 ; GFX6-NEXT: s_mov_b32 s10, s6
1087 ; GFX6-NEXT: s_mov_b32 s11, s7
1088 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1089 ; GFX6-NEXT: s_mov_b32 s8, s2
1090 ; GFX6-NEXT: s_mov_b32 s9, s3
1091 ; GFX6-NEXT: buffer_load_ubyte v4, off, s[8:11], 0
1092 ; GFX6-NEXT: s_mov_b32 s4, s0
1093 ; GFX6-NEXT: s_mov_b32 s5, s1
1094 ; GFX6-NEXT: s_waitcnt vmcnt(0)
1095 ; GFX6-NEXT: v_bfe_u32 v3, v4, 3, 1
1096 ; GFX6-NEXT: v_bfe_u32 v1, v4, 1, 1
1097 ; GFX6-NEXT: v_lshrrev_b32_e32 v7, 7, v4
1098 ; GFX6-NEXT: v_bfe_u32 v5, v4, 5, 1
1099 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v4
1100 ; GFX6-NEXT: v_bfe_u32 v2, v4, 2, 1
1101 ; GFX6-NEXT: v_bfe_u32 v6, v4, 6, 1
1102 ; GFX6-NEXT: v_bfe_u32 v4, v4, 4, 1
1103 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16
1104 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1105 ; GFX6-NEXT: s_endpgm
1106 ;
1107 ; GFX8-LABEL: constant_zextload_v8i1_to_v8i32:
1108 ; GFX8: ; %bb.0:
1109 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1110 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
1111 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
1112 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
1113 ; GFX8-NEXT: flat_load_ubyte v1, v[0:1]
1114 ; GFX8-NEXT: s_add_u32 s2, s0, 16
1115 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1116 ; GFX8-NEXT: v_mov_b32_e32 v11, s3
1117 ; GFX8-NEXT: v_mov_b32_e32 v9, s1
1118 ; GFX8-NEXT: v_mov_b32_e32 v10, s2
1119 ; GFX8-NEXT: v_mov_b32_e32 v8, s0
1120 ; GFX8-NEXT: s_waitcnt vmcnt(0)
1121 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 5, v1
1122 ; GFX8-NEXT: v_lshrrev_b16_e32 v5, 1, v1
1123 ; GFX8-NEXT: v_lshrrev_b16_e32 v12, 3, v1
1124 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 4, v1
1125 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 6, v1
1126 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 2, v1
1127 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v1
1128 ; GFX8-NEXT: v_lshrrev_b16_e32 v7, 7, v1
1129 ; GFX8-NEXT: v_and_b32_e32 v13, 1, v2
1130 ; GFX8-NEXT: v_and_b32_e32 v1, 1, v5
1131 ; GFX8-NEXT: v_and_b32_e32 v5, 1, v12
1132 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v6
1133 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v4
1134 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v3
1135 ; GFX8-NEXT: v_and_b32_e32 v3, 0xffff, v5
1136 ; GFX8-NEXT: v_and_b32_e32 v5, 0xffff, v13
1137 ; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v1
1138 ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
1139 ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
1140 ; GFX8-NEXT: s_endpgm
1141 ;
1142 ; EG-LABEL: constant_zextload_v8i1_to_v8i32:
1143 ; EG: ; %bb.0:
1144 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1145 ; EG-NEXT: TEX 0 @6
1146 ; EG-NEXT: ALU 17, @9, KC0[CB0:0-32], KC1[]
1147 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T8.X, 0
1148 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T7.X, 1
1149 ; EG-NEXT: CF_END
1150 ; EG-NEXT: Fetch clause starting at 6:
1151 ; EG-NEXT: VTX_READ_8 T5.X, T5.X, 0, #1
1152 ; EG-NEXT: ALU clause starting at 8:
1153 ; EG-NEXT: MOV * T5.X, KC0[2].Z,
1154 ; EG-NEXT: ALU clause starting at 9:
1155 ; EG-NEXT: BFE_UINT * T6.W, T5.X, literal.x, 1,
1156 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
1157 ; EG-NEXT: BFE_UINT * T6.Z, T5.X, literal.x, 1,
1158 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1159 ; EG-NEXT: BFE_UINT T6.Y, T5.X, 1, 1,
1160 ; EG-NEXT: BFE_UINT * T5.W, T5.X, literal.x, 1,
1161 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
1162 ; EG-NEXT: AND_INT T6.X, T5.X, 1,
1163 ; EG-NEXT: BFE_UINT T5.Z, T5.X, literal.x, 1,
1164 ; EG-NEXT: LSHR * T7.X, KC0[2].Y, literal.y,
1165 ; EG-NEXT: 6(8.407791e-45), 2(2.802597e-45)
1166 ; EG-NEXT: BFE_UINT * T5.Y, T5.X, literal.x, 1,
1167 ; EG-NEXT: 5(7.006492e-45), 0(0.000000e+00)
1168 ; EG-NEXT: BFE_UINT T5.X, T5.X, literal.x, 1,
1169 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
1170 ; EG-NEXT: 4(5.605194e-45), 16(2.242078e-44)
1171 ; EG-NEXT: LSHR * T8.X, PV.W, literal.x,
1172 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1173 %load = load <8 x i1>, ptr addrspace(4) %in
1174 %ext = zext <8 x i1> %load to <8 x i32>
1175 store <8 x i32> %ext, ptr addrspace(1) %out
1176 ret void
1177 }
1179 define amdgpu_kernel void @constant_sextload_v8i1_to_v8i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
1180 ; GFX6-LABEL: constant_sextload_v8i1_to_v8i32:
1181 ; GFX6: ; %bb.0:
1182 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1183 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
1184 ; GFX6-NEXT: s_mov_b32 s6, -1
1185 ; GFX6-NEXT: s_mov_b32 s10, s6
1186 ; GFX6-NEXT: s_mov_b32 s11, s7
1187 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1188 ; GFX6-NEXT: s_mov_b32 s8, s2
1189 ; GFX6-NEXT: s_mov_b32 s9, s3
1190 ; GFX6-NEXT: buffer_load_ubyte v4, off, s[8:11], 0
1191 ; GFX6-NEXT: s_mov_b32 s4, s0
1192 ; GFX6-NEXT: s_mov_b32 s5, s1
1193 ; GFX6-NEXT: s_waitcnt vmcnt(0)
1194 ; GFX6-NEXT: v_bfe_i32 v3, v4, 3, 1
1195 ; GFX6-NEXT: v_bfe_i32 v2, v4, 2, 1
1196 ; GFX6-NEXT: v_bfe_i32 v1, v4, 1, 1
1197 ; GFX6-NEXT: v_bfe_i32 v0, v4, 0, 1
1198 ; GFX6-NEXT: v_bfe_i32 v7, v4, 7, 1
1199 ; GFX6-NEXT: v_bfe_i32 v6, v4, 6, 1
1200 ; GFX6-NEXT: v_bfe_i32 v5, v4, 5, 1
1201 ; GFX6-NEXT: v_bfe_i32 v4, v4, 4, 1
1202 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16
1203 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1204 ; GFX6-NEXT: s_endpgm
1205 ;
1206 ; GFX8-LABEL: constant_sextload_v8i1_to_v8i32:
1207 ; GFX8: ; %bb.0:
1208 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1209 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
1210 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
1211 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
1212 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
1213 ; GFX8-NEXT: s_add_u32 s2, s0, 16
1214 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1215 ; GFX8-NEXT: v_mov_b32_e32 v11, s3
1216 ; GFX8-NEXT: v_mov_b32_e32 v9, s1
1217 ; GFX8-NEXT: v_mov_b32_e32 v10, s2
1218 ; GFX8-NEXT: v_mov_b32_e32 v8, s0
1219 ; GFX8-NEXT: s_waitcnt vmcnt(0)
1220 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 4, v0
1221 ; GFX8-NEXT: v_lshrrev_b16_e32 v5, 5, v0
1222 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 6, v0
1223 ; GFX8-NEXT: v_lshrrev_b16_e32 v7, 7, v0
1224 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v0
1225 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 2, v0
1226 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 3, v0
1227 ; GFX8-NEXT: v_bfe_i32 v7, v7, 0, 1
1228 ; GFX8-NEXT: v_bfe_i32 v6, v6, 0, 1
1229 ; GFX8-NEXT: v_bfe_i32 v5, v5, 0, 1
1230 ; GFX8-NEXT: v_bfe_i32 v4, v4, 0, 1
1231 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
1232 ; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 1
1233 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
1234 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 1
1235 ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
1236 ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
1237 ; GFX8-NEXT: s_endpgm
1238 ;
1239 ; EG-LABEL: constant_sextload_v8i1_to_v8i32:
1240 ; EG: ; %bb.0:
1241 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1242 ; EG-NEXT: TEX 0 @6
1243 ; EG-NEXT: ALU 23, @9, KC0[CB0:0-32], KC1[]
1244 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T5.X, 0
1245 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T8.X, 1
1246 ; EG-NEXT: CF_END
1247 ; EG-NEXT: Fetch clause starting at 6:
1248 ; EG-NEXT: VTX_READ_8 T5.X, T5.X, 0, #1
1249 ; EG-NEXT: ALU clause starting at 8:
1250 ; EG-NEXT: MOV * T5.X, KC0[2].Z,
1251 ; EG-NEXT: ALU clause starting at 9:
1252 ; EG-NEXT: LSHR * T0.W, T5.X, literal.x,
1253 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
1254 ; EG-NEXT: BFE_INT T6.W, PV.W, 0.0, 1,
1255 ; EG-NEXT: LSHR * T0.W, T5.X, literal.x,
1256 ; EG-NEXT: 6(8.407791e-45), 0(0.000000e+00)
1257 ; EG-NEXT: BFE_INT T7.X, T5.X, 0.0, 1,
1258 ; EG-NEXT: BFE_INT T6.Z, PS, 0.0, 1,
1259 ; EG-NEXT: LSHR T0.W, T5.X, literal.x,
1260 ; EG-NEXT: LSHR * T1.W, T5.X, literal.y,
1261 ; EG-NEXT: 3(4.203895e-45), 5(7.006492e-45)
1262 ; EG-NEXT: LSHR T8.X, KC0[2].Y, literal.x,
1263 ; EG-NEXT: BFE_INT T6.Y, PS, 0.0, 1,
1264 ; EG-NEXT: LSHR T0.Z, T5.X, literal.x,
1265 ; EG-NEXT: BFE_INT T7.W, PV.W, 0.0, 1,
1266 ; EG-NEXT: LSHR * T0.W, T5.X, literal.y,
1267 ; EG-NEXT: 2(2.802597e-45), 4(5.605194e-45)
1268 ; EG-NEXT: BFE_INT T6.X, PS, 0.0, 1,
1269 ; EG-NEXT: BFE_INT T7.Z, PV.Z, 0.0, 1,
1270 ; EG-NEXT: LSHR T0.W, T5.X, 1,
1271 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.x,
1272 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1273 ; EG-NEXT: LSHR T5.X, PS, literal.x,
1274 ; EG-NEXT: BFE_INT * T7.Y, PV.W, 0.0, 1,
1275 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1276 %load = load <8 x i1>, ptr addrspace(4) %in
1277 %ext = sext <8 x i1> %load to <8 x i32>
1278 store <8 x i32> %ext, ptr addrspace(1) %out
1279 ret void
1280 }
1282 define amdgpu_kernel void @constant_zextload_v16i1_to_v16i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
1283 ; GFX6-LABEL: constant_zextload_v16i1_to_v16i32:
1284 ; GFX6: ; %bb.0:
1285 ; GFX6-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1286 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
1287 ; GFX6-NEXT: s_mov_b32 s2, -1
1288 ; GFX6-NEXT: s_mov_b32 s10, s2
1289 ; GFX6-NEXT: s_mov_b32 s11, s3
1290 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1291 ; GFX6-NEXT: s_mov_b32 s8, s6
1292 ; GFX6-NEXT: s_mov_b32 s9, s7
1293 ; GFX6-NEXT: buffer_load_ushort v12, off, s[8:11], 0
1294 ; GFX6-NEXT: s_mov_b32 s0, s4
1295 ; GFX6-NEXT: s_mov_b32 s1, s5
1296 ; GFX6-NEXT: s_waitcnt vmcnt(0)
1297 ; GFX6-NEXT: v_bfe_u32 v3, v12, 3, 1
1298 ; GFX6-NEXT: v_bfe_u32 v1, v12, 1, 1
1299 ; GFX6-NEXT: v_bfe_u32 v7, v12, 7, 1
1300 ; GFX6-NEXT: v_bfe_u32 v5, v12, 5, 1
1301 ; GFX6-NEXT: v_bfe_u32 v11, v12, 11, 1
1302 ; GFX6-NEXT: v_bfe_u32 v9, v12, 9, 1
1303 ; GFX6-NEXT: v_lshrrev_b32_e32 v15, 15, v12
1304 ; GFX6-NEXT: v_bfe_u32 v13, v12, 13, 1
1305 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v12
1306 ; GFX6-NEXT: v_bfe_u32 v2, v12, 2, 1
1307 ; GFX6-NEXT: v_bfe_u32 v6, v12, 6, 1
1308 ; GFX6-NEXT: v_bfe_u32 v4, v12, 4, 1
1309 ; GFX6-NEXT: v_bfe_u32 v10, v12, 10, 1
1310 ; GFX6-NEXT: v_bfe_u32 v8, v12, 8, 1
1311 ; GFX6-NEXT: v_bfe_u32 v14, v12, 14, 1
1312 ; GFX6-NEXT: v_bfe_u32 v12, v12, 12, 1
1313 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
1314 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
1315 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
1316 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1317 ; GFX6-NEXT: s_endpgm
1318 ;
1319 ; GFX8-LABEL: constant_zextload_v16i1_to_v16i32:
1320 ; GFX8: ; %bb.0:
1321 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1322 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
1323 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
1324 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
1325 ; GFX8-NEXT: flat_load_ushort v1, v[0:1]
1326 ; GFX8-NEXT: s_add_u32 s2, s0, 48
1327 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1328 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
1329 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
1330 ; GFX8-NEXT: s_add_u32 s2, s0, 32
1331 ; GFX8-NEXT: v_mov_b32_e32 v0, 1
1332 ; GFX8-NEXT: v_mov_b32_e32 v17, s1
1333 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1334 ; GFX8-NEXT: v_mov_b32_e32 v16, s0
1335 ; GFX8-NEXT: s_add_u32 s0, s0, 16
1336 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
1337 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
1338 ; GFX8-NEXT: v_mov_b32_e32 v23, s1
1339 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
1340 ; GFX8-NEXT: v_mov_b32_e32 v22, s0
1341 ; GFX8-NEXT: s_waitcnt vmcnt(0)
1342 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 12, v1
1343 ; GFX8-NEXT: v_lshrrev_b16_e32 v8, 3, v1
1344 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v8
1345 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v3
1346 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 1, v1
1347 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v3
1348 ; GFX8-NEXT: v_and_b32_e32 v13, 0xffff, v3
1349 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 7, v1
1350 ; GFX8-NEXT: v_lshrrev_b16_e32 v7, 14, v1
1351 ; GFX8-NEXT: v_lshrrev_b16_e32 v11, 2, v1
1352 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v3
1353 ; GFX8-NEXT: v_lshrrev_b16_e32 v5, 13, v1
1354 ; GFX8-NEXT: v_lshrrev_b16_e32 v9, 9, v1
1355 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 10, v1
1356 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 4, v1
1357 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 6, v1
1358 ; GFX8-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
1359 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v7
1360 ; GFX8-NEXT: v_and_b32_e32 v14, 1, v11
1361 ; GFX8-NEXT: v_and_b32_e32 v15, 0xffff, v12
1362 ; GFX8-NEXT: v_and_b32_e32 v7, 0xffff, v3
1363 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 11, v1
1364 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v1
1365 ; GFX8-NEXT: v_lshrrev_b16_e32 v11, 15, v1
1366 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 5, v1
1367 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v5
1368 ; GFX8-NEXT: v_and_b32_e32 v9, 1, v9
1369 ; GFX8-NEXT: v_and_b32_e32 v1, 1, v1
1370 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v3
1371 ; GFX8-NEXT: v_and_b32_e32 v5, 0xffff, v1
1372 ; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v9
1373 ; GFX8-NEXT: v_and_b32_e32 v9, 0xffff, v24
1374 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v6
1375 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v4
1376 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
1377 ; GFX8-NEXT: v_and_b32_e32 v3, 0xffff, v3
1378 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[8:11]
1379 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[0:3]
1380 ; GFX8-NEXT: flat_store_dwordx4 v[22:23], v[4:7]
1381 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
1382 ; GFX8-NEXT: s_endpgm
1383 ;
1384 ; EG-LABEL: constant_zextload_v16i1_to_v16i32:
1385 ; EG: ; %bb.0:
1386 ; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]
1387 ; EG-NEXT: TEX 0 @8
1388 ; EG-NEXT: ALU 36, @11, KC0[CB0:0-32], KC1[]
1389 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T14.X, 0
1390 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T13.X, 0
1391 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T12.X, 0
1392 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T10.X, 1
1393 ; EG-NEXT: CF_END
1394 ; EG-NEXT: Fetch clause starting at 8:
1395 ; EG-NEXT: VTX_READ_16 T7.X, T7.X, 0, #1
1396 ; EG-NEXT: ALU clause starting at 10:
1397 ; EG-NEXT: MOV * T7.X, KC0[2].Z,
1398 ; EG-NEXT: ALU clause starting at 11:
1399 ; EG-NEXT: BFE_UINT * T8.W, T7.X, literal.x, 1,
1400 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
1401 ; EG-NEXT: BFE_UINT * T8.Z, T7.X, literal.x, 1,
1402 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1403 ; EG-NEXT: BFE_UINT T8.Y, T7.X, 1, 1,
1404 ; EG-NEXT: BFE_UINT * T9.W, T7.X, literal.x, 1,
1405 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
1406 ; EG-NEXT: AND_INT T8.X, T7.X, 1,
1407 ; EG-NEXT: BFE_UINT T9.Z, T7.X, literal.x, 1,
1408 ; EG-NEXT: LSHR * T10.X, KC0[2].Y, literal.y,
1409 ; EG-NEXT: 6(8.407791e-45), 2(2.802597e-45)
1410 ; EG-NEXT: BFE_UINT T9.Y, T7.X, literal.x, 1,
1411 ; EG-NEXT: BFE_UINT * T11.W, T7.X, literal.y, 1,
1412 ; EG-NEXT: 5(7.006492e-45), 11(1.541428e-44)
1413 ; EG-NEXT: BFE_UINT T9.X, T7.X, literal.x, 1,
1414 ; EG-NEXT: BFE_UINT T11.Z, T7.X, literal.y, 1,
1415 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1416 ; EG-NEXT: 4(5.605194e-45), 10(1.401298e-44)
1417 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1418 ; EG-NEXT: LSHR T12.X, PV.W, literal.x,
1419 ; EG-NEXT: BFE_UINT T11.Y, T7.X, literal.y, 1,
1420 ; EG-NEXT: LSHR * T7.W, T7.X, literal.z,
1421 ; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)
1422 ; EG-NEXT: 15(2.101948e-44), 0(0.000000e+00)
1423 ; EG-NEXT: BFE_UINT T11.X, T7.X, literal.x, 1,
1424 ; EG-NEXT: BFE_UINT T7.Z, T7.X, literal.y, 1,
1425 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1426 ; EG-NEXT: 8(1.121039e-44), 14(1.961818e-44)
1427 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
1428 ; EG-NEXT: LSHR T13.X, PV.W, literal.x,
1429 ; EG-NEXT: BFE_UINT * T7.Y, T7.X, literal.y, 1,
1430 ; EG-NEXT: 2(2.802597e-45), 13(1.821688e-44)
1431 ; EG-NEXT: BFE_UINT T7.X, T7.X, literal.x, 1,
1432 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
1433 ; EG-NEXT: 12(1.681558e-44), 48(6.726233e-44)
1434 ; EG-NEXT: LSHR * T14.X, PV.W, literal.x,
1435 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1436 %load = load <16 x i1>, ptr addrspace(4) %in
1437 %ext = zext <16 x i1> %load to <16 x i32>
1438 store <16 x i32> %ext, ptr addrspace(1) %out
1439 ret void
1440 }
1442 define amdgpu_kernel void @constant_sextload_v16i1_to_v16i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
1443 ; GFX6-LABEL: constant_sextload_v16i1_to_v16i32:
1444 ; GFX6: ; %bb.0:
1445 ; GFX6-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1446 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
1447 ; GFX6-NEXT: s_mov_b32 s2, -1
1448 ; GFX6-NEXT: s_mov_b32 s10, s2
1449 ; GFX6-NEXT: s_mov_b32 s11, s3
1450 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1451 ; GFX6-NEXT: s_mov_b32 s8, s6
1452 ; GFX6-NEXT: s_mov_b32 s9, s7
1453 ; GFX6-NEXT: buffer_load_ushort v12, off, s[8:11], 0
1454 ; GFX6-NEXT: s_mov_b32 s0, s4
1455 ; GFX6-NEXT: s_mov_b32 s1, s5
1456 ; GFX6-NEXT: s_waitcnt vmcnt(0)
1457 ; GFX6-NEXT: v_bfe_i32 v3, v12, 3, 1
1458 ; GFX6-NEXT: v_bfe_i32 v2, v12, 2, 1
1459 ; GFX6-NEXT: v_bfe_i32 v1, v12, 1, 1
1460 ; GFX6-NEXT: v_bfe_i32 v0, v12, 0, 1
1461 ; GFX6-NEXT: v_bfe_i32 v7, v12, 7, 1
1462 ; GFX6-NEXT: v_bfe_i32 v6, v12, 6, 1
1463 ; GFX6-NEXT: v_bfe_i32 v5, v12, 5, 1
1464 ; GFX6-NEXT: v_bfe_i32 v4, v12, 4, 1
1465 ; GFX6-NEXT: v_bfe_i32 v11, v12, 11, 1
1466 ; GFX6-NEXT: v_bfe_i32 v10, v12, 10, 1
1467 ; GFX6-NEXT: v_bfe_i32 v9, v12, 9, 1
1468 ; GFX6-NEXT: v_bfe_i32 v8, v12, 8, 1
1469 ; GFX6-NEXT: v_bfe_i32 v15, v12, 15, 1
1470 ; GFX6-NEXT: v_bfe_i32 v14, v12, 14, 1
1471 ; GFX6-NEXT: v_bfe_i32 v13, v12, 13, 1
1472 ; GFX6-NEXT: v_bfe_i32 v12, v12, 12, 1
1473 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
1474 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
1475 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
1476 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1477 ; GFX6-NEXT: s_endpgm
1478 ;
1479 ; GFX8-LABEL: constant_sextload_v16i1_to_v16i32:
1480 ; GFX8: ; %bb.0:
1481 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1482 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
1483 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
1484 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
1485 ; GFX8-NEXT: flat_load_ushort v0, v[0:1]
1486 ; GFX8-NEXT: s_add_u32 s2, s0, 48
1487 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1488 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
1489 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
1490 ; GFX8-NEXT: s_add_u32 s2, s0, 32
1491 ; GFX8-NEXT: v_mov_b32_e32 v17, s1
1492 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1493 ; GFX8-NEXT: v_mov_b32_e32 v16, s0
1494 ; GFX8-NEXT: s_add_u32 s0, s0, 16
1495 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
1496 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
1497 ; GFX8-NEXT: v_mov_b32_e32 v23, s1
1498 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
1499 ; GFX8-NEXT: v_mov_b32_e32 v22, s0
1500 ; GFX8-NEXT: s_waitcnt vmcnt(0)
1501 ; GFX8-NEXT: v_lshrrev_b16_e32 v12, 12, v0
1502 ; GFX8-NEXT: v_lshrrev_b16_e32 v13, 13, v0
1503 ; GFX8-NEXT: v_lshrrev_b16_e32 v14, 14, v0
1504 ; GFX8-NEXT: v_lshrrev_b16_e32 v15, 15, v0
1505 ; GFX8-NEXT: v_lshrrev_b16_e32 v8, 8, v0
1506 ; GFX8-NEXT: v_lshrrev_b16_e32 v9, 9, v0
1507 ; GFX8-NEXT: v_lshrrev_b16_e32 v10, 10, v0
1508 ; GFX8-NEXT: v_lshrrev_b16_e32 v11, 11, v0
1509 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 4, v0
1510 ; GFX8-NEXT: v_lshrrev_b16_e32 v5, 5, v0
1511 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 6, v0
1512 ; GFX8-NEXT: v_lshrrev_b16_e32 v7, 7, v0
1513 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v0
1514 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 2, v0
1515 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 3, v0
1516 ; GFX8-NEXT: v_bfe_i32 v15, v15, 0, 1
1517 ; GFX8-NEXT: v_bfe_i32 v14, v14, 0, 1
1518 ; GFX8-NEXT: v_bfe_i32 v13, v13, 0, 1
1519 ; GFX8-NEXT: v_bfe_i32 v12, v12, 0, 1
1520 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
1521 ; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 1
1522 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
1523 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 1
1524 ; GFX8-NEXT: v_bfe_i32 v7, v7, 0, 1
1525 ; GFX8-NEXT: v_bfe_i32 v6, v6, 0, 1
1526 ; GFX8-NEXT: v_bfe_i32 v5, v5, 0, 1
1527 ; GFX8-NEXT: v_bfe_i32 v4, v4, 0, 1
1528 ; GFX8-NEXT: v_bfe_i32 v11, v11, 0, 1
1529 ; GFX8-NEXT: v_bfe_i32 v10, v10, 0, 1
1530 ; GFX8-NEXT: v_bfe_i32 v9, v9, 0, 1
1531 ; GFX8-NEXT: v_bfe_i32 v8, v8, 0, 1
1532 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
1533 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[8:11]
1534 ; GFX8-NEXT: flat_store_dwordx4 v[22:23], v[4:7]
1535 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
1536 ; GFX8-NEXT: s_endpgm
1537 ;
1538 ; EG-LABEL: constant_sextload_v16i1_to_v16i32:
1539 ; EG: ; %bb.0:
1540 ; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]
1541 ; EG-NEXT: TEX 0 @8
1542 ; EG-NEXT: ALU 51, @11, KC0[CB0:0-32], KC1[]
1543 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T7.X, 0
1544 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T14.X, 0
1545 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T11.X, 0
1546 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T9.X, 1
1547 ; EG-NEXT: CF_END
1548 ; EG-NEXT: Fetch clause starting at 8:
1549 ; EG-NEXT: VTX_READ_16 T7.X, T7.X, 0, #1
1550 ; EG-NEXT: ALU clause starting at 10:
1551 ; EG-NEXT: MOV * T7.X, KC0[2].Z,
1552 ; EG-NEXT: ALU clause starting at 11:
1553 ; EG-NEXT: LSHR * T0.W, T7.X, literal.x,
1554 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
1555 ; EG-NEXT: BFE_INT T8.W, PV.W, 0.0, 1,
1556 ; EG-NEXT: LSHR * T0.W, T7.X, literal.x,
1557 ; EG-NEXT: 6(8.407791e-45), 0(0.000000e+00)
1558 ; EG-NEXT: BFE_INT T8.Z, PS, 0.0, 1,
1559 ; EG-NEXT: LSHR T0.W, T7.X, literal.x,
1560 ; EG-NEXT: LSHR * T1.W, T7.X, literal.y,
1561 ; EG-NEXT: 11(1.541428e-44), 5(7.006492e-45)
1562 ; EG-NEXT: LSHR T9.X, KC0[2].Y, literal.x,
1563 ; EG-NEXT: BFE_INT T8.Y, PS, 0.0, 1,
1564 ; EG-NEXT: LSHR T0.Z, T7.X, literal.y,
1565 ; EG-NEXT: BFE_INT T10.W, PV.W, 0.0, 1,
1566 ; EG-NEXT: LSHR * T0.W, T7.X, literal.z,
1567 ; EG-NEXT: 2(2.802597e-45), 10(1.401298e-44)
1568 ; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)
1569 ; EG-NEXT: BFE_INT T8.X, PS, 0.0, 1,
1570 ; EG-NEXT: BFE_INT T10.Z, PV.Z, 0.0, 1,
1571 ; EG-NEXT: LSHR T0.W, T7.X, literal.x,
1572 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,
1573 ; EG-NEXT: 9(1.261169e-44), 16(2.242078e-44)
1574 ; EG-NEXT: LSHR T11.X, PS, literal.x,
1575 ; EG-NEXT: BFE_INT T10.Y, PV.W, 0.0, 1,
1576 ; EG-NEXT: LSHR T0.W, T7.X, literal.y,
1577 ; EG-NEXT: LSHR * T1.W, T7.X, literal.z,
1578 ; EG-NEXT: 2(2.802597e-45), 15(2.101948e-44)
1579 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
1580 ; EG-NEXT: BFE_INT T10.X, PS, 0.0, 1,
1581 ; EG-NEXT: BFE_INT T12.W, PV.W, 0.0, 1,
1582 ; EG-NEXT: LSHR * T0.W, T7.X, literal.x,
1583 ; EG-NEXT: 14(1.961818e-44), 0(0.000000e+00)
1584 ; EG-NEXT: BFE_INT T13.X, T7.X, 0.0, 1,
1585 ; EG-NEXT: LSHR T0.Y, T7.X, literal.x,
1586 ; EG-NEXT: BFE_INT T12.Z, PS, 0.0, 1,
1587 ; EG-NEXT: LSHR T0.W, T7.X, literal.y,
1588 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
1589 ; EG-NEXT: 3(4.203895e-45), 13(1.821688e-44)
1590 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
1591 ; EG-NEXT: LSHR T14.X, PS, literal.x,
1592 ; EG-NEXT: BFE_INT T12.Y, PV.W, 0.0, 1,
1593 ; EG-NEXT: LSHR T0.Z, T7.X, literal.x,
1594 ; EG-NEXT: BFE_INT T13.W, PV.Y, 0.0, 1,
1595 ; EG-NEXT: LSHR * T0.W, T7.X, literal.y,
1596 ; EG-NEXT: 2(2.802597e-45), 12(1.681558e-44)
1597 ; EG-NEXT: BFE_INT T12.X, PS, 0.0, 1,
1598 ; EG-NEXT: BFE_INT T13.Z, PV.Z, 0.0, 1,
1599 ; EG-NEXT: LSHR T0.W, T7.X, 1,
1600 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.x,
1601 ; EG-NEXT: 48(6.726233e-44), 0(0.000000e+00)
1602 ; EG-NEXT: LSHR T7.X, PS, literal.x,
1603 ; EG-NEXT: BFE_INT * T13.Y, PV.W, 0.0, 1,
1604 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1605 %load = load <16 x i1>, ptr addrspace(4) %in
1606 %ext = sext <16 x i1> %load to <16 x i32>
1607 store <16 x i32> %ext, ptr addrspace(1) %out
1608 ret void
1609 }
1611 define amdgpu_kernel void @constant_zextload_v32i1_to_v32i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
1612 ; GFX6-LABEL: constant_zextload_v32i1_to_v32i32:
1613 ; GFX6: ; %bb.0:
1614 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1615 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1616 ; GFX6-NEXT: s_load_dword s4, s[2:3], 0x0
1617 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
1618 ; GFX6-NEXT: s_mov_b32 s2, -1
1619 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1620 ; GFX6-NEXT: s_bfe_u32 s5, s4, 0x10003
1621 ; GFX6-NEXT: s_bfe_u32 s6, s4, 0x10001
1622 ; GFX6-NEXT: s_bfe_u32 s7, s4, 0x10007
1623 ; GFX6-NEXT: s_bfe_u32 s8, s4, 0x10005
1624 ; GFX6-NEXT: s_bfe_u32 s9, s4, 0x1000b
1625 ; GFX6-NEXT: s_bfe_u32 s10, s4, 0x10009
1626 ; GFX6-NEXT: s_bfe_u32 s11, s4, 0x1000f
1627 ; GFX6-NEXT: s_bfe_u32 s12, s4, 0x1000d
1628 ; GFX6-NEXT: s_bfe_u32 s13, s4, 0x10013
1629 ; GFX6-NEXT: s_bfe_u32 s14, s4, 0x10011
1630 ; GFX6-NEXT: s_bfe_u32 s15, s4, 0x10017
1631 ; GFX6-NEXT: s_bfe_u32 s16, s4, 0x10015
1632 ; GFX6-NEXT: s_bfe_u32 s17, s4, 0x1001b
1633 ; GFX6-NEXT: s_bfe_u32 s18, s4, 0x10019
1634 ; GFX6-NEXT: s_lshr_b32 s19, s4, 31
1635 ; GFX6-NEXT: s_bfe_u32 s20, s4, 0x1001d
1636 ; GFX6-NEXT: s_and_b32 s21, s4, 1
1637 ; GFX6-NEXT: s_bfe_u32 s22, s4, 0x10002
1638 ; GFX6-NEXT: s_bfe_u32 s23, s4, 0x10006
1639 ; GFX6-NEXT: s_bfe_u32 s24, s4, 0x10004
1640 ; GFX6-NEXT: s_bfe_u32 s25, s4, 0x1000a
1641 ; GFX6-NEXT: s_bfe_u32 s26, s4, 0x10008
1642 ; GFX6-NEXT: s_bfe_u32 s27, s4, 0x1000e
1643 ; GFX6-NEXT: s_bfe_u32 s28, s4, 0x1000c
1644 ; GFX6-NEXT: s_bfe_u32 s29, s4, 0x10012
1645 ; GFX6-NEXT: s_bfe_u32 s30, s4, 0x10010
1646 ; GFX6-NEXT: s_bfe_u32 s31, s4, 0x10016
1647 ; GFX6-NEXT: s_bfe_u32 s33, s4, 0x10014
1648 ; GFX6-NEXT: s_bfe_u32 s34, s4, 0x1001a
1649 ; GFX6-NEXT: s_bfe_u32 s35, s4, 0x1001e
1650 ; GFX6-NEXT: s_bfe_u32 s36, s4, 0x1001c
1651 ; GFX6-NEXT: s_bfe_u32 s4, s4, 0x10018
1652 ; GFX6-NEXT: v_mov_b32_e32 v0, s36
1653 ; GFX6-NEXT: v_mov_b32_e32 v1, s20
1654 ; GFX6-NEXT: v_mov_b32_e32 v2, s35
1655 ; GFX6-NEXT: v_mov_b32_e32 v3, s19
1656 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
1657 ; GFX6-NEXT: s_waitcnt expcnt(0)
1658 ; GFX6-NEXT: v_mov_b32_e32 v0, s4
1659 ; GFX6-NEXT: v_mov_b32_e32 v1, s18
1660 ; GFX6-NEXT: v_mov_b32_e32 v2, s34
1661 ; GFX6-NEXT: v_mov_b32_e32 v3, s17
1662 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
1663 ; GFX6-NEXT: s_waitcnt expcnt(0)
1664 ; GFX6-NEXT: v_mov_b32_e32 v0, s33
1665 ; GFX6-NEXT: v_mov_b32_e32 v1, s16
1666 ; GFX6-NEXT: v_mov_b32_e32 v2, s31
1667 ; GFX6-NEXT: v_mov_b32_e32 v3, s15
1668 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
1669 ; GFX6-NEXT: s_waitcnt expcnt(0)
1670 ; GFX6-NEXT: v_mov_b32_e32 v0, s30
1671 ; GFX6-NEXT: v_mov_b32_e32 v1, s14
1672 ; GFX6-NEXT: v_mov_b32_e32 v2, s29
1673 ; GFX6-NEXT: v_mov_b32_e32 v3, s13
1674 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
1675 ; GFX6-NEXT: s_waitcnt expcnt(0)
1676 ; GFX6-NEXT: v_mov_b32_e32 v0, s28
1677 ; GFX6-NEXT: v_mov_b32_e32 v1, s12
1678 ; GFX6-NEXT: v_mov_b32_e32 v2, s27
1679 ; GFX6-NEXT: v_mov_b32_e32 v3, s11
1680 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
1681 ; GFX6-NEXT: s_waitcnt expcnt(0)
1682 ; GFX6-NEXT: v_mov_b32_e32 v0, s26
1683 ; GFX6-NEXT: v_mov_b32_e32 v1, s10
1684 ; GFX6-NEXT: v_mov_b32_e32 v2, s25
1685 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
1686 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
1687 ; GFX6-NEXT: s_waitcnt expcnt(0)
1688 ; GFX6-NEXT: v_mov_b32_e32 v0, s24
1689 ; GFX6-NEXT: v_mov_b32_e32 v1, s8
1690 ; GFX6-NEXT: v_mov_b32_e32 v2, s23
1691 ; GFX6-NEXT: v_mov_b32_e32 v3, s7
1692 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
1693 ; GFX6-NEXT: s_waitcnt expcnt(0)
1694 ; GFX6-NEXT: v_mov_b32_e32 v0, s21
1695 ; GFX6-NEXT: v_mov_b32_e32 v1, s6
1696 ; GFX6-NEXT: v_mov_b32_e32 v2, s22
1697 ; GFX6-NEXT: v_mov_b32_e32 v3, s5
1698 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1699 ; GFX6-NEXT: s_endpgm
1700 ;
1701 ; GFX8-LABEL: constant_zextload_v32i1_to_v32i32:
1702 ; GFX8: ; %bb.0:
1703 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1704 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
1705 ; GFX8-NEXT: s_load_dword s4, s[2:3], 0x0
1706 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
1707 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 13, s4
1708 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v1
1709 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 5, s4
1710 ; GFX8-NEXT: v_and_b32_e32 v22, 1, v1
1711 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 7, s4
1712 ; GFX8-NEXT: v_and_b32_e32 v15, 1, v1
1713 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 1, s4
1714 ; GFX8-NEXT: v_and_b32_e32 v23, 1, v1
1715 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 3, s4
1716 ; GFX8-NEXT: s_lshr_b32 s2, s4, 24
1717 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 9, s4
1718 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 11, s4
1719 ; GFX8-NEXT: v_and_b32_e32 v26, 1, v1
1720 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 5, s2
1721 ; GFX8-NEXT: v_and_b32_e32 v17, 1, v2
1722 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v3
1723 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 4, s2
1724 ; GFX8-NEXT: v_and_b32_e32 v5, 1, v1
1725 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 6, s2
1726 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 1, s2
1727 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 2, s2
1728 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 3, s2
1729 ; GFX8-NEXT: s_bfe_u32 s5, s4, 0x10018
1730 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 7, s2
1731 ; GFX8-NEXT: s_and_b32 s6, s4, 1
1732 ; GFX8-NEXT: s_bfe_u32 s7, s4, 0x10013
1733 ; GFX8-NEXT: s_bfe_u32 s8, s4, 0x10012
1734 ; GFX8-NEXT: s_bfe_u32 s9, s4, 0x10011
1735 ; GFX8-NEXT: s_bfe_u32 s10, s4, 0x10010
1736 ; GFX8-NEXT: s_bfe_u32 s2, s4, 0x10017
1737 ; GFX8-NEXT: s_bfe_u32 s3, s4, 0x10016
1738 ; GFX8-NEXT: s_bfe_u32 s11, s4, 0x10015
1739 ; GFX8-NEXT: s_bfe_u32 s12, s4, 0x10014
1740 ; GFX8-NEXT: v_mov_b32_e32 v11, s2
1741 ; GFX8-NEXT: s_add_u32 s2, s0, 0x50
1742 ; GFX8-NEXT: v_mov_b32_e32 v10, s3
1743 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1744 ; GFX8-NEXT: v_mov_b32_e32 v13, s3
1745 ; GFX8-NEXT: v_mov_b32_e32 v12, s2
1746 ; GFX8-NEXT: s_add_u32 s2, s0, 64
1747 ; GFX8-NEXT: v_mov_b32_e32 v8, s12
1748 ; GFX8-NEXT: v_mov_b32_e32 v9, s11
1749 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1750 ; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
1751 ; GFX8-NEXT: v_mov_b32_e32 v13, s3
1752 ; GFX8-NEXT: v_mov_b32_e32 v12, s2
1753 ; GFX8-NEXT: s_add_u32 s2, s0, 48
1754 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 14, s4
1755 ; GFX8-NEXT: v_lshrrev_b16_e64 v25, 2, s4
1756 ; GFX8-NEXT: v_mov_b32_e32 v8, s10
1757 ; GFX8-NEXT: v_mov_b32_e32 v9, s9
1758 ; GFX8-NEXT: v_mov_b32_e32 v10, s8
1759 ; GFX8-NEXT: v_mov_b32_e32 v11, s7
1760 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1761 ; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
1762 ; GFX8-NEXT: v_and_b32_e32 v13, 0xffff, v22
1763 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v25
1764 ; GFX8-NEXT: v_and_b32_e32 v22, 1, v21
1765 ; GFX8-NEXT: v_and_b32_e32 v21, 0xffff, v24
1766 ; GFX8-NEXT: v_mov_b32_e32 v25, s3
1767 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 12, s4
1768 ; GFX8-NEXT: v_mov_b32_e32 v24, s2
1769 ; GFX8-NEXT: s_add_u32 s2, s0, 32
1770 ; GFX8-NEXT: v_and_b32_e32 v9, 0xffff, v23
1771 ; GFX8-NEXT: v_lshrrev_b16_e64 v23, 15, s4
1772 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v20
1773 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1774 ; GFX8-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
1775 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
1776 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
1777 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 10, s4
1778 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 4, s4
1779 ; GFX8-NEXT: v_mov_b32_e32 v8, 1
1780 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
1781 ; GFX8-NEXT: s_add_u32 s2, s0, 16
1782 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v19
1783 ; GFX8-NEXT: v_and_b32_e32 v19, 0xffff, v18
1784 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v16
1785 ; GFX8-NEXT: v_and_b32_e32 v17, 0xffff, v17
1786 ; GFX8-NEXT: v_and_b32_sdwa v16, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
1787 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1788 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 6, s4
1789 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
1790 ; GFX8-NEXT: v_and_b32_e32 v15, 0xffff, v15
1791 ; GFX8-NEXT: v_mov_b32_e32 v17, s3
1792 ; GFX8-NEXT: v_and_b32_e32 v14, 1, v14
1793 ; GFX8-NEXT: v_mov_b32_e32 v16, s2
1794 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
1795 ; GFX8-NEXT: s_add_u32 s2, s0, 0x70
1796 ; GFX8-NEXT: v_mov_b32_e32 v13, s1
1797 ; GFX8-NEXT: v_and_b32_e32 v11, 0xffff, v26
1798 ; GFX8-NEXT: v_mov_b32_e32 v8, s6
1799 ; GFX8-NEXT: v_mov_b32_e32 v12, s0
1800 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
1801 ; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
1802 ; GFX8-NEXT: s_add_u32 s0, s0, 0x60
1803 ; GFX8-NEXT: v_mov_b32_e32 v9, s3
1804 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v6
1805 ; GFX8-NEXT: v_and_b32_e32 v5, 0xffff, v5
1806 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v4
1807 ; GFX8-NEXT: v_mov_b32_e32 v8, s2
1808 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
1809 ; GFX8-NEXT: v_and_b32_e32 v1, 1, v1
1810 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v3
1811 ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
1812 ; GFX8-NEXT: v_and_b32_e32 v3, 0xffff, v3
1813 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
1814 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
1815 ; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v1
1816 ; GFX8-NEXT: v_mov_b32_e32 v0, s5
1817 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
1818 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1819 ; GFX8-NEXT: s_endpgm
1820 ;
1821 ; EG-LABEL: constant_zextload_v32i1_to_v32i32:
1822 ; EG: ; %bb.0:
1823 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
1824 ; EG-NEXT: TEX 0 @12
1825 ; EG-NEXT: ALU 76, @15, KC0[CB0:0-32], KC1[]
1826 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T26.X, 0
1827 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T25.X, 0
1828 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T24.X, 0
1829 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T22.X, 0
1830 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T20.X, 0
1831 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T18.X, 0
1832 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T16.X, 0
1833 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T14.X, 1
1834 ; EG-NEXT: CF_END
1835 ; EG-NEXT: Fetch clause starting at 12:
1836 ; EG-NEXT: VTX_READ_32 T11.X, T11.X, 0, #1
1837 ; EG-NEXT: ALU clause starting at 14:
1838 ; EG-NEXT: MOV * T11.X, KC0[2].Z,
1839 ; EG-NEXT: ALU clause starting at 15:
1840 ; EG-NEXT: BFE_UINT * T12.W, T11.X, literal.x, 1,
1841 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
1842 ; EG-NEXT: BFE_UINT * T12.Z, T11.X, literal.x, 1,
1843 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1844 ; EG-NEXT: BFE_UINT T12.Y, T11.X, 1, 1,
1845 ; EG-NEXT: BFE_UINT * T13.W, T11.X, literal.x, 1,
1846 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
1847 ; EG-NEXT: AND_INT T12.X, T11.X, 1,
1848 ; EG-NEXT: BFE_UINT T13.Z, T11.X, literal.x, 1,
1849 ; EG-NEXT: LSHR * T14.X, KC0[2].Y, literal.y,
1850 ; EG-NEXT: 6(8.407791e-45), 2(2.802597e-45)
1851 ; EG-NEXT: BFE_UINT T13.Y, T11.X, literal.x, 1,
1852 ; EG-NEXT: BFE_UINT * T15.W, T11.X, literal.y, 1,
1853 ; EG-NEXT: 5(7.006492e-45), 11(1.541428e-44)
1854 ; EG-NEXT: BFE_UINT T13.X, T11.X, literal.x, 1,
1855 ; EG-NEXT: BFE_UINT T15.Z, T11.X, literal.y, 1,
1856 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1857 ; EG-NEXT: 4(5.605194e-45), 10(1.401298e-44)
1858 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1859 ; EG-NEXT: LSHR T16.X, PV.W, literal.x,
1860 ; EG-NEXT: BFE_UINT T15.Y, T11.X, literal.y, 1,
1861 ; EG-NEXT: BFE_UINT * T17.W, T11.X, literal.z, 1,
1862 ; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)
1863 ; EG-NEXT: 15(2.101948e-44), 0(0.000000e+00)
1864 ; EG-NEXT: BFE_UINT T15.X, T11.X, literal.x, 1,
1865 ; EG-NEXT: BFE_UINT T17.Z, T11.X, literal.y, 1,
1866 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1867 ; EG-NEXT: 8(1.121039e-44), 14(1.961818e-44)
1868 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
1869 ; EG-NEXT: LSHR T18.X, PV.W, literal.x,
1870 ; EG-NEXT: BFE_UINT T17.Y, T11.X, literal.y, 1,
1871 ; EG-NEXT: BFE_UINT * T19.W, T11.X, literal.z, 1,
1872 ; EG-NEXT: 2(2.802597e-45), 13(1.821688e-44)
1873 ; EG-NEXT: 19(2.662467e-44), 0(0.000000e+00)
1874 ; EG-NEXT: BFE_UINT T17.X, T11.X, literal.x, 1,
1875 ; EG-NEXT: BFE_UINT T19.Z, T11.X, literal.y, 1,
1876 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1877 ; EG-NEXT: 12(1.681558e-44), 18(2.522337e-44)
1878 ; EG-NEXT: 48(6.726233e-44), 0(0.000000e+00)
1879 ; EG-NEXT: LSHR T20.X, PV.W, literal.x,
1880 ; EG-NEXT: BFE_UINT T19.Y, T11.X, literal.y, 1,
1881 ; EG-NEXT: BFE_UINT * T21.W, T11.X, literal.z, 1,
1882 ; EG-NEXT: 2(2.802597e-45), 17(2.382207e-44)
1883 ; EG-NEXT: 23(3.222986e-44), 0(0.000000e+00)
1884 ; EG-NEXT: BFE_UINT T19.X, T11.X, literal.x, 1,
1885 ; EG-NEXT: BFE_UINT T21.Z, T11.X, literal.y, 1,
1886 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1887 ; EG-NEXT: 16(2.242078e-44), 22(3.082857e-44)
1888 ; EG-NEXT: 64(8.968310e-44), 0(0.000000e+00)
1889 ; EG-NEXT: LSHR T22.X, PV.W, literal.x,
1890 ; EG-NEXT: BFE_UINT T21.Y, T11.X, literal.y, 1,
1891 ; EG-NEXT: BFE_UINT * T23.W, T11.X, literal.z, 1,
1892 ; EG-NEXT: 2(2.802597e-45), 21(2.942727e-44)
1893 ; EG-NEXT: 27(3.783506e-44), 0(0.000000e+00)
1894 ; EG-NEXT: BFE_UINT T21.X, T11.X, literal.x, 1,
1895 ; EG-NEXT: BFE_UINT T23.Z, T11.X, literal.y, 1,
1896 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1897 ; EG-NEXT: 20(2.802597e-44), 26(3.643376e-44)
1898 ; EG-NEXT: 80(1.121039e-43), 0(0.000000e+00)
1899 ; EG-NEXT: LSHR T24.X, PV.W, literal.x,
1900 ; EG-NEXT: BFE_UINT T23.Y, T11.X, literal.y, 1,
1901 ; EG-NEXT: LSHR * T11.W, T11.X, literal.z,
1902 ; EG-NEXT: 2(2.802597e-45), 25(3.503246e-44)
1903 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
1904 ; EG-NEXT: BFE_UINT T23.X, T11.X, literal.x, 1,
1905 ; EG-NEXT: BFE_UINT T11.Z, T11.X, literal.y, 1,
1906 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
1907 ; EG-NEXT: 24(3.363116e-44), 30(4.203895e-44)
1908 ; EG-NEXT: 96(1.345247e-43), 0(0.000000e+00)
1909 ; EG-NEXT: LSHR T25.X, PV.W, literal.x,
1910 ; EG-NEXT: BFE_UINT * T11.Y, T11.X, literal.y, 1,
1911 ; EG-NEXT: 2(2.802597e-45), 29(4.063766e-44)
1912 ; EG-NEXT: BFE_UINT T11.X, T11.X, literal.x, 1,
1913 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
1914 ; EG-NEXT: 28(3.923636e-44), 112(1.569454e-43)
1915 ; EG-NEXT: LSHR * T26.X, PV.W, literal.x,
1916 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1917 %load = load <32 x i1>, ptr addrspace(4) %in
1918 %ext = zext <32 x i1> %load to <32 x i32>
1919 store <32 x i32> %ext, ptr addrspace(1) %out
1920 ret void
1921 }
1923 define amdgpu_kernel void @constant_sextload_v32i1_to_v32i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
1924 ; GFX6-LABEL: constant_sextload_v32i1_to_v32i32:
1925 ; GFX6: ; %bb.0:
1926 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1927 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1928 ; GFX6-NEXT: s_load_dword s4, s[2:3], 0x0
1929 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
1930 ; GFX6-NEXT: s_mov_b32 s2, -1
1931 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
1932 ; GFX6-NEXT: s_bfe_i32 s5, s4, 0x10003
1933 ; GFX6-NEXT: s_bfe_i32 s6, s4, 0x10002
1934 ; GFX6-NEXT: s_bfe_i32 s7, s4, 0x10001
1935 ; GFX6-NEXT: s_bfe_i32 s8, s4, 0x10000
1936 ; GFX6-NEXT: s_bfe_i32 s9, s4, 0x10007
1937 ; GFX6-NEXT: s_bfe_i32 s10, s4, 0x10006
1938 ; GFX6-NEXT: s_bfe_i32 s11, s4, 0x10005
1939 ; GFX6-NEXT: s_bfe_i32 s12, s4, 0x10004
1940 ; GFX6-NEXT: s_bfe_i32 s13, s4, 0x1000b
1941 ; GFX6-NEXT: s_bfe_i32 s14, s4, 0x1000a
1942 ; GFX6-NEXT: s_bfe_i32 s15, s4, 0x10009
1943 ; GFX6-NEXT: s_bfe_i32 s16, s4, 0x10008
1944 ; GFX6-NEXT: s_bfe_i32 s17, s4, 0x1000f
1945 ; GFX6-NEXT: s_bfe_i32 s18, s4, 0x1000e
1946 ; GFX6-NEXT: s_bfe_i32 s19, s4, 0x1000d
1947 ; GFX6-NEXT: s_bfe_i32 s20, s4, 0x1000c
1948 ; GFX6-NEXT: s_bfe_i32 s21, s4, 0x10013
1949 ; GFX6-NEXT: s_bfe_i32 s22, s4, 0x10012
1950 ; GFX6-NEXT: s_bfe_i32 s23, s4, 0x10011
1951 ; GFX6-NEXT: s_bfe_i32 s24, s4, 0x10010
1952 ; GFX6-NEXT: s_bfe_i32 s25, s4, 0x10017
1953 ; GFX6-NEXT: s_bfe_i32 s26, s4, 0x10016
1954 ; GFX6-NEXT: s_bfe_i32 s27, s4, 0x10015
1955 ; GFX6-NEXT: s_bfe_i32 s28, s4, 0x10014
1956 ; GFX6-NEXT: s_bfe_i32 s29, s4, 0x1001b
1957 ; GFX6-NEXT: s_bfe_i32 s30, s4, 0x1001a
1958 ; GFX6-NEXT: s_bfe_i32 s31, s4, 0x10019
1959 ; GFX6-NEXT: s_ashr_i32 s33, s4, 31
1960 ; GFX6-NEXT: s_bfe_i32 s34, s4, 0x1001e
1961 ; GFX6-NEXT: s_bfe_i32 s35, s4, 0x1001d
1962 ; GFX6-NEXT: s_bfe_i32 s36, s4, 0x1001c
1963 ; GFX6-NEXT: s_bfe_i32 s4, s4, 0x10018
1964 ; GFX6-NEXT: v_mov_b32_e32 v0, s36
1965 ; GFX6-NEXT: v_mov_b32_e32 v1, s35
1966 ; GFX6-NEXT: v_mov_b32_e32 v2, s34
1967 ; GFX6-NEXT: v_mov_b32_e32 v3, s33
1968 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
1969 ; GFX6-NEXT: s_waitcnt expcnt(0)
1970 ; GFX6-NEXT: v_mov_b32_e32 v0, s4
1971 ; GFX6-NEXT: v_mov_b32_e32 v1, s31
1972 ; GFX6-NEXT: v_mov_b32_e32 v2, s30
1973 ; GFX6-NEXT: v_mov_b32_e32 v3, s29
1974 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
1975 ; GFX6-NEXT: s_waitcnt expcnt(0)
1976 ; GFX6-NEXT: v_mov_b32_e32 v0, s28
1977 ; GFX6-NEXT: v_mov_b32_e32 v1, s27
1978 ; GFX6-NEXT: v_mov_b32_e32 v2, s26
1979 ; GFX6-NEXT: v_mov_b32_e32 v3, s25
1980 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
1981 ; GFX6-NEXT: s_waitcnt expcnt(0)
1982 ; GFX6-NEXT: v_mov_b32_e32 v0, s24
1983 ; GFX6-NEXT: v_mov_b32_e32 v1, s23
1984 ; GFX6-NEXT: v_mov_b32_e32 v2, s22
1985 ; GFX6-NEXT: v_mov_b32_e32 v3, s21
1986 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
1987 ; GFX6-NEXT: s_waitcnt expcnt(0)
1988 ; GFX6-NEXT: v_mov_b32_e32 v0, s20
1989 ; GFX6-NEXT: v_mov_b32_e32 v1, s19
1990 ; GFX6-NEXT: v_mov_b32_e32 v2, s18
1991 ; GFX6-NEXT: v_mov_b32_e32 v3, s17
1992 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
1993 ; GFX6-NEXT: s_waitcnt expcnt(0)
1994 ; GFX6-NEXT: v_mov_b32_e32 v0, s16
1995 ; GFX6-NEXT: v_mov_b32_e32 v1, s15
1996 ; GFX6-NEXT: v_mov_b32_e32 v2, s14
1997 ; GFX6-NEXT: v_mov_b32_e32 v3, s13
1998 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
1999 ; GFX6-NEXT: s_waitcnt expcnt(0)
2000 ; GFX6-NEXT: v_mov_b32_e32 v0, s12
2001 ; GFX6-NEXT: v_mov_b32_e32 v1, s11
2002 ; GFX6-NEXT: v_mov_b32_e32 v2, s10
2003 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
2004 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
2005 ; GFX6-NEXT: s_waitcnt expcnt(0)
2006 ; GFX6-NEXT: v_mov_b32_e32 v0, s8
2007 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
2008 ; GFX6-NEXT: v_mov_b32_e32 v2, s6
2009 ; GFX6-NEXT: v_mov_b32_e32 v3, s5
2010 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
2011 ; GFX6-NEXT: s_endpgm
2012 ;
2013 ; GFX8-LABEL: constant_sextload_v32i1_to_v32i32:
2014 ; GFX8: ; %bb.0:
2015 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
2016 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
2017 ; GFX8-NEXT: s_load_dword s2, s[2:3], 0x0
2018 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
2019 ; GFX8-NEXT: s_lshr_b32 s3, s2, 24
2020 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 12, s2
2021 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 13, s2
2022 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 14, s2
2023 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 15, s2
2024 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 8, s2
2025 ; GFX8-NEXT: v_lshrrev_b16_e64 v17, 9, s2
2026 ; GFX8-NEXT: v_lshrrev_b16_e64 v18, 10, s2
2027 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 11, s2
2028 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 4, s2
2029 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 5, s2
2030 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 6, s2
2031 ; GFX8-NEXT: v_lshrrev_b16_e64 v15, 7, s2
2032 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 1, s2
2033 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 2, s2
2034 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 3, s2
2035 ; GFX8-NEXT: v_lshrrev_b16_e64 v23, 4, s3
2036 ; GFX8-NEXT: v_lshrrev_b16_e64 v24, 5, s3
2037 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 6, s3
2038 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 7, s3
2039 ; GFX8-NEXT: v_lshrrev_b16_e64 v25, 1, s3
2040 ; GFX8-NEXT: v_lshrrev_b16_e64 v26, 2, s3
2041 ; GFX8-NEXT: v_lshrrev_b16_e64 v27, 3, s3
2042 ; GFX8-NEXT: s_bfe_i32 s4, s2, 0x10018
2043 ; GFX8-NEXT: s_bfe_i32 s5, s2, 0x10000
2044 ; GFX8-NEXT: s_bfe_i32 s6, s2, 0x10013
2045 ; GFX8-NEXT: s_bfe_i32 s7, s2, 0x10012
2046 ; GFX8-NEXT: s_bfe_i32 s8, s2, 0x10011
2047 ; GFX8-NEXT: s_bfe_i32 s9, s2, 0x10010
2048 ; GFX8-NEXT: s_bfe_i32 s3, s2, 0x10017
2049 ; GFX8-NEXT: s_bfe_i32 s10, s2, 0x10016
2050 ; GFX8-NEXT: s_bfe_i32 s11, s2, 0x10015
2051 ; GFX8-NEXT: s_bfe_i32 s2, s2, 0x10014
2052 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
2053 ; GFX8-NEXT: s_add_u32 s2, s0, 0x50
2054 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
2055 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2056 ; GFX8-NEXT: v_mov_b32_e32 v5, s3
2057 ; GFX8-NEXT: v_mov_b32_e32 v4, s2
2058 ; GFX8-NEXT: s_add_u32 s2, s0, 64
2059 ; GFX8-NEXT: v_mov_b32_e32 v1, s11
2060 ; GFX8-NEXT: v_mov_b32_e32 v2, s10
2061 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2062 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2063 ; GFX8-NEXT: v_mov_b32_e32 v5, s3
2064 ; GFX8-NEXT: v_mov_b32_e32 v4, s2
2065 ; GFX8-NEXT: s_add_u32 s2, s0, 48
2066 ; GFX8-NEXT: v_mov_b32_e32 v0, s9
2067 ; GFX8-NEXT: v_mov_b32_e32 v1, s8
2068 ; GFX8-NEXT: v_mov_b32_e32 v2, s7
2069 ; GFX8-NEXT: v_mov_b32_e32 v3, s6
2070 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2071 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2072 ; GFX8-NEXT: v_bfe_i32 v5, v24, 0, 1
2073 ; GFX8-NEXT: v_bfe_i32 v1, v25, 0, 1
2074 ; GFX8-NEXT: v_mov_b32_e32 v25, s3
2075 ; GFX8-NEXT: v_mov_b32_e32 v24, s2
2076 ; GFX8-NEXT: s_add_u32 s2, s0, 32
2077 ; GFX8-NEXT: v_bfe_i32 v4, v23, 0, 1
2078 ; GFX8-NEXT: v_bfe_i32 v23, v22, 0, 1
2079 ; GFX8-NEXT: v_bfe_i32 v22, v21, 0, 1
2080 ; GFX8-NEXT: v_bfe_i32 v21, v20, 0, 1
2081 ; GFX8-NEXT: v_bfe_i32 v20, v8, 0, 1
2082 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2083 ; GFX8-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
2084 ; GFX8-NEXT: v_bfe_i32 v19, v19, 0, 1
2085 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
2086 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
2087 ; GFX8-NEXT: s_add_u32 s2, s0, 16
2088 ; GFX8-NEXT: v_bfe_i32 v18, v18, 0, 1
2089 ; GFX8-NEXT: v_bfe_i32 v17, v17, 0, 1
2090 ; GFX8-NEXT: v_bfe_i32 v16, v16, 0, 1
2091 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2092 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
2093 ; GFX8-NEXT: v_bfe_i32 v15, v15, 0, 1
2094 ; GFX8-NEXT: v_mov_b32_e32 v17, s3
2095 ; GFX8-NEXT: v_bfe_i32 v14, v14, 0, 1
2096 ; GFX8-NEXT: v_bfe_i32 v13, v13, 0, 1
2097 ; GFX8-NEXT: v_bfe_i32 v12, v12, 0, 1
2098 ; GFX8-NEXT: v_mov_b32_e32 v16, s2
2099 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
2100 ; GFX8-NEXT: s_add_u32 s2, s0, 0x70
2101 ; GFX8-NEXT: v_mov_b32_e32 v13, s1
2102 ; GFX8-NEXT: v_bfe_i32 v11, v11, 0, 1
2103 ; GFX8-NEXT: v_bfe_i32 v10, v10, 0, 1
2104 ; GFX8-NEXT: v_bfe_i32 v9, v9, 0, 1
2105 ; GFX8-NEXT: v_mov_b32_e32 v8, s5
2106 ; GFX8-NEXT: v_mov_b32_e32 v12, s0
2107 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2108 ; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
2109 ; GFX8-NEXT: s_add_u32 s0, s0, 0x60
2110 ; GFX8-NEXT: v_mov_b32_e32 v9, s3
2111 ; GFX8-NEXT: v_bfe_i32 v7, v7, 0, 1
2112 ; GFX8-NEXT: v_bfe_i32 v6, v6, 0, 1
2113 ; GFX8-NEXT: v_mov_b32_e32 v8, s2
2114 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
2115 ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
2116 ; GFX8-NEXT: v_bfe_i32 v3, v27, 0, 1
2117 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
2118 ; GFX8-NEXT: v_bfe_i32 v2, v26, 0, 1
2119 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
2120 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
2121 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2122 ; GFX8-NEXT: s_endpgm
2123 ;
2124 ; EG-LABEL: constant_sextload_v32i1_to_v32i32:
2125 ; EG: ; %bb.0:
2126 ; EG-NEXT: ALU 0, @16, KC0[CB0:0-32], KC1[]
2127 ; EG-NEXT: TEX 0 @14
2128 ; EG-NEXT: ALU 99, @17, KC0[CB0:0-32], KC1[]
2129 ; EG-NEXT: ALU 5, @117, KC0[CB0:0-32], KC1[]
2130 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T11.X, 0
2131 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T26.X, 0
2132 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T23.X, 0
2133 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T21.X, 0
2134 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T19.X, 0
2135 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T17.X, 0
2136 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T15.X, 0
2137 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T13.X, 1
2138 ; EG-NEXT: CF_END
2139 ; EG-NEXT: PAD
2140 ; EG-NEXT: Fetch clause starting at 14:
2141 ; EG-NEXT: VTX_READ_32 T11.X, T11.X, 0, #1
2142 ; EG-NEXT: ALU clause starting at 16:
2143 ; EG-NEXT: MOV * T11.X, KC0[2].Z,
2144 ; EG-NEXT: ALU clause starting at 17:
2145 ; EG-NEXT: LSHR * T0.W, T11.X, literal.x,
2146 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
2147 ; EG-NEXT: BFE_INT T12.W, PV.W, 0.0, 1,
2148 ; EG-NEXT: LSHR * T0.W, T11.X, literal.x,
2149 ; EG-NEXT: 6(8.407791e-45), 0(0.000000e+00)
2150 ; EG-NEXT: BFE_INT T12.Z, PS, 0.0, 1,
2151 ; EG-NEXT: LSHR T0.W, T11.X, literal.x,
2152 ; EG-NEXT: LSHR * T1.W, T11.X, literal.y,
2153 ; EG-NEXT: 11(1.541428e-44), 5(7.006492e-45)
2154 ; EG-NEXT: LSHR T13.X, KC0[2].Y, literal.x,
2155 ; EG-NEXT: BFE_INT T12.Y, PS, 0.0, 1,
2156 ; EG-NEXT: LSHR T0.Z, T11.X, literal.y,
2157 ; EG-NEXT: BFE_INT T14.W, PV.W, 0.0, 1,
2158 ; EG-NEXT: LSHR * T0.W, T11.X, literal.z,
2159 ; EG-NEXT: 2(2.802597e-45), 10(1.401298e-44)
2160 ; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)
2161 ; EG-NEXT: BFE_INT T12.X, PS, 0.0, 1,
2162 ; EG-NEXT: LSHR T0.Y, T11.X, literal.x,
2163 ; EG-NEXT: BFE_INT T14.Z, PV.Z, 0.0, 1,
2164 ; EG-NEXT: LSHR T0.W, T11.X, literal.y,
2165 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
2166 ; EG-NEXT: 15(2.101948e-44), 9(1.261169e-44)
2167 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
2168 ; EG-NEXT: LSHR T15.X, PS, literal.x,
2169 ; EG-NEXT: BFE_INT T14.Y, PV.W, 0.0, 1,
2170 ; EG-NEXT: LSHR T0.Z, T11.X, literal.y,
2171 ; EG-NEXT: BFE_INT T16.W, PV.Y, 0.0, 1,
2172 ; EG-NEXT: LSHR * T0.W, T11.X, literal.z,
2173 ; EG-NEXT: 2(2.802597e-45), 14(1.961818e-44)
2174 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
2175 ; EG-NEXT: BFE_INT T14.X, PS, 0.0, 1,
2176 ; EG-NEXT: LSHR T0.Y, T11.X, literal.x,
2177 ; EG-NEXT: BFE_INT T16.Z, PV.Z, 0.0, 1,
2178 ; EG-NEXT: LSHR T0.W, T11.X, literal.y,
2179 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
2180 ; EG-NEXT: 19(2.662467e-44), 13(1.821688e-44)
2181 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
2182 ; EG-NEXT: LSHR T17.X, PS, literal.x,
2183 ; EG-NEXT: BFE_INT T16.Y, PV.W, 0.0, 1,
2184 ; EG-NEXT: LSHR T0.Z, T11.X, literal.y,
2185 ; EG-NEXT: BFE_INT T18.W, PV.Y, 0.0, 1,
2186 ; EG-NEXT: LSHR * T0.W, T11.X, literal.z,
2187 ; EG-NEXT: 2(2.802597e-45), 18(2.522337e-44)
2188 ; EG-NEXT: 12(1.681558e-44), 0(0.000000e+00)
2189 ; EG-NEXT: BFE_INT T16.X, PS, 0.0, 1,
2190 ; EG-NEXT: LSHR T0.Y, T11.X, literal.x,
2191 ; EG-NEXT: BFE_INT T18.Z, PV.Z, 0.0, 1,
2192 ; EG-NEXT: LSHR T0.W, T11.X, literal.y,
2193 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
2194 ; EG-NEXT: 23(3.222986e-44), 17(2.382207e-44)
2195 ; EG-NEXT: 48(6.726233e-44), 0(0.000000e+00)
2196 ; EG-NEXT: LSHR T19.X, PS, literal.x,
2197 ; EG-NEXT: BFE_INT T18.Y, PV.W, 0.0, 1,
2198 ; EG-NEXT: LSHR T0.Z, T11.X, literal.y,
2199 ; EG-NEXT: BFE_INT T20.W, PV.Y, 0.0, 1,
2200 ; EG-NEXT: LSHR * T0.W, T11.X, literal.z,
2201 ; EG-NEXT: 2(2.802597e-45), 22(3.082857e-44)
2202 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
2203 ; EG-NEXT: BFE_INT T18.X, PS, 0.0, 1,
2204 ; EG-NEXT: LSHR T0.Y, T11.X, literal.x,
2205 ; EG-NEXT: BFE_INT T20.Z, PV.Z, 0.0, 1,
2206 ; EG-NEXT: LSHR T0.W, T11.X, literal.y,
2207 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
2208 ; EG-NEXT: 27(3.783506e-44), 21(2.942727e-44)
2209 ; EG-NEXT: 64(8.968310e-44), 0(0.000000e+00)
2210 ; EG-NEXT: LSHR T21.X, PS, literal.x,
2211 ; EG-NEXT: BFE_INT T20.Y, PV.W, 0.0, 1,
2212 ; EG-NEXT: LSHR T0.Z, T11.X, literal.y,
2213 ; EG-NEXT: BFE_INT T22.W, PV.Y, 0.0, 1,
2214 ; EG-NEXT: LSHR * T0.W, T11.X, literal.z,
2215 ; EG-NEXT: 2(2.802597e-45), 26(3.643376e-44)
2216 ; EG-NEXT: 20(2.802597e-44), 0(0.000000e+00)
2217 ; EG-NEXT: BFE_INT T20.X, PS, 0.0, 1,
2218 ; EG-NEXT: BFE_INT T22.Z, PV.Z, 0.0, 1,
2219 ; EG-NEXT: LSHR T0.W, T11.X, literal.x,
2220 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,
2221 ; EG-NEXT: 25(3.503246e-44), 80(1.121039e-43)
2222 ; EG-NEXT: LSHR T23.X, PS, literal.x,
2223 ; EG-NEXT: BFE_INT T22.Y, PV.W, 0.0, 1,
2224 ; EG-NEXT: LSHR * T0.W, T11.X, literal.y,
2225 ; EG-NEXT: 2(2.802597e-45), 24(3.363116e-44)
2226 ; EG-NEXT: BFE_INT T22.X, PV.W, 0.0, 1,
2227 ; EG-NEXT: LSHR T0.W, T11.X, literal.x,
2228 ; EG-NEXT: ASHR * T24.W, T11.X, literal.y,
2229 ; EG-NEXT: 30(4.203895e-44), 31(4.344025e-44)
2230 ; EG-NEXT: BFE_INT T25.X, T11.X, 0.0, 1,
2231 ; EG-NEXT: LSHR T0.Y, T11.X, literal.x,
2232 ; EG-NEXT: BFE_INT T24.Z, PV.W, 0.0, 1,
2233 ; EG-NEXT: LSHR T0.W, T11.X, literal.y,
2234 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
2235 ; EG-NEXT: 3(4.203895e-45), 29(4.063766e-44)
2236 ; EG-NEXT: 96(1.345247e-43), 0(0.000000e+00)
2237 ; EG-NEXT: LSHR T26.X, PS, literal.x,
2238 ; EG-NEXT: BFE_INT T24.Y, PV.W, 0.0, 1,
2239 ; EG-NEXT: LSHR T0.Z, T11.X, literal.x,
2240 ; EG-NEXT: BFE_INT T25.W, PV.Y, 0.0, 1,
2241 ; EG-NEXT: LSHR * T0.W, T11.X, literal.y,
2242 ; EG-NEXT: 2(2.802597e-45), 28(3.923636e-44)
2243 ; EG-NEXT: BFE_INT T24.X, PS, 0.0, 1,
2244 ; EG-NEXT: BFE_INT * T25.Z, PV.Z, 0.0, 1,
2245 ; EG-NEXT: ALU clause starting at 117:
2246 ; EG-NEXT: LSHR T0.W, T11.X, 1,
2247 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.x,
2248 ; EG-NEXT: 112(1.569454e-43), 0(0.000000e+00)
2249 ; EG-NEXT: LSHR T11.X, PS, literal.x,
2250 ; EG-NEXT: BFE_INT * T25.Y, PV.W, 0.0, 1,
2251 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
2252 %load = load <32 x i1>, ptr addrspace(4) %in
2253 %ext = sext <32 x i1> %load to <32 x i32>
2254 store <32 x i32> %ext, ptr addrspace(1) %out
2255 ret void
2256 }
2258 define amdgpu_kernel void @constant_zextload_v64i1_to_v64i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
2259 ; GFX6-LABEL: constant_zextload_v64i1_to_v64i32:
2260 ; GFX6: ; %bb.0:
2261 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
2262 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
2263 ; GFX6-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
2264 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
2265 ; GFX6-NEXT: s_bfe_u32 s4, s2, 0x10003
2266 ; GFX6-NEXT: s_bfe_u32 s5, s2, 0x10001
2267 ; GFX6-NEXT: s_bfe_u32 s6, s2, 0x10007
2268 ; GFX6-NEXT: s_bfe_u32 s7, s2, 0x10005
2269 ; GFX6-NEXT: s_bfe_u32 s8, s2, 0x1000b
2270 ; GFX6-NEXT: s_bfe_u32 s9, s2, 0x10009
2271 ; GFX6-NEXT: s_bfe_u32 s10, s2, 0x1000f
2272 ; GFX6-NEXT: s_bfe_u32 s11, s2, 0x1000d
2273 ; GFX6-NEXT: s_bfe_u32 s12, s2, 0x10013
2274 ; GFX6-NEXT: s_bfe_u32 s13, s2, 0x10011
2275 ; GFX6-NEXT: s_bfe_u32 s14, s2, 0x10017
2276 ; GFX6-NEXT: s_bfe_u32 s15, s2, 0x10015
2277 ; GFX6-NEXT: s_bfe_u32 s16, s2, 0x1001b
2278 ; GFX6-NEXT: s_bfe_u32 s17, s2, 0x10019
2279 ; GFX6-NEXT: s_lshr_b32 s18, s2, 31
2280 ; GFX6-NEXT: s_bfe_u32 s19, s2, 0x1001d
2281 ; GFX6-NEXT: s_bfe_u32 s20, s3, 0x10003
2282 ; GFX6-NEXT: s_bfe_u32 s21, s3, 0x10001
2283 ; GFX6-NEXT: s_bfe_u32 s22, s3, 0x10007
2284 ; GFX6-NEXT: s_bfe_u32 s23, s3, 0x10005
2285 ; GFX6-NEXT: s_bfe_u32 s24, s3, 0x1000b
2286 ; GFX6-NEXT: s_bfe_u32 s25, s3, 0x10009
2287 ; GFX6-NEXT: s_bfe_u32 s26, s3, 0x1000f
2288 ; GFX6-NEXT: s_bfe_u32 s27, s3, 0x1000d
2289 ; GFX6-NEXT: s_bfe_u32 s28, s3, 0x10013
2290 ; GFX6-NEXT: s_bfe_u32 s29, s3, 0x10011
2291 ; GFX6-NEXT: s_bfe_u32 s30, s3, 0x10017
2292 ; GFX6-NEXT: s_bfe_u32 s31, s3, 0x10015
2293 ; GFX6-NEXT: s_bfe_u32 s33, s3, 0x1001b
2294 ; GFX6-NEXT: s_bfe_u32 s34, s3, 0x10019
2295 ; GFX6-NEXT: s_lshr_b32 s35, s3, 31
2296 ; GFX6-NEXT: s_bfe_u32 s36, s3, 0x1001d
2297 ; GFX6-NEXT: s_and_b32 s37, s2, 1
2298 ; GFX6-NEXT: s_bfe_u32 s38, s2, 0x10002
2299 ; GFX6-NEXT: s_bfe_u32 s39, s2, 0x10006
2300 ; GFX6-NEXT: s_bfe_u32 s40, s2, 0x10004
2301 ; GFX6-NEXT: s_bfe_u32 s41, s2, 0x1000a
2302 ; GFX6-NEXT: s_bfe_u32 s42, s2, 0x10008
2303 ; GFX6-NEXT: s_bfe_u32 s43, s2, 0x1000e
2304 ; GFX6-NEXT: s_bfe_u32 s44, s2, 0x1000c
2305 ; GFX6-NEXT: s_bfe_u32 s45, s2, 0x10012
2306 ; GFX6-NEXT: s_bfe_u32 s46, s2, 0x10010
2307 ; GFX6-NEXT: s_bfe_u32 s47, s2, 0x10016
2308 ; GFX6-NEXT: s_bfe_u32 s48, s2, 0x10014
2309 ; GFX6-NEXT: s_bfe_u32 s49, s2, 0x1001a
2310 ; GFX6-NEXT: s_bfe_u32 s50, s2, 0x10018
2311 ; GFX6-NEXT: s_bfe_u32 s51, s2, 0x1001e
2312 ; GFX6-NEXT: s_bfe_u32 s52, s2, 0x1001c
2313 ; GFX6-NEXT: s_and_b32 s53, s3, 1
2314 ; GFX6-NEXT: s_bfe_u32 s54, s3, 0x10002
2315 ; GFX6-NEXT: s_bfe_u32 s55, s3, 0x10006
2316 ; GFX6-NEXT: s_bfe_u32 s56, s3, 0x10004
2317 ; GFX6-NEXT: s_bfe_u32 s57, s3, 0x1000a
2318 ; GFX6-NEXT: s_bfe_u32 s58, s3, 0x10008
2319 ; GFX6-NEXT: s_bfe_u32 s59, s3, 0x1000e
2320 ; GFX6-NEXT: s_bfe_u32 s60, s3, 0x10012
2321 ; GFX6-NEXT: s_bfe_u32 s61, s3, 0x10010
2322 ; GFX6-NEXT: s_bfe_u32 s62, s3, 0x10016
2323 ; GFX6-NEXT: s_bfe_u32 s63, s3, 0x1001a
2324 ; GFX6-NEXT: s_bfe_u32 s64, s3, 0x10018
2325 ; GFX6-NEXT: s_bfe_u32 s65, s3, 0x1001e
2326 ; GFX6-NEXT: s_bfe_u32 s66, s3, 0x1001c
2327 ; GFX6-NEXT: s_bfe_u32 s67, s3, 0x10014
2328 ; GFX6-NEXT: s_bfe_u32 s68, s3, 0x1000c
2329 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
2330 ; GFX6-NEXT: s_mov_b32 s2, -1
2331 ; GFX6-NEXT: v_mov_b32_e32 v0, s66
2332 ; GFX6-NEXT: v_mov_b32_e32 v1, s36
2333 ; GFX6-NEXT: v_mov_b32_e32 v2, s65
2334 ; GFX6-NEXT: v_mov_b32_e32 v3, s35
2335 ; GFX6-NEXT: v_mov_b32_e32 v4, s64
2336 ; GFX6-NEXT: v_mov_b32_e32 v5, s34
2337 ; GFX6-NEXT: v_mov_b32_e32 v6, s63
2338 ; GFX6-NEXT: v_mov_b32_e32 v7, s33
2339 ; GFX6-NEXT: v_mov_b32_e32 v8, s67
2340 ; GFX6-NEXT: v_mov_b32_e32 v9, s31
2341 ; GFX6-NEXT: v_mov_b32_e32 v10, s62
2342 ; GFX6-NEXT: v_mov_b32_e32 v11, s30
2343 ; GFX6-NEXT: v_mov_b32_e32 v12, s61
2344 ; GFX6-NEXT: v_mov_b32_e32 v13, s29
2345 ; GFX6-NEXT: v_mov_b32_e32 v14, s60
2346 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
2347 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224
2348 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208
2349 ; GFX6-NEXT: v_mov_b32_e32 v15, s28
2350 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192
2351 ; GFX6-NEXT: s_waitcnt expcnt(3)
2352 ; GFX6-NEXT: v_mov_b32_e32 v0, s68
2353 ; GFX6-NEXT: v_mov_b32_e32 v1, s27
2354 ; GFX6-NEXT: v_mov_b32_e32 v2, s59
2355 ; GFX6-NEXT: v_mov_b32_e32 v3, s26
2356 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
2357 ; GFX6-NEXT: s_waitcnt expcnt(0)
2358 ; GFX6-NEXT: v_mov_b32_e32 v0, s58
2359 ; GFX6-NEXT: v_mov_b32_e32 v1, s25
2360 ; GFX6-NEXT: v_mov_b32_e32 v2, s57
2361 ; GFX6-NEXT: v_mov_b32_e32 v3, s24
2362 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
2363 ; GFX6-NEXT: s_waitcnt expcnt(0)
2364 ; GFX6-NEXT: v_mov_b32_e32 v0, s56
2365 ; GFX6-NEXT: v_mov_b32_e32 v1, s23
2366 ; GFX6-NEXT: v_mov_b32_e32 v2, s55
2367 ; GFX6-NEXT: v_mov_b32_e32 v3, s22
2368 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
2369 ; GFX6-NEXT: s_waitcnt expcnt(0)
2370 ; GFX6-NEXT: v_mov_b32_e32 v0, s53
2371 ; GFX6-NEXT: v_mov_b32_e32 v1, s21
2372 ; GFX6-NEXT: v_mov_b32_e32 v2, s54
2373 ; GFX6-NEXT: v_mov_b32_e32 v3, s20
2374 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
2375 ; GFX6-NEXT: s_waitcnt expcnt(0)
2376 ; GFX6-NEXT: v_mov_b32_e32 v0, s52
2377 ; GFX6-NEXT: v_mov_b32_e32 v1, s19
2378 ; GFX6-NEXT: v_mov_b32_e32 v2, s51
2379 ; GFX6-NEXT: v_mov_b32_e32 v3, s18
2380 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
2381 ; GFX6-NEXT: s_waitcnt expcnt(0)
2382 ; GFX6-NEXT: v_mov_b32_e32 v0, s50
2383 ; GFX6-NEXT: v_mov_b32_e32 v1, s17
2384 ; GFX6-NEXT: v_mov_b32_e32 v2, s49
2385 ; GFX6-NEXT: v_mov_b32_e32 v3, s16
2386 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
2387 ; GFX6-NEXT: s_waitcnt expcnt(0)
2388 ; GFX6-NEXT: v_mov_b32_e32 v0, s48
2389 ; GFX6-NEXT: v_mov_b32_e32 v1, s15
2390 ; GFX6-NEXT: v_mov_b32_e32 v2, s47
2391 ; GFX6-NEXT: v_mov_b32_e32 v3, s14
2392 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
2393 ; GFX6-NEXT: s_waitcnt expcnt(0)
2394 ; GFX6-NEXT: v_mov_b32_e32 v0, s46
2395 ; GFX6-NEXT: v_mov_b32_e32 v1, s13
2396 ; GFX6-NEXT: v_mov_b32_e32 v2, s45
2397 ; GFX6-NEXT: v_mov_b32_e32 v3, s12
2398 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
2399 ; GFX6-NEXT: s_waitcnt expcnt(0)
2400 ; GFX6-NEXT: v_mov_b32_e32 v0, s44
2401 ; GFX6-NEXT: v_mov_b32_e32 v1, s11
2402 ; GFX6-NEXT: v_mov_b32_e32 v2, s43
2403 ; GFX6-NEXT: v_mov_b32_e32 v3, s10
2404 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
2405 ; GFX6-NEXT: s_waitcnt expcnt(0)
2406 ; GFX6-NEXT: v_mov_b32_e32 v0, s42
2407 ; GFX6-NEXT: v_mov_b32_e32 v1, s9
2408 ; GFX6-NEXT: v_mov_b32_e32 v2, s41
2409 ; GFX6-NEXT: v_mov_b32_e32 v3, s8
2410 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
2411 ; GFX6-NEXT: s_waitcnt expcnt(0)
2412 ; GFX6-NEXT: v_mov_b32_e32 v0, s40
2413 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
2414 ; GFX6-NEXT: v_mov_b32_e32 v2, s39
2415 ; GFX6-NEXT: v_mov_b32_e32 v3, s6
2416 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
2417 ; GFX6-NEXT: s_waitcnt expcnt(0)
2418 ; GFX6-NEXT: v_mov_b32_e32 v0, s37
2419 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
2420 ; GFX6-NEXT: v_mov_b32_e32 v2, s38
2421 ; GFX6-NEXT: v_mov_b32_e32 v3, s4
2422 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
2423 ; GFX6-NEXT: s_endpgm
2424 ;
2425 ; GFX8-LABEL: constant_zextload_v64i1_to_v64i32:
2426 ; GFX8: ; %bb.0:
2427 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
2428 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
2429 ; GFX8-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
2430 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
2431 ; GFX8-NEXT: s_lshr_b32 s6, s3, 24
2432 ; GFX8-NEXT: s_lshr_b32 s8, s2, 24
2433 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x10018
2434 ; GFX8-NEXT: s_bfe_u32 s5, s3, 0x10018
2435 ; GFX8-NEXT: s_and_b32 s7, s3, 1
2436 ; GFX8-NEXT: s_and_b32 s9, s2, 1
2437 ; GFX8-NEXT: s_bfe_u32 s12, s2, 0x10013
2438 ; GFX8-NEXT: s_bfe_u32 s13, s2, 0x10012
2439 ; GFX8-NEXT: s_bfe_u32 s14, s2, 0x10011
2440 ; GFX8-NEXT: s_bfe_u32 s15, s2, 0x10010
2441 ; GFX8-NEXT: s_bfe_u32 s16, s2, 0x10017
2442 ; GFX8-NEXT: s_bfe_u32 s17, s2, 0x10016
2443 ; GFX8-NEXT: s_bfe_u32 s18, s2, 0x10015
2444 ; GFX8-NEXT: s_bfe_u32 s19, s2, 0x10014
2445 ; GFX8-NEXT: s_bfe_u32 s20, s3, 0x10013
2446 ; GFX8-NEXT: s_bfe_u32 s21, s3, 0x10012
2447 ; GFX8-NEXT: s_bfe_u32 s22, s3, 0x10011
2448 ; GFX8-NEXT: s_bfe_u32 s23, s3, 0x10010
2449 ; GFX8-NEXT: s_bfe_u32 s10, s3, 0x10017
2450 ; GFX8-NEXT: s_bfe_u32 s11, s3, 0x10016
2451 ; GFX8-NEXT: s_bfe_u32 s24, s3, 0x10015
2452 ; GFX8-NEXT: s_bfe_u32 s25, s3, 0x10014
2453 ; GFX8-NEXT: v_mov_b32_e32 v25, s10
2454 ; GFX8-NEXT: s_add_u32 s10, s0, 0xd0
2455 ; GFX8-NEXT: v_mov_b32_e32 v24, s11
2456 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2457 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
2458 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
2459 ; GFX8-NEXT: s_add_u32 s10, s0, 0xc0
2460 ; GFX8-NEXT: v_mov_b32_e32 v22, s25
2461 ; GFX8-NEXT: v_mov_b32_e32 v23, s24
2462 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2463 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
2464 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
2465 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
2466 ; GFX8-NEXT: s_add_u32 s10, s0, 0x50
2467 ; GFX8-NEXT: v_mov_b32_e32 v22, s23
2468 ; GFX8-NEXT: v_mov_b32_e32 v23, s22
2469 ; GFX8-NEXT: v_mov_b32_e32 v24, s21
2470 ; GFX8-NEXT: v_mov_b32_e32 v25, s20
2471 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2472 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
2473 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
2474 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
2475 ; GFX8-NEXT: s_add_u32 s10, s0, 64
2476 ; GFX8-NEXT: v_mov_b32_e32 v22, s19
2477 ; GFX8-NEXT: v_mov_b32_e32 v23, s18
2478 ; GFX8-NEXT: v_mov_b32_e32 v24, s17
2479 ; GFX8-NEXT: v_mov_b32_e32 v25, s16
2480 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2481 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
2482 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
2483 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
2484 ; GFX8-NEXT: s_add_u32 s10, s0, 48
2485 ; GFX8-NEXT: v_mov_b32_e32 v22, s15
2486 ; GFX8-NEXT: v_mov_b32_e32 v23, s14
2487 ; GFX8-NEXT: v_mov_b32_e32 v24, s13
2488 ; GFX8-NEXT: v_mov_b32_e32 v25, s12
2489 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2490 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 13, s2
2491 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
2492 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 12, s2
2493 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 7, s3
2494 ; GFX8-NEXT: v_mov_b32_e32 v25, s11
2495 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 14, s2
2496 ; GFX8-NEXT: v_and_b32_e32 v21, 1, v0
2497 ; GFX8-NEXT: v_and_b32_e32 v27, 1, v22
2498 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 1, s3
2499 ; GFX8-NEXT: v_mov_b32_e32 v24, s10
2500 ; GFX8-NEXT: s_add_u32 s10, s0, 32
2501 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 9, s2
2502 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 11, s2
2503 ; GFX8-NEXT: v_and_b32_e32 v28, 1, v22
2504 ; GFX8-NEXT: v_and_b32_e32 v22, 1, v20
2505 ; GFX8-NEXT: v_lshrrev_b16_e64 v23, 15, s2
2506 ; GFX8-NEXT: v_and_b32_e32 v21, 0xffff, v21
2507 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v19
2508 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2509 ; GFX8-NEXT: v_mov_b32_e32 v14, s2
2510 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 10, s2
2511 ; GFX8-NEXT: v_and_b32_e32 v17, 1, v1
2512 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v2
2513 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 5, s2
2514 ; GFX8-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
2515 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 3, s3
2516 ; GFX8-NEXT: v_mov_b32_e32 v25, 1
2517 ; GFX8-NEXT: v_mov_b32_e32 v21, s11
2518 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v0
2519 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 7, s2
2520 ; GFX8-NEXT: v_and_b32_e32 v23, 1, v19
2521 ; GFX8-NEXT: v_and_b32_e32 v19, 0xffff, v18
2522 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v16
2523 ; GFX8-NEXT: v_and_b32_e32 v17, 0xffff, v17
2524 ; GFX8-NEXT: v_and_b32_sdwa v16, v14, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
2525 ; GFX8-NEXT: v_mov_b32_e32 v20, s10
2526 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 5, s6
2527 ; GFX8-NEXT: v_and_b32_e32 v15, 1, v0
2528 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
2529 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v14
2530 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 1, s6
2531 ; GFX8-NEXT: s_add_u32 s10, s0, 16
2532 ; GFX8-NEXT: v_and_b32_e32 v17, 1, v14
2533 ; GFX8-NEXT: v_and_b32_e32 v14, 0xffff, v15
2534 ; GFX8-NEXT: v_lshrrev_b16_e64 v15, 3, s6
2535 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2536 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 4, s2
2537 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 6, s2
2538 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 1, s2
2539 ; GFX8-NEXT: v_and_b32_e32 v19, 1, v15
2540 ; GFX8-NEXT: v_mov_b32_e32 v16, s11
2541 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v0
2542 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 3, s2
2543 ; GFX8-NEXT: v_and_b32_e32 v13, 1, v13
2544 ; GFX8-NEXT: v_and_b32_e32 v12, 0xffff, v12
2545 ; GFX8-NEXT: v_and_b32_e32 v11, 1, v11
2546 ; GFX8-NEXT: v_mov_b32_e32 v15, s10
2547 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 2, s2
2548 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v0
2549 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
2550 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 13, s3
2551 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 5, s8
2552 ; GFX8-NEXT: v_mov_b32_e32 v13, s1
2553 ; GFX8-NEXT: v_and_b32_e32 v15, 1, v11
2554 ; GFX8-NEXT: v_and_b32_e32 v11, 0xffff, v10
2555 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v9
2556 ; GFX8-NEXT: v_and_b32_e32 v9, 0xffff, v8
2557 ; GFX8-NEXT: v_mov_b32_e32 v8, s9
2558 ; GFX8-NEXT: v_mov_b32_e32 v12, s0
2559 ; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
2560 ; GFX8-NEXT: s_add_u32 s10, s0, 0xb0
2561 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 1, s8
2562 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 12, s3
2563 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v0
2564 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 14, s3
2565 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 9, s3
2566 ; GFX8-NEXT: v_and_b32_e32 v11, 1, v8
2567 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 3, s8
2568 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
2569 ; GFX8-NEXT: v_mov_b32_e32 v9, s10
2570 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v0
2571 ; GFX8-NEXT: v_and_b32_e32 v13, 1, v8
2572 ; GFX8-NEXT: v_and_b32_e32 v7, 1, v7
2573 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 15, s3
2574 ; GFX8-NEXT: v_and_b32_e32 v6, 0xffff, v6
2575 ; GFX8-NEXT: v_and_b32_e32 v5, 1, v5
2576 ; GFX8-NEXT: v_mov_b32_e32 v10, s11
2577 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 10, s3
2578 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 11, s3
2579 ; GFX8-NEXT: v_lshrrev_b16_e64 v18, 2, s6
2580 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 4, s8
2581 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 6, s8
2582 ; GFX8-NEXT: flat_store_dwordx4 v[9:10], v[5:8]
2583 ; GFX8-NEXT: s_add_u32 s2, s0, 0xa0
2584 ; GFX8-NEXT: v_and_b32_e32 v7, 0xffff, v13
2585 ; GFX8-NEXT: v_and_b32_e32 v13, 0xffff, v17
2586 ; GFX8-NEXT: v_and_b32_e32 v17, 0xffff, v2
2587 ; GFX8-NEXT: v_mov_b32_e32 v2, s3
2588 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v0
2589 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 4, s3
2590 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 5, s3
2591 ; GFX8-NEXT: v_lshrrev_b16_e64 v26, 6, s3
2592 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 2, s3
2593 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v16
2594 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v14
2595 ; GFX8-NEXT: v_and_b32_e32 v14, 1, v18
2596 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v3
2597 ; GFX8-NEXT: v_and_b32_sdwa v16, v2, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
2598 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2599 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
2600 ; GFX8-NEXT: v_and_b32_e32 v1, 1, v1
2601 ; GFX8-NEXT: v_and_b32_e32 v9, 0xffff, v15
2602 ; GFX8-NEXT: v_and_b32_e32 v15, 0xffff, v19
2603 ; GFX8-NEXT: v_and_b32_e32 v19, 0xffff, v4
2604 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
2605 ; GFX8-NEXT: s_add_u32 s2, s0, 0x90
2606 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[16:19]
2607 ; GFX8-NEXT: v_and_b32_e32 v21, 0xffff, v1
2608 ; GFX8-NEXT: v_and_b32_e32 v17, 0xffff, v20
2609 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v0
2610 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2611 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
2612 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 6, s6
2613 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
2614 ; GFX8-NEXT: s_add_u32 s2, s0, 0x80
2615 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v4
2616 ; GFX8-NEXT: v_and_b32_e32 v4, 0xffff, v23
2617 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v22
2618 ; GFX8-NEXT: v_and_b32_e32 v23, 0xffff, v27
2619 ; GFX8-NEXT: v_and_b32_e32 v22, 1, v26
2620 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2621 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[20:23]
2622 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v28
2623 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
2624 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
2625 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
2626 ; GFX8-NEXT: s_add_u32 s2, s0, 0xf0
2627 ; GFX8-NEXT: v_lshrrev_b16_e64 v24, 4, s6
2628 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[1:4]
2629 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2630 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
2631 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 7, s6
2632 ; GFX8-NEXT: v_and_b32_e32 v16, 1, v24
2633 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
2634 ; GFX8-NEXT: s_add_u32 s2, s0, 0xe0
2635 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 2, s8
2636 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
2637 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2638 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
2639 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v12
2640 ; GFX8-NEXT: v_mov_b32_e32 v12, s5
2641 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
2642 ; GFX8-NEXT: s_add_u32 s2, s0, 0x70
2643 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[12:15]
2644 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
2645 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
2646 ; GFX8-NEXT: v_and_b32_e32 v5, 0xffff, v11
2647 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 7, s8
2648 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
2649 ; GFX8-NEXT: s_add_u32 s0, s0, 0x60
2650 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
2651 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
2652 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
2653 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
2654 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
2655 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
2656 ; GFX8-NEXT: s_endpgm
2657 ;
2658 ; EG-LABEL: constant_zextload_v64i1_to_v64i32:
2659 ; EG: ; %bb.0:
2660 ; EG-NEXT: ALU 0, @24, KC0[CB0:0-32], KC1[]
2661 ; EG-NEXT: TEX 0 @22
2662 ; EG-NEXT: ALU 96, @25, KC0[CB0:0-32], KC1[]
2663 ; EG-NEXT: ALU 57, @122, KC0[CB0:0-32], KC1[]
2664 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T48.XYZW, T50.X, 0
2665 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T46.XYZW, T49.X, 0
2666 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T44.XYZW, T47.X, 0
2667 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T42.XYZW, T45.X, 0
2668 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T40.XYZW, T43.X, 0
2669 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T41.X, 0
2670 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T39.X, 0
2671 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T35.XYZW, T37.X, 0
2672 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T33.XYZW, T21.X, 0
2673 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T31.XYZW, T34.X, 0
2674 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T29.XYZW, T32.X, 0
2675 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T27.XYZW, T30.X, 0
2676 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T28.X, 0
2677 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T26.X, 0
2678 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T24.X, 0
2679 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T22.X, 1
2680 ; EG-NEXT: CF_END
2681 ; EG-NEXT: PAD
2682 ; EG-NEXT: Fetch clause starting at 22:
2683 ; EG-NEXT: VTX_READ_64 T21.XY, T19.X, 0, #1
2684 ; EG-NEXT: ALU clause starting at 24:
2685 ; EG-NEXT: MOV * T19.X, KC0[2].Z,
2686 ; EG-NEXT: ALU clause starting at 25:
2687 ; EG-NEXT: BFE_UINT * T19.W, T21.X, literal.x, 1,
2688 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
2689 ; EG-NEXT: BFE_UINT * T19.Z, T21.X, literal.x, 1,
2690 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
2691 ; EG-NEXT: BFE_UINT T19.Y, T21.X, 1, 1,
2692 ; EG-NEXT: BFE_UINT * T20.W, T21.X, literal.x, 1,
2693 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
2694 ; EG-NEXT: AND_INT T19.X, T21.X, 1,
2695 ; EG-NEXT: BFE_UINT T20.Z, T21.X, literal.x, 1,
2696 ; EG-NEXT: LSHR * T22.X, KC0[2].Y, literal.y,
2697 ; EG-NEXT: 6(8.407791e-45), 2(2.802597e-45)
2698 ; EG-NEXT: BFE_UINT T20.Y, T21.X, literal.x, 1,
2699 ; EG-NEXT: BFE_UINT * T23.W, T21.X, literal.y, 1,
2700 ; EG-NEXT: 5(7.006492e-45), 11(1.541428e-44)
2701 ; EG-NEXT: BFE_UINT T20.X, T21.X, literal.x, 1,
2702 ; EG-NEXT: BFE_UINT T23.Z, T21.X, literal.y, 1,
2703 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2704 ; EG-NEXT: 4(5.605194e-45), 10(1.401298e-44)
2705 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
2706 ; EG-NEXT: LSHR T24.X, PV.W, literal.x,
2707 ; EG-NEXT: BFE_UINT T23.Y, T21.X, literal.y, 1,
2708 ; EG-NEXT: BFE_UINT * T25.W, T21.X, literal.z, 1,
2709 ; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)
2710 ; EG-NEXT: 15(2.101948e-44), 0(0.000000e+00)
2711 ; EG-NEXT: BFE_UINT T23.X, T21.X, literal.x, 1,
2712 ; EG-NEXT: BFE_UINT T25.Z, T21.X, literal.y, 1,
2713 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2714 ; EG-NEXT: 8(1.121039e-44), 14(1.961818e-44)
2715 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
2716 ; EG-NEXT: LSHR T26.X, PV.W, literal.x,
2717 ; EG-NEXT: BFE_UINT T25.Y, T21.X, literal.y, 1,
2718 ; EG-NEXT: BFE_UINT * T27.W, T21.X, literal.z, 1,
2719 ; EG-NEXT: 2(2.802597e-45), 13(1.821688e-44)
2720 ; EG-NEXT: 19(2.662467e-44), 0(0.000000e+00)
2721 ; EG-NEXT: BFE_UINT T25.X, T21.X, literal.x, 1,
2722 ; EG-NEXT: BFE_UINT T27.Z, T21.X, literal.y, 1,
2723 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2724 ; EG-NEXT: 12(1.681558e-44), 18(2.522337e-44)
2725 ; EG-NEXT: 48(6.726233e-44), 0(0.000000e+00)
2726 ; EG-NEXT: LSHR T28.X, PV.W, literal.x,
2727 ; EG-NEXT: BFE_UINT T27.Y, T21.X, literal.y, 1,
2728 ; EG-NEXT: BFE_UINT * T29.W, T21.X, literal.z, 1,
2729 ; EG-NEXT: 2(2.802597e-45), 17(2.382207e-44)
2730 ; EG-NEXT: 23(3.222986e-44), 0(0.000000e+00)
2731 ; EG-NEXT: BFE_UINT T27.X, T21.X, literal.x, 1,
2732 ; EG-NEXT: BFE_UINT T29.Z, T21.X, literal.y, 1,
2733 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2734 ; EG-NEXT: 16(2.242078e-44), 22(3.082857e-44)
2735 ; EG-NEXT: 64(8.968310e-44), 0(0.000000e+00)
2736 ; EG-NEXT: LSHR T30.X, PV.W, literal.x,
2737 ; EG-NEXT: BFE_UINT T29.Y, T21.X, literal.y, 1,
2738 ; EG-NEXT: BFE_UINT * T31.W, T21.X, literal.z, 1,
2739 ; EG-NEXT: 2(2.802597e-45), 21(2.942727e-44)
2740 ; EG-NEXT: 27(3.783506e-44), 0(0.000000e+00)
2741 ; EG-NEXT: BFE_UINT T29.X, T21.X, literal.x, 1,
2742 ; EG-NEXT: BFE_UINT T31.Z, T21.X, literal.y, 1,
2743 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2744 ; EG-NEXT: 20(2.802597e-44), 26(3.643376e-44)
2745 ; EG-NEXT: 80(1.121039e-43), 0(0.000000e+00)
2746 ; EG-NEXT: LSHR T32.X, PV.W, literal.x,
2747 ; EG-NEXT: BFE_UINT T31.Y, T21.X, literal.y, 1,
2748 ; EG-NEXT: LSHR * T33.W, T21.X, literal.z,
2749 ; EG-NEXT: 2(2.802597e-45), 25(3.503246e-44)
2750 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2751 ; EG-NEXT: BFE_UINT T31.X, T21.X, literal.x, 1,
2752 ; EG-NEXT: BFE_UINT T33.Z, T21.X, literal.y, 1,
2753 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2754 ; EG-NEXT: 24(3.363116e-44), 30(4.203895e-44)
2755 ; EG-NEXT: 96(1.345247e-43), 0(0.000000e+00)
2756 ; EG-NEXT: LSHR T34.X, PV.W, literal.x,
2757 ; EG-NEXT: BFE_UINT T33.Y, T21.X, literal.y, 1,
2758 ; EG-NEXT: BFE_UINT * T35.W, T21.Y, literal.z, 1,
2759 ; EG-NEXT: 2(2.802597e-45), 29(4.063766e-44)
2760 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
2761 ; EG-NEXT: BFE_UINT T33.X, T21.X, literal.x, 1,
2762 ; EG-NEXT: BFE_UINT T35.Z, T21.Y, literal.y, 1,
2763 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2764 ; EG-NEXT: 28(3.923636e-44), 2(2.802597e-45)
2765 ; EG-NEXT: 112(1.569454e-43), 0(0.000000e+00)
2766 ; EG-NEXT: LSHR T21.X, PV.W, literal.x,
2767 ; EG-NEXT: BFE_UINT T35.Y, T21.Y, 1, 1,
2768 ; EG-NEXT: BFE_UINT T36.W, T21.Y, literal.y, 1,
2769 ; EG-NEXT: AND_INT * T35.X, T21.Y, 1,
2770 ; EG-NEXT: 2(2.802597e-45), 7(9.809089e-45)
2771 ; EG-NEXT: BFE_UINT T36.Z, T21.Y, literal.x, 1,
2772 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
2773 ; EG-NEXT: 6(8.407791e-45), 128(1.793662e-43)
2774 ; EG-NEXT: LSHR T37.X, PV.W, literal.x,
2775 ; EG-NEXT: BFE_UINT T36.Y, T21.Y, literal.y, 1,
2776 ; EG-NEXT: BFE_UINT * T38.W, T21.Y, literal.z, 1,
2777 ; EG-NEXT: 2(2.802597e-45), 5(7.006492e-45)
2778 ; EG-NEXT: 11(1.541428e-44), 0(0.000000e+00)
2779 ; EG-NEXT: BFE_UINT T36.X, T21.Y, literal.x, 1,
2780 ; EG-NEXT: BFE_UINT T38.Z, T21.Y, literal.y, 1,
2781 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2782 ; EG-NEXT: 4(5.605194e-45), 10(1.401298e-44)
2783 ; EG-NEXT: 144(2.017870e-43), 0(0.000000e+00)
2784 ; EG-NEXT: ALU clause starting at 122:
2785 ; EG-NEXT: LSHR T39.X, T0.W, literal.x,
2786 ; EG-NEXT: BFE_UINT T38.Y, T21.Y, literal.y, 1,
2787 ; EG-NEXT: BFE_UINT * T40.W, T21.Y, literal.z, 1,
2788 ; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)
2789 ; EG-NEXT: 15(2.101948e-44), 0(0.000000e+00)
2790 ; EG-NEXT: BFE_UINT T38.X, T21.Y, literal.x, 1,
2791 ; EG-NEXT: BFE_UINT T40.Z, T21.Y, literal.y, 1,
2792 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2793 ; EG-NEXT: 8(1.121039e-44), 14(1.961818e-44)
2794 ; EG-NEXT: 160(2.242078e-43), 0(0.000000e+00)
2795 ; EG-NEXT: LSHR T41.X, PV.W, literal.x,
2796 ; EG-NEXT: BFE_UINT T40.Y, T21.Y, literal.y, 1,
2797 ; EG-NEXT: BFE_UINT * T42.W, T21.Y, literal.z, 1,
2798 ; EG-NEXT: 2(2.802597e-45), 13(1.821688e-44)
2799 ; EG-NEXT: 19(2.662467e-44), 0(0.000000e+00)
2800 ; EG-NEXT: BFE_UINT T40.X, T21.Y, literal.x, 1,
2801 ; EG-NEXT: BFE_UINT T42.Z, T21.Y, literal.y, 1,
2802 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2803 ; EG-NEXT: 12(1.681558e-44), 18(2.522337e-44)
2804 ; EG-NEXT: 176(2.466285e-43), 0(0.000000e+00)
2805 ; EG-NEXT: LSHR T43.X, PV.W, literal.x,
2806 ; EG-NEXT: BFE_UINT T42.Y, T21.Y, literal.y, 1,
2807 ; EG-NEXT: BFE_UINT * T44.W, T21.Y, literal.z, 1,
2808 ; EG-NEXT: 2(2.802597e-45), 17(2.382207e-44)
2809 ; EG-NEXT: 23(3.222986e-44), 0(0.000000e+00)
2810 ; EG-NEXT: BFE_UINT T42.X, T21.Y, literal.x, 1,
2811 ; EG-NEXT: BFE_UINT T44.Z, T21.Y, literal.y, 1,
2812 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2813 ; EG-NEXT: 16(2.242078e-44), 22(3.082857e-44)
2814 ; EG-NEXT: 192(2.690493e-43), 0(0.000000e+00)
2815 ; EG-NEXT: LSHR T45.X, PV.W, literal.x,
2816 ; EG-NEXT: BFE_UINT T44.Y, T21.Y, literal.y, 1,
2817 ; EG-NEXT: BFE_UINT * T46.W, T21.Y, literal.z, 1,
2818 ; EG-NEXT: 2(2.802597e-45), 21(2.942727e-44)
2819 ; EG-NEXT: 27(3.783506e-44), 0(0.000000e+00)
2820 ; EG-NEXT: BFE_UINT T44.X, T21.Y, literal.x, 1,
2821 ; EG-NEXT: BFE_UINT T46.Z, T21.Y, literal.y, 1,
2822 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2823 ; EG-NEXT: 20(2.802597e-44), 26(3.643376e-44)
2824 ; EG-NEXT: 208(2.914701e-43), 0(0.000000e+00)
2825 ; EG-NEXT: LSHR T47.X, PV.W, literal.x,
2826 ; EG-NEXT: BFE_UINT T46.Y, T21.Y, literal.y, 1,
2827 ; EG-NEXT: LSHR * T48.W, T21.Y, literal.z,
2828 ; EG-NEXT: 2(2.802597e-45), 25(3.503246e-44)
2829 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2830 ; EG-NEXT: BFE_UINT T46.X, T21.Y, literal.x, 1,
2831 ; EG-NEXT: BFE_UINT T48.Z, T21.Y, literal.y, 1,
2832 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.z,
2833 ; EG-NEXT: 24(3.363116e-44), 30(4.203895e-44)
2834 ; EG-NEXT: 224(3.138909e-43), 0(0.000000e+00)
2835 ; EG-NEXT: LSHR T49.X, PV.W, literal.x,
2836 ; EG-NEXT: BFE_UINT * T48.Y, T21.Y, literal.y, 1,
2837 ; EG-NEXT: 2(2.802597e-45), 29(4.063766e-44)
2838 ; EG-NEXT: BFE_UINT T48.X, T21.Y, literal.x, 1,
2839 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
2840 ; EG-NEXT: 28(3.923636e-44), 240(3.363116e-43)
2841 ; EG-NEXT: LSHR * T50.X, PV.W, literal.x,
2842 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
2843 %load = load <64 x i1>, ptr addrspace(4) %in
2844 %ext = zext <64 x i1> %load to <64 x i32>
2845 store <64 x i32> %ext, ptr addrspace(1) %out
2846 ret void
2847 }
2849 define amdgpu_kernel void @constant_sextload_v64i1_to_v64i32(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
2850 ; GFX6-LABEL: constant_sextload_v64i1_to_v64i32:
2851 ; GFX6: ; %bb.0:
2852 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
2853 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
2854 ; GFX6-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
2855 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
2856 ; GFX6-NEXT: s_bfe_i32 s4, s2, 0x10003
2857 ; GFX6-NEXT: s_bfe_i32 s5, s2, 0x10002
2858 ; GFX6-NEXT: s_bfe_i32 s6, s2, 0x10001
2859 ; GFX6-NEXT: s_bfe_i32 s7, s2, 0x10000
2860 ; GFX6-NEXT: s_bfe_i32 s8, s2, 0x10007
2861 ; GFX6-NEXT: s_bfe_i32 s9, s2, 0x10006
2862 ; GFX6-NEXT: s_bfe_i32 s10, s2, 0x10005
2863 ; GFX6-NEXT: s_bfe_i32 s11, s2, 0x10004
2864 ; GFX6-NEXT: s_bfe_i32 s12, s2, 0x1000b
2865 ; GFX6-NEXT: s_bfe_i32 s13, s2, 0x1000a
2866 ; GFX6-NEXT: s_bfe_i32 s14, s2, 0x10009
2867 ; GFX6-NEXT: s_bfe_i32 s15, s2, 0x10008
2868 ; GFX6-NEXT: s_bfe_i32 s16, s2, 0x1000f
2869 ; GFX6-NEXT: s_bfe_i32 s17, s2, 0x1000e
2870 ; GFX6-NEXT: s_bfe_i32 s18, s2, 0x1000d
2871 ; GFX6-NEXT: s_bfe_i32 s19, s2, 0x1000c
2872 ; GFX6-NEXT: s_bfe_i32 s20, s2, 0x10013
2873 ; GFX6-NEXT: s_bfe_i32 s21, s2, 0x10012
2874 ; GFX6-NEXT: s_bfe_i32 s22, s2, 0x10011
2875 ; GFX6-NEXT: s_bfe_i32 s23, s2, 0x10010
2876 ; GFX6-NEXT: s_bfe_i32 s24, s2, 0x10017
2877 ; GFX6-NEXT: s_bfe_i32 s25, s2, 0x10016
2878 ; GFX6-NEXT: s_bfe_i32 s26, s2, 0x10015
2879 ; GFX6-NEXT: s_bfe_i32 s27, s2, 0x10014
2880 ; GFX6-NEXT: s_bfe_i32 s28, s2, 0x1001b
2881 ; GFX6-NEXT: s_bfe_i32 s29, s2, 0x1001a
2882 ; GFX6-NEXT: s_bfe_i32 s30, s2, 0x10019
2883 ; GFX6-NEXT: s_bfe_i32 s31, s2, 0x10018
2884 ; GFX6-NEXT: s_ashr_i32 s33, s2, 31
2885 ; GFX6-NEXT: s_bfe_i32 s34, s2, 0x1001e
2886 ; GFX6-NEXT: s_bfe_i32 s35, s2, 0x1001d
2887 ; GFX6-NEXT: s_bfe_i32 s36, s2, 0x1001c
2888 ; GFX6-NEXT: s_bfe_i32 s37, s3, 0x10003
2889 ; GFX6-NEXT: s_bfe_i32 s38, s3, 0x10002
2890 ; GFX6-NEXT: s_bfe_i32 s39, s3, 0x10001
2891 ; GFX6-NEXT: s_bfe_i32 s40, s3, 0x10000
2892 ; GFX6-NEXT: s_bfe_i32 s41, s3, 0x10007
2893 ; GFX6-NEXT: s_bfe_i32 s42, s3, 0x10006
2894 ; GFX6-NEXT: s_bfe_i32 s43, s3, 0x10005
2895 ; GFX6-NEXT: s_bfe_i32 s44, s3, 0x10004
2896 ; GFX6-NEXT: s_bfe_i32 s45, s3, 0x1000b
2897 ; GFX6-NEXT: s_bfe_i32 s46, s3, 0x1000a
2898 ; GFX6-NEXT: s_bfe_i32 s47, s3, 0x10009
2899 ; GFX6-NEXT: s_bfe_i32 s48, s3, 0x10008
2900 ; GFX6-NEXT: s_bfe_i32 s49, s3, 0x1000f
2901 ; GFX6-NEXT: s_bfe_i32 s50, s3, 0x1000e
2902 ; GFX6-NEXT: s_bfe_i32 s51, s3, 0x1000d
2903 ; GFX6-NEXT: s_bfe_i32 s52, s3, 0x1000c
2904 ; GFX6-NEXT: s_bfe_i32 s53, s3, 0x10012
2905 ; GFX6-NEXT: s_bfe_i32 s54, s3, 0x10011
2906 ; GFX6-NEXT: s_bfe_i32 s55, s3, 0x10010
2907 ; GFX6-NEXT: s_bfe_i32 s56, s3, 0x10017
2908 ; GFX6-NEXT: s_bfe_i32 s57, s3, 0x10016
2909 ; GFX6-NEXT: s_bfe_i32 s58, s3, 0x10015
2910 ; GFX6-NEXT: s_bfe_i32 s59, s3, 0x1001b
2911 ; GFX6-NEXT: s_bfe_i32 s60, s3, 0x1001a
2912 ; GFX6-NEXT: s_bfe_i32 s61, s3, 0x10019
2913 ; GFX6-NEXT: s_bfe_i32 s62, s3, 0x10018
2914 ; GFX6-NEXT: s_ashr_i32 s63, s3, 31
2915 ; GFX6-NEXT: s_bfe_i32 s64, s3, 0x1001e
2916 ; GFX6-NEXT: s_bfe_i32 s65, s3, 0x1001d
2917 ; GFX6-NEXT: s_bfe_i32 s66, s3, 0x1001c
2918 ; GFX6-NEXT: s_bfe_i32 s67, s3, 0x10014
2919 ; GFX6-NEXT: s_bfe_i32 s68, s3, 0x10013
2920 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
2921 ; GFX6-NEXT: s_mov_b32 s2, -1
2922 ; GFX6-NEXT: v_mov_b32_e32 v0, s66
2923 ; GFX6-NEXT: v_mov_b32_e32 v1, s65
2924 ; GFX6-NEXT: v_mov_b32_e32 v2, s64
2925 ; GFX6-NEXT: v_mov_b32_e32 v3, s63
2926 ; GFX6-NEXT: v_mov_b32_e32 v4, s62
2927 ; GFX6-NEXT: v_mov_b32_e32 v5, s61
2928 ; GFX6-NEXT: v_mov_b32_e32 v6, s60
2929 ; GFX6-NEXT: v_mov_b32_e32 v7, s59
2930 ; GFX6-NEXT: v_mov_b32_e32 v8, s67
2931 ; GFX6-NEXT: v_mov_b32_e32 v9, s58
2932 ; GFX6-NEXT: v_mov_b32_e32 v10, s57
2933 ; GFX6-NEXT: v_mov_b32_e32 v11, s56
2934 ; GFX6-NEXT: v_mov_b32_e32 v12, s55
2935 ; GFX6-NEXT: v_mov_b32_e32 v13, s54
2936 ; GFX6-NEXT: v_mov_b32_e32 v14, s53
2937 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
2938 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:224
2939 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208
2940 ; GFX6-NEXT: v_mov_b32_e32 v15, s68
2941 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192
2942 ; GFX6-NEXT: s_waitcnt expcnt(3)
2943 ; GFX6-NEXT: v_mov_b32_e32 v0, s52
2944 ; GFX6-NEXT: v_mov_b32_e32 v1, s51
2945 ; GFX6-NEXT: v_mov_b32_e32 v2, s50
2946 ; GFX6-NEXT: v_mov_b32_e32 v3, s49
2947 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
2948 ; GFX6-NEXT: s_waitcnt expcnt(0)
2949 ; GFX6-NEXT: v_mov_b32_e32 v0, s48
2950 ; GFX6-NEXT: v_mov_b32_e32 v1, s47
2951 ; GFX6-NEXT: v_mov_b32_e32 v2, s46
2952 ; GFX6-NEXT: v_mov_b32_e32 v3, s45
2953 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
2954 ; GFX6-NEXT: s_waitcnt expcnt(0)
2955 ; GFX6-NEXT: v_mov_b32_e32 v0, s44
2956 ; GFX6-NEXT: v_mov_b32_e32 v1, s43
2957 ; GFX6-NEXT: v_mov_b32_e32 v2, s42
2958 ; GFX6-NEXT: v_mov_b32_e32 v3, s41
2959 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
2960 ; GFX6-NEXT: s_waitcnt expcnt(0)
2961 ; GFX6-NEXT: v_mov_b32_e32 v0, s40
2962 ; GFX6-NEXT: v_mov_b32_e32 v1, s39
2963 ; GFX6-NEXT: v_mov_b32_e32 v2, s38
2964 ; GFX6-NEXT: v_mov_b32_e32 v3, s37
2965 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
2966 ; GFX6-NEXT: s_waitcnt expcnt(0)
2967 ; GFX6-NEXT: v_mov_b32_e32 v0, s36
2968 ; GFX6-NEXT: v_mov_b32_e32 v1, s35
2969 ; GFX6-NEXT: v_mov_b32_e32 v2, s34
2970 ; GFX6-NEXT: v_mov_b32_e32 v3, s33
2971 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
2972 ; GFX6-NEXT: s_waitcnt expcnt(0)
2973 ; GFX6-NEXT: v_mov_b32_e32 v0, s31
2974 ; GFX6-NEXT: v_mov_b32_e32 v1, s30
2975 ; GFX6-NEXT: v_mov_b32_e32 v2, s29
2976 ; GFX6-NEXT: v_mov_b32_e32 v3, s28
2977 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
2978 ; GFX6-NEXT: s_waitcnt expcnt(0)
2979 ; GFX6-NEXT: v_mov_b32_e32 v0, s27
2980 ; GFX6-NEXT: v_mov_b32_e32 v1, s26
2981 ; GFX6-NEXT: v_mov_b32_e32 v2, s25
2982 ; GFX6-NEXT: v_mov_b32_e32 v3, s24
2983 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
2984 ; GFX6-NEXT: s_waitcnt expcnt(0)
2985 ; GFX6-NEXT: v_mov_b32_e32 v0, s23
2986 ; GFX6-NEXT: v_mov_b32_e32 v1, s22
2987 ; GFX6-NEXT: v_mov_b32_e32 v2, s21
2988 ; GFX6-NEXT: v_mov_b32_e32 v3, s20
2989 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
2990 ; GFX6-NEXT: s_waitcnt expcnt(0)
2991 ; GFX6-NEXT: v_mov_b32_e32 v0, s19
2992 ; GFX6-NEXT: v_mov_b32_e32 v1, s18
2993 ; GFX6-NEXT: v_mov_b32_e32 v2, s17
2994 ; GFX6-NEXT: v_mov_b32_e32 v3, s16
2995 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
2996 ; GFX6-NEXT: s_waitcnt expcnt(0)
2997 ; GFX6-NEXT: v_mov_b32_e32 v0, s15
2998 ; GFX6-NEXT: v_mov_b32_e32 v1, s14
2999 ; GFX6-NEXT: v_mov_b32_e32 v2, s13
3000 ; GFX6-NEXT: v_mov_b32_e32 v3, s12
3001 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
3002 ; GFX6-NEXT: s_waitcnt expcnt(0)
3003 ; GFX6-NEXT: v_mov_b32_e32 v0, s11
3004 ; GFX6-NEXT: v_mov_b32_e32 v1, s10
3005 ; GFX6-NEXT: v_mov_b32_e32 v2, s9
3006 ; GFX6-NEXT: v_mov_b32_e32 v3, s8
3007 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
3008 ; GFX6-NEXT: s_waitcnt expcnt(0)
3009 ; GFX6-NEXT: v_mov_b32_e32 v0, s7
3010 ; GFX6-NEXT: v_mov_b32_e32 v1, s6
3011 ; GFX6-NEXT: v_mov_b32_e32 v2, s5
3012 ; GFX6-NEXT: v_mov_b32_e32 v3, s4
3013 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
3014 ; GFX6-NEXT: s_endpgm
3015 ;
3016 ; GFX8-LABEL: constant_sextload_v64i1_to_v64i32:
3017 ; GFX8: ; %bb.0:
3018 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3019 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3020 ; GFX8-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
3021 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3022 ; GFX8-NEXT: v_lshrrev_b16_e64 v18, 12, s2
3023 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 13, s2
3024 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 14, s2
3025 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 15, s2
3026 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 8, s2
3027 ; GFX8-NEXT: v_lshrrev_b16_e64 v15, 9, s2
3028 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 10, s2
3029 ; GFX8-NEXT: v_lshrrev_b16_e64 v17, 11, s2
3030 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 4, s2
3031 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 5, s2
3032 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 6, s2
3033 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 7, s2
3034 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 1, s2
3035 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 2, s2
3036 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 3, s2
3037 ; GFX8-NEXT: s_lshr_b32 s7, s3, 24
3038 ; GFX8-NEXT: s_lshr_b32 s8, s2, 24
3039 ; GFX8-NEXT: s_bfe_i32 s4, s2, 0x10018
3040 ; GFX8-NEXT: s_bfe_i32 s5, s3, 0x10018
3041 ; GFX8-NEXT: s_bfe_i32 s6, s3, 0x10000
3042 ; GFX8-NEXT: s_bfe_i32 s9, s2, 0x10000
3043 ; GFX8-NEXT: s_bfe_i32 s12, s2, 0x10013
3044 ; GFX8-NEXT: s_bfe_i32 s13, s2, 0x10012
3045 ; GFX8-NEXT: s_bfe_i32 s14, s2, 0x10011
3046 ; GFX8-NEXT: s_bfe_i32 s15, s2, 0x10010
3047 ; GFX8-NEXT: s_bfe_i32 s16, s2, 0x10017
3048 ; GFX8-NEXT: s_bfe_i32 s17, s2, 0x10016
3049 ; GFX8-NEXT: s_bfe_i32 s18, s2, 0x10015
3050 ; GFX8-NEXT: s_bfe_i32 s2, s2, 0x10014
3051 ; GFX8-NEXT: s_bfe_i32 s19, s3, 0x10013
3052 ; GFX8-NEXT: s_bfe_i32 s20, s3, 0x10012
3053 ; GFX8-NEXT: s_bfe_i32 s21, s3, 0x10011
3054 ; GFX8-NEXT: s_bfe_i32 s22, s3, 0x10010
3055 ; GFX8-NEXT: s_bfe_i32 s10, s3, 0x10017
3056 ; GFX8-NEXT: s_bfe_i32 s11, s3, 0x10016
3057 ; GFX8-NEXT: s_bfe_i32 s23, s3, 0x10015
3058 ; GFX8-NEXT: s_bfe_i32 s24, s3, 0x10014
3059 ; GFX8-NEXT: v_mov_b32_e32 v25, s10
3060 ; GFX8-NEXT: s_add_u32 s10, s0, 0xd0
3061 ; GFX8-NEXT: v_mov_b32_e32 v24, s11
3062 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
3063 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
3064 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
3065 ; GFX8-NEXT: s_add_u32 s10, s0, 0xc0
3066 ; GFX8-NEXT: v_mov_b32_e32 v22, s24
3067 ; GFX8-NEXT: v_mov_b32_e32 v23, s23
3068 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
3069 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
3070 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
3071 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
3072 ; GFX8-NEXT: s_add_u32 s10, s0, 0x50
3073 ; GFX8-NEXT: v_mov_b32_e32 v22, s22
3074 ; GFX8-NEXT: v_mov_b32_e32 v23, s21
3075 ; GFX8-NEXT: v_mov_b32_e32 v24, s20
3076 ; GFX8-NEXT: v_mov_b32_e32 v25, s19
3077 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
3078 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
3079 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
3080 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
3081 ; GFX8-NEXT: s_add_u32 s10, s0, 64
3082 ; GFX8-NEXT: v_mov_b32_e32 v22, s2
3083 ; GFX8-NEXT: v_mov_b32_e32 v23, s18
3084 ; GFX8-NEXT: v_mov_b32_e32 v24, s17
3085 ; GFX8-NEXT: v_mov_b32_e32 v25, s16
3086 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
3087 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
3088 ; GFX8-NEXT: v_mov_b32_e32 v27, s11
3089 ; GFX8-NEXT: v_mov_b32_e32 v26, s10
3090 ; GFX8-NEXT: s_add_u32 s10, s0, 48
3091 ; GFX8-NEXT: v_mov_b32_e32 v22, s15
3092 ; GFX8-NEXT: v_mov_b32_e32 v23, s14
3093 ; GFX8-NEXT: v_mov_b32_e32 v24, s13
3094 ; GFX8-NEXT: v_mov_b32_e32 v25, s12
3095 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
3096 ; GFX8-NEXT: flat_store_dwordx4 v[26:27], v[22:25]
3097 ; GFX8-NEXT: v_bfe_i32 v21, v21, 0, 1
3098 ; GFX8-NEXT: v_mov_b32_e32 v23, s11
3099 ; GFX8-NEXT: v_bfe_i32 v20, v20, 0, 1
3100 ; GFX8-NEXT: v_bfe_i32 v19, v19, 0, 1
3101 ; GFX8-NEXT: v_bfe_i32 v18, v18, 0, 1
3102 ; GFX8-NEXT: v_mov_b32_e32 v22, s10
3103 ; GFX8-NEXT: s_add_u32 s2, s0, 32
3104 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 12, s3
3105 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 13, s3
3106 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 14, s3
3107 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 15, s3
3108 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 8, s3
3109 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 9, s3
3110 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 10, s3
3111 ; GFX8-NEXT: v_lshrrev_b16_e64 v24, 11, s3
3112 ; GFX8-NEXT: v_lshrrev_b16_e64 v26, 4, s3
3113 ; GFX8-NEXT: v_lshrrev_b16_e64 v27, 5, s3
3114 ; GFX8-NEXT: v_lshrrev_b16_e64 v28, 6, s3
3115 ; GFX8-NEXT: flat_store_dwordx4 v[22:23], v[18:21]
3116 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 7, s3
3117 ; GFX8-NEXT: v_lshrrev_b16_e64 v23, 1, s3
3118 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 2, s3
3119 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 3, s3
3120 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3121 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
3122 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
3123 ; GFX8-NEXT: s_add_u32 s2, s0, 16
3124 ; GFX8-NEXT: v_bfe_i32 v17, v17, 0, 1
3125 ; GFX8-NEXT: v_bfe_i32 v16, v16, 0, 1
3126 ; GFX8-NEXT: v_bfe_i32 v15, v15, 0, 1
3127 ; GFX8-NEXT: v_bfe_i32 v14, v14, 0, 1
3128 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3129 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[14:17]
3130 ; GFX8-NEXT: v_bfe_i32 v13, v13, 0, 1
3131 ; GFX8-NEXT: v_mov_b32_e32 v15, s3
3132 ; GFX8-NEXT: v_bfe_i32 v12, v12, 0, 1
3133 ; GFX8-NEXT: v_bfe_i32 v11, v11, 0, 1
3134 ; GFX8-NEXT: v_bfe_i32 v10, v10, 0, 1
3135 ; GFX8-NEXT: v_mov_b32_e32 v14, s2
3136 ; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[10:13]
3137 ; GFX8-NEXT: s_add_u32 s2, s0, 0xb0
3138 ; GFX8-NEXT: v_mov_b32_e32 v12, s1
3139 ; GFX8-NEXT: v_bfe_i32 v10, v9, 0, 1
3140 ; GFX8-NEXT: v_bfe_i32 v9, v8, 0, 1
3141 ; GFX8-NEXT: v_bfe_i32 v8, v7, 0, 1
3142 ; GFX8-NEXT: v_mov_b32_e32 v7, s9
3143 ; GFX8-NEXT: v_mov_b32_e32 v11, s0
3144 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3145 ; GFX8-NEXT: flat_store_dwordx4 v[11:12], v[7:10]
3146 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 6, s8
3147 ; GFX8-NEXT: v_mov_b32_e32 v8, s3
3148 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 5, s8
3149 ; GFX8-NEXT: v_bfe_i32 v6, v6, 0, 1
3150 ; GFX8-NEXT: v_bfe_i32 v5, v5, 0, 1
3151 ; GFX8-NEXT: v_bfe_i32 v4, v4, 0, 1
3152 ; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 1
3153 ; GFX8-NEXT: v_mov_b32_e32 v7, s2
3154 ; GFX8-NEXT: s_add_u32 s2, s0, 0xa0
3155 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 4, s8
3156 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 1, s8
3157 ; GFX8-NEXT: flat_store_dwordx4 v[7:8], v[3:6]
3158 ; GFX8-NEXT: v_bfe_i32 v8, v11, 0, 1
3159 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 2, s8
3160 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 3, s8
3161 ; GFX8-NEXT: v_bfe_i32 v7, v10, 0, 1
3162 ; GFX8-NEXT: v_bfe_i32 v11, v1, 0, 1
3163 ; GFX8-NEXT: v_bfe_i32 v10, v0, 0, 1
3164 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3165 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3166 ; GFX8-NEXT: v_bfe_i32 v5, v4, 0, 1
3167 ; GFX8-NEXT: v_bfe_i32 v4, v3, 0, 1
3168 ; GFX8-NEXT: v_bfe_i32 v3, v12, 0, 1
3169 ; GFX8-NEXT: v_bfe_i32 v6, v13, 0, 1
3170 ; GFX8-NEXT: v_bfe_i32 v13, v24, 0, 1
3171 ; GFX8-NEXT: v_bfe_i32 v12, v2, 0, 1
3172 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3173 ; GFX8-NEXT: s_add_u32 s2, s0, 0x90
3174 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 5, s7
3175 ; GFX8-NEXT: v_lshrrev_b16_e64 v15, 2, s7
3176 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[10:13]
3177 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3178 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3179 ; GFX8-NEXT: v_bfe_i32 v12, v15, 0, 1
3180 ; GFX8-NEXT: v_bfe_i32 v15, v19, 0, 1
3181 ; GFX8-NEXT: v_bfe_i32 v19, v23, 0, 1
3182 ; GFX8-NEXT: v_bfe_i32 v25, v22, 0, 1
3183 ; GFX8-NEXT: v_bfe_i32 v24, v28, 0, 1
3184 ; GFX8-NEXT: v_bfe_i32 v23, v27, 0, 1
3185 ; GFX8-NEXT: v_bfe_i32 v22, v26, 0, 1
3186 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3187 ; GFX8-NEXT: s_add_u32 s2, s0, 0x80
3188 ; GFX8-NEXT: v_lshrrev_b16_e64 v18, 4, s7
3189 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 1, s7
3190 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[22:25]
3191 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3192 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3193 ; GFX8-NEXT: v_bfe_i32 v11, v14, 0, 1
3194 ; GFX8-NEXT: v_bfe_i32 v14, v18, 0, 1
3195 ; GFX8-NEXT: v_bfe_i32 v21, v21, 0, 1
3196 ; GFX8-NEXT: v_bfe_i32 v20, v20, 0, 1
3197 ; GFX8-NEXT: v_mov_b32_e32 v18, s6
3198 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3199 ; GFX8-NEXT: s_add_u32 s2, s0, 0xf0
3200 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 6, s7
3201 ; GFX8-NEXT: v_lshrrev_b16_e64 v17, 7, s7
3202 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[18:21]
3203 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3204 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3205 ; GFX8-NEXT: v_bfe_i32 v17, v17, 0, 1
3206 ; GFX8-NEXT: v_bfe_i32 v16, v16, 0, 1
3207 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3208 ; GFX8-NEXT: s_add_u32 s2, s0, 0xe0
3209 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 3, s7
3210 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[14:17]
3211 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3212 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3213 ; GFX8-NEXT: v_bfe_i32 v13, v2, 0, 1
3214 ; GFX8-NEXT: v_mov_b32_e32 v10, s5
3215 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3216 ; GFX8-NEXT: s_add_u32 s2, s0, 0x70
3217 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 7, s8
3218 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[10:13]
3219 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3220 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3221 ; GFX8-NEXT: v_bfe_i32 v9, v9, 0, 1
3222 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3223 ; GFX8-NEXT: s_add_u32 s0, s0, 0x60
3224 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[6:9]
3225 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
3226 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
3227 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
3228 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
3229 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[2:5]
3230 ; GFX8-NEXT: s_endpgm
3231 ;
3232 ; EG-LABEL: constant_sextload_v64i1_to_v64i32:
3233 ; EG: ; %bb.0:
3234 ; EG-NEXT: ALU 0, @24, KC0[CB0:0-32], KC1[]
3235 ; EG-NEXT: TEX 0 @22
3236 ; EG-NEXT: ALU 99, @25, KC0[CB0:0-32], KC1[]
3237 ; EG-NEXT: ALU 98, @125, KC0[CB0:0-32], KC1[]
3238 ; EG-NEXT: ALU 13, @224, KC0[CB0:0-32], KC1[]
3239 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T48.XYZW, T50.X, 0
3240 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T45.XYZW, T49.X, 0
3241 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T43.XYZW, T46.X, 0
3242 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T41.XYZW, T44.X, 0
3243 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T39.XYZW, T42.X, 0
3244 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T37.XYZW, T40.X, 0
3245 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T34.XYZW, T38.X, 0
3246 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T36.X, 0
3247 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T32.XYZW, T35.X, 0
3248 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T30.XYZW, T33.X, 0
3249 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T28.XYZW, T31.X, 0
3250 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T29.X, 0
3251 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T27.X, 0
3252 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T25.X, 0
3253 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T23.X, 0
3254 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T47.XYZW, T21.X, 1
3255 ; EG-NEXT: CF_END
3256 ; EG-NEXT: Fetch clause starting at 22:
3257 ; EG-NEXT: VTX_READ_64 T19.XY, T19.X, 0, #1
3258 ; EG-NEXT: ALU clause starting at 24:
3259 ; EG-NEXT: MOV * T19.X, KC0[2].Z,
3260 ; EG-NEXT: ALU clause starting at 25:
3261 ; EG-NEXT: LSHR * T0.W, T19.X, literal.x,
3262 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
3263 ; EG-NEXT: BFE_INT T20.W, PV.W, 0.0, 1,
3264 ; EG-NEXT: LSHR * T0.W, T19.X, literal.x,
3265 ; EG-NEXT: 6(8.407791e-45), 0(0.000000e+00)
3266 ; EG-NEXT: BFE_INT T20.Z, PS, 0.0, 1,
3267 ; EG-NEXT: LSHR T0.W, T19.X, literal.x,
3268 ; EG-NEXT: LSHR * T1.W, T19.X, literal.y,
3269 ; EG-NEXT: 11(1.541428e-44), 5(7.006492e-45)
3270 ; EG-NEXT: LSHR T21.X, KC0[2].Y, literal.x,
3271 ; EG-NEXT: BFE_INT T20.Y, PS, 0.0, 1,
3272 ; EG-NEXT: LSHR T0.Z, T19.X, literal.y,
3273 ; EG-NEXT: BFE_INT T22.W, PV.W, 0.0, 1,
3274 ; EG-NEXT: LSHR * T0.W, T19.X, literal.z,
3275 ; EG-NEXT: 2(2.802597e-45), 10(1.401298e-44)
3276 ; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)
3277 ; EG-NEXT: BFE_INT T20.X, PS, 0.0, 1,
3278 ; EG-NEXT: LSHR T0.Y, T19.X, literal.x,
3279 ; EG-NEXT: BFE_INT T22.Z, PV.Z, 0.0, 1,
3280 ; EG-NEXT: LSHR T0.W, T19.X, literal.y,
3281 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3282 ; EG-NEXT: 15(2.101948e-44), 9(1.261169e-44)
3283 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
3284 ; EG-NEXT: LSHR T23.X, PS, literal.x,
3285 ; EG-NEXT: BFE_INT T22.Y, PV.W, 0.0, 1,
3286 ; EG-NEXT: LSHR T0.Z, T19.X, literal.y,
3287 ; EG-NEXT: BFE_INT T24.W, PV.Y, 0.0, 1,
3288 ; EG-NEXT: LSHR * T0.W, T19.X, literal.z,
3289 ; EG-NEXT: 2(2.802597e-45), 14(1.961818e-44)
3290 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
3291 ; EG-NEXT: BFE_INT T22.X, PS, 0.0, 1,
3292 ; EG-NEXT: LSHR T0.Y, T19.X, literal.x,
3293 ; EG-NEXT: BFE_INT T24.Z, PV.Z, 0.0, 1,
3294 ; EG-NEXT: LSHR T0.W, T19.X, literal.y,
3295 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3296 ; EG-NEXT: 19(2.662467e-44), 13(1.821688e-44)
3297 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
3298 ; EG-NEXT: LSHR T25.X, PS, literal.x,
3299 ; EG-NEXT: BFE_INT T24.Y, PV.W, 0.0, 1,
3300 ; EG-NEXT: LSHR T0.Z, T19.X, literal.y,
3301 ; EG-NEXT: BFE_INT T26.W, PV.Y, 0.0, 1,
3302 ; EG-NEXT: LSHR * T0.W, T19.X, literal.z,
3303 ; EG-NEXT: 2(2.802597e-45), 18(2.522337e-44)
3304 ; EG-NEXT: 12(1.681558e-44), 0(0.000000e+00)
3305 ; EG-NEXT: BFE_INT T24.X, PS, 0.0, 1,
3306 ; EG-NEXT: LSHR T0.Y, T19.X, literal.x,
3307 ; EG-NEXT: BFE_INT T26.Z, PV.Z, 0.0, 1,
3308 ; EG-NEXT: LSHR T0.W, T19.X, literal.y,
3309 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3310 ; EG-NEXT: 23(3.222986e-44), 17(2.382207e-44)
3311 ; EG-NEXT: 48(6.726233e-44), 0(0.000000e+00)
3312 ; EG-NEXT: LSHR T27.X, PS, literal.x,
3313 ; EG-NEXT: BFE_INT T26.Y, PV.W, 0.0, 1,
3314 ; EG-NEXT: LSHR T0.Z, T19.X, literal.y,
3315 ; EG-NEXT: BFE_INT T28.W, PV.Y, 0.0, 1,
3316 ; EG-NEXT: LSHR * T0.W, T19.X, literal.z,
3317 ; EG-NEXT: 2(2.802597e-45), 22(3.082857e-44)
3318 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
3319 ; EG-NEXT: BFE_INT T26.X, PS, 0.0, 1,
3320 ; EG-NEXT: LSHR T0.Y, T19.X, literal.x,
3321 ; EG-NEXT: BFE_INT T28.Z, PV.Z, 0.0, 1,
3322 ; EG-NEXT: LSHR T0.W, T19.X, literal.y,
3323 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3324 ; EG-NEXT: 27(3.783506e-44), 21(2.942727e-44)
3325 ; EG-NEXT: 64(8.968310e-44), 0(0.000000e+00)
3326 ; EG-NEXT: LSHR T29.X, PS, literal.x,
3327 ; EG-NEXT: BFE_INT T28.Y, PV.W, 0.0, 1,
3328 ; EG-NEXT: LSHR T0.Z, T19.X, literal.y,
3329 ; EG-NEXT: BFE_INT T30.W, PV.Y, 0.0, 1,
3330 ; EG-NEXT: LSHR * T0.W, T19.X, literal.z,
3331 ; EG-NEXT: 2(2.802597e-45), 26(3.643376e-44)
3332 ; EG-NEXT: 20(2.802597e-44), 0(0.000000e+00)
3333 ; EG-NEXT: BFE_INT T28.X, PS, 0.0, 1,
3334 ; EG-NEXT: BFE_INT T30.Z, PV.Z, 0.0, 1,
3335 ; EG-NEXT: LSHR T0.W, T19.X, literal.x,
3336 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,
3337 ; EG-NEXT: 25(3.503246e-44), 80(1.121039e-43)
3338 ; EG-NEXT: LSHR T31.X, PS, literal.x,
3339 ; EG-NEXT: BFE_INT T30.Y, PV.W, 0.0, 1,
3340 ; EG-NEXT: LSHR T0.Z, T19.X, literal.y,
3341 ; EG-NEXT: LSHR T0.W, T19.X, literal.z,
3342 ; EG-NEXT: ASHR * T32.W, T19.X, literal.w,
3343 ; EG-NEXT: 2(2.802597e-45), 30(4.203895e-44)
3344 ; EG-NEXT: 24(3.363116e-44), 31(4.344025e-44)
3345 ; EG-NEXT: BFE_INT T30.X, PV.W, 0.0, 1,
3346 ; EG-NEXT: BFE_INT T32.Z, PV.Z, 0.0, 1,
3347 ; EG-NEXT: LSHR T0.W, T19.X, literal.x,
3348 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,
3349 ; EG-NEXT: 29(4.063766e-44), 96(1.345247e-43)
3350 ; EG-NEXT: LSHR T33.X, PS, literal.x,
3351 ; EG-NEXT: BFE_INT T32.Y, PV.W, 0.0, 1,
3352 ; EG-NEXT: LSHR T0.W, T19.Y, literal.y,
3353 ; EG-NEXT: LSHR * T1.W, T19.X, literal.z,
3354 ; EG-NEXT: 2(2.802597e-45), 7(9.809089e-45)
3355 ; EG-NEXT: 28(3.923636e-44), 0(0.000000e+00)
3356 ; EG-NEXT: BFE_INT T32.X, PS, 0.0, 1,
3357 ; EG-NEXT: LSHR T0.Z, T19.Y, literal.x,
3358 ; EG-NEXT: BFE_INT T34.W, PV.W, 0.0, 1,
3359 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3360 ; EG-NEXT: 6(8.407791e-45), 112(1.569454e-43)
3361 ; EG-NEXT: ALU clause starting at 125:
3362 ; EG-NEXT: LSHR T35.X, T0.W, literal.x,
3363 ; EG-NEXT: LSHR T0.Y, T19.Y, literal.y,
3364 ; EG-NEXT: BFE_INT T34.Z, T0.Z, 0.0, 1,
3365 ; EG-NEXT: LSHR T0.W, T19.Y, literal.z,
3366 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.w,
3367 ; EG-NEXT: 2(2.802597e-45), 11(1.541428e-44)
3368 ; EG-NEXT: 5(7.006492e-45), 128(1.793662e-43)
3369 ; EG-NEXT: LSHR T36.X, PS, literal.x,
3370 ; EG-NEXT: BFE_INT T34.Y, PV.W, 0.0, 1,
3371 ; EG-NEXT: LSHR T0.Z, T19.Y, literal.y,
3372 ; EG-NEXT: BFE_INT T37.W, PV.Y, 0.0, 1,
3373 ; EG-NEXT: LSHR * T0.W, T19.Y, literal.z,
3374 ; EG-NEXT: 2(2.802597e-45), 10(1.401298e-44)
3375 ; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)
3376 ; EG-NEXT: BFE_INT T34.X, PS, 0.0, 1,
3377 ; EG-NEXT: LSHR T0.Y, T19.Y, literal.x,
3378 ; EG-NEXT: BFE_INT T37.Z, PV.Z, 0.0, 1,
3379 ; EG-NEXT: LSHR T0.W, T19.Y, literal.y,
3380 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3381 ; EG-NEXT: 15(2.101948e-44), 9(1.261169e-44)
3382 ; EG-NEXT: 144(2.017870e-43), 0(0.000000e+00)
3383 ; EG-NEXT: LSHR T38.X, PS, literal.x,
3384 ; EG-NEXT: BFE_INT T37.Y, PV.W, 0.0, 1,
3385 ; EG-NEXT: LSHR T0.Z, T19.Y, literal.y,
3386 ; EG-NEXT: BFE_INT T39.W, PV.Y, 0.0, 1,
3387 ; EG-NEXT: LSHR * T0.W, T19.Y, literal.z,
3388 ; EG-NEXT: 2(2.802597e-45), 14(1.961818e-44)
3389 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
3390 ; EG-NEXT: BFE_INT T37.X, PS, 0.0, 1,
3391 ; EG-NEXT: LSHR T0.Y, T19.Y, literal.x,
3392 ; EG-NEXT: BFE_INT T39.Z, PV.Z, 0.0, 1,
3393 ; EG-NEXT: LSHR T0.W, T19.Y, literal.y,
3394 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3395 ; EG-NEXT: 19(2.662467e-44), 13(1.821688e-44)
3396 ; EG-NEXT: 160(2.242078e-43), 0(0.000000e+00)
3397 ; EG-NEXT: LSHR T40.X, PS, literal.x,
3398 ; EG-NEXT: BFE_INT T39.Y, PV.W, 0.0, 1,
3399 ; EG-NEXT: LSHR T0.Z, T19.Y, literal.y,
3400 ; EG-NEXT: BFE_INT T41.W, PV.Y, 0.0, 1,
3401 ; EG-NEXT: LSHR * T0.W, T19.Y, literal.z,
3402 ; EG-NEXT: 2(2.802597e-45), 18(2.522337e-44)
3403 ; EG-NEXT: 12(1.681558e-44), 0(0.000000e+00)
3404 ; EG-NEXT: BFE_INT T39.X, PS, 0.0, 1,
3405 ; EG-NEXT: LSHR T0.Y, T19.Y, literal.x,
3406 ; EG-NEXT: BFE_INT T41.Z, PV.Z, 0.0, 1,
3407 ; EG-NEXT: LSHR T0.W, T19.Y, literal.y,
3408 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3409 ; EG-NEXT: 23(3.222986e-44), 17(2.382207e-44)
3410 ; EG-NEXT: 176(2.466285e-43), 0(0.000000e+00)
3411 ; EG-NEXT: LSHR T42.X, PS, literal.x,
3412 ; EG-NEXT: BFE_INT T41.Y, PV.W, 0.0, 1,
3413 ; EG-NEXT: LSHR T0.Z, T19.Y, literal.y,
3414 ; EG-NEXT: BFE_INT T43.W, PV.Y, 0.0, 1,
3415 ; EG-NEXT: LSHR * T0.W, T19.Y, literal.z,
3416 ; EG-NEXT: 2(2.802597e-45), 22(3.082857e-44)
3417 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
3418 ; EG-NEXT: BFE_INT T41.X, PS, 0.0, 1,
3419 ; EG-NEXT: LSHR T0.Y, T19.Y, literal.x,
3420 ; EG-NEXT: BFE_INT T43.Z, PV.Z, 0.0, 1,
3421 ; EG-NEXT: LSHR T0.W, T19.Y, literal.y,
3422 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.z,
3423 ; EG-NEXT: 27(3.783506e-44), 21(2.942727e-44)
3424 ; EG-NEXT: 192(2.690493e-43), 0(0.000000e+00)
3425 ; EG-NEXT: LSHR T44.X, PS, literal.x,
3426 ; EG-NEXT: BFE_INT T43.Y, PV.W, 0.0, 1,
3427 ; EG-NEXT: LSHR T0.Z, T19.Y, literal.y,
3428 ; EG-NEXT: BFE_INT T45.W, PV.Y, 0.0, 1,
3429 ; EG-NEXT: LSHR * T0.W, T19.Y, literal.z,
3430 ; EG-NEXT: 2(2.802597e-45), 26(3.643376e-44)
3431 ; EG-NEXT: 20(2.802597e-44), 0(0.000000e+00)
3432 ; EG-NEXT: BFE_INT T43.X, PS, 0.0, 1,
3433 ; EG-NEXT: BFE_INT T45.Z, PV.Z, 0.0, 1,
3434 ; EG-NEXT: LSHR T0.W, T19.Y, literal.x,
3435 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,
3436 ; EG-NEXT: 25(3.503246e-44), 208(2.914701e-43)
3437 ; EG-NEXT: LSHR T46.X, PS, literal.x,
3438 ; EG-NEXT: BFE_INT T45.Y, PV.W, 0.0, 1,
3439 ; EG-NEXT: LSHR * T0.W, T19.Y, literal.y,
3440 ; EG-NEXT: 2(2.802597e-45), 24(3.363116e-44)
3441 ; EG-NEXT: BFE_INT T45.X, PV.W, 0.0, 1,
3442 ; EG-NEXT: LSHR T0.Z, T19.Y, literal.x,
3443 ; EG-NEXT: LSHR T0.W, T19.X, 1,
3444 ; EG-NEXT: LSHR * T1.W, T19.Y, literal.y,
3445 ; EG-NEXT: 2(2.802597e-45), 3(4.203895e-45)
3446 ; EG-NEXT: BFE_INT T47.X, T19.X, 0.0, 1,
3447 ; EG-NEXT: LSHR T0.Y, T19.X, literal.x,
3448 ; EG-NEXT: LSHR T1.Z, T19.X, literal.y,
3449 ; EG-NEXT: LSHR T2.W, T19.Y, literal.z,
3450 ; EG-NEXT: ASHR * T48.W, T19.Y, literal.w,
3451 ; EG-NEXT: 2(2.802597e-45), 3(4.203895e-45)
3452 ; EG-NEXT: 30(4.203895e-44), 31(4.344025e-44)
3453 ; EG-NEXT: BFE_INT T19.X, T19.Y, 0.0, 1,
3454 ; EG-NEXT: LSHR T1.Y, T19.Y, literal.x,
3455 ; EG-NEXT: BFE_INT T48.Z, PV.W, 0.0, 1,
3456 ; EG-NEXT: BFE_INT T47.W, PV.Z, 0.0, 1,
3457 ; EG-NEXT: ADD_INT * T2.W, KC0[2].Y, literal.y,
3458 ; EG-NEXT: 29(4.063766e-44), 224(3.138909e-43)
3459 ; EG-NEXT: LSHR * T49.X, PS, literal.x,
3460 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3461 ; EG-NEXT: ALU clause starting at 224:
3462 ; EG-NEXT: BFE_INT T48.Y, T1.Y, 0.0, 1,
3463 ; EG-NEXT: BFE_INT T47.Z, T0.Y, 0.0, 1, BS:VEC_120/SCL_212
3464 ; EG-NEXT: BFE_INT T19.W, T1.W, 0.0, 1,
3465 ; EG-NEXT: LSHR * T1.W, T19.Y, literal.x,
3466 ; EG-NEXT: 28(3.923636e-44), 0(0.000000e+00)
3467 ; EG-NEXT: BFE_INT T48.X, PS, 0.0, 1,
3468 ; EG-NEXT: BFE_INT T47.Y, T0.W, 0.0, 1,
3469 ; EG-NEXT: BFE_INT T19.Z, T0.Z, 0.0, 1,
3470 ; EG-NEXT: LSHR T0.W, T19.Y, 1,
3471 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.x,
3472 ; EG-NEXT: 240(3.363116e-43), 0(0.000000e+00)
3473 ; EG-NEXT: LSHR T50.X, PS, literal.x,
3474 ; EG-NEXT: BFE_INT * T19.Y, PV.W, 0.0, 1,
3475 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3476 %load = load <64 x i1>, ptr addrspace(4) %in
3477 %ext = sext <64 x i1> %load to <64 x i32>
3478 store <64 x i32> %ext, ptr addrspace(1) %out
3479 ret void
3480 }
3482 define amdgpu_kernel void @constant_zextload_i1_to_i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3483 ; GFX6-LABEL: constant_zextload_i1_to_i64:
3484 ; GFX6: ; %bb.0:
3485 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3486 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3487 ; GFX6-NEXT: s_mov_b32 s6, -1
3488 ; GFX6-NEXT: s_mov_b32 s10, s6
3489 ; GFX6-NEXT: s_mov_b32 s11, s7
3490 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3491 ; GFX6-NEXT: s_mov_b32 s8, s2
3492 ; GFX6-NEXT: s_mov_b32 s9, s3
3493 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
3494 ; GFX6-NEXT: s_mov_b32 s4, s0
3495 ; GFX6-NEXT: s_mov_b32 s5, s1
3496 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3497 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
3498 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
3499 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
3500 ; GFX6-NEXT: s_endpgm
3501 ;
3502 ; GFX8-LABEL: constant_zextload_i1_to_i64:
3503 ; GFX8: ; %bb.0:
3504 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3505 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
3506 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3507 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3508 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3509 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
3510 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
3511 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
3512 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3513 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
3514 ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
3515 ; GFX8-NEXT: s_endpgm
3516 ;
3517 ; EG-LABEL: constant_zextload_i1_to_i64:
3518 ; EG: ; %bb.0:
3519 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3520 ; EG-NEXT: TEX 0 @6
3521 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
3522 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
3523 ; EG-NEXT: CF_END
3524 ; EG-NEXT: PAD
3525 ; EG-NEXT: Fetch clause starting at 6:
3526 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3527 ; EG-NEXT: ALU clause starting at 8:
3528 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3529 ; EG-NEXT: ALU clause starting at 9:
3530 ; EG-NEXT: MOV * T0.Y, 0.0,
3531 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
3532 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3533 %a = load i1, ptr addrspace(4) %in
3534 %ext = zext i1 %a to i64
3535 store i64 %ext, ptr addrspace(1) %out
3536 ret void
3537 }
3539 define amdgpu_kernel void @constant_sextload_i1_to_i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3540 ; GFX6-LABEL: constant_sextload_i1_to_i64:
3541 ; GFX6: ; %bb.0:
3542 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3543 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3544 ; GFX6-NEXT: s_mov_b32 s6, -1
3545 ; GFX6-NEXT: s_mov_b32 s10, s6
3546 ; GFX6-NEXT: s_mov_b32 s11, s7
3547 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3548 ; GFX6-NEXT: s_mov_b32 s8, s2
3549 ; GFX6-NEXT: s_mov_b32 s9, s3
3550 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
3551 ; GFX6-NEXT: s_mov_b32 s4, s0
3552 ; GFX6-NEXT: s_mov_b32 s5, s1
3553 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3554 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
3555 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
3556 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
3557 ; GFX6-NEXT: s_endpgm
3558 ;
3559 ; GFX8-LABEL: constant_sextload_i1_to_i64:
3560 ; GFX8: ; %bb.0:
3561 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3562 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3563 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3564 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3565 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
3566 ; GFX8-NEXT: v_mov_b32_e32 v1, s0
3567 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
3568 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3569 ; GFX8-NEXT: v_bfe_i32 v3, v0, 0, 1
3570 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
3571 ; GFX8-NEXT: flat_store_dwordx2 v[1:2], v[3:4]
3572 ; GFX8-NEXT: s_endpgm
3573 ;
3574 ; EG-LABEL: constant_sextload_i1_to_i64:
3575 ; EG: ; %bb.0:
3576 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3577 ; EG-NEXT: TEX 0 @6
3578 ; EG-NEXT: ALU 3, @9, KC0[CB0:0-32], KC1[]
3579 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
3580 ; EG-NEXT: CF_END
3581 ; EG-NEXT: PAD
3582 ; EG-NEXT: Fetch clause starting at 6:
3583 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3584 ; EG-NEXT: ALU clause starting at 8:
3585 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3586 ; EG-NEXT: ALU clause starting at 9:
3587 ; EG-NEXT: BFE_INT T0.X, T0.X, 0.0, 1,
3588 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
3589 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3590 ; EG-NEXT: MOV * T0.Y, PV.X,
3591 %a = load i1, ptr addrspace(4) %in
3592 %ext = sext i1 %a to i64
3593 store i64 %ext, ptr addrspace(1) %out
3594 ret void
3595 }
3597 define amdgpu_kernel void @constant_zextload_v1i1_to_v1i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3598 ; GFX6-LABEL: constant_zextload_v1i1_to_v1i64:
3599 ; GFX6: ; %bb.0:
3600 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3601 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3602 ; GFX6-NEXT: s_mov_b32 s6, -1
3603 ; GFX6-NEXT: s_mov_b32 s10, s6
3604 ; GFX6-NEXT: s_mov_b32 s11, s7
3605 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3606 ; GFX6-NEXT: s_mov_b32 s8, s2
3607 ; GFX6-NEXT: s_mov_b32 s9, s3
3608 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
3609 ; GFX6-NEXT: s_mov_b32 s4, s0
3610 ; GFX6-NEXT: s_mov_b32 s5, s1
3611 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3612 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
3613 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
3614 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
3615 ; GFX6-NEXT: s_endpgm
3616 ;
3617 ; GFX8-LABEL: constant_zextload_v1i1_to_v1i64:
3618 ; GFX8: ; %bb.0:
3619 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3620 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
3621 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3622 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3623 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3624 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
3625 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
3626 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
3627 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3628 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
3629 ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
3630 ; GFX8-NEXT: s_endpgm
3631 ;
3632 ; EG-LABEL: constant_zextload_v1i1_to_v1i64:
3633 ; EG: ; %bb.0:
3634 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3635 ; EG-NEXT: TEX 0 @6
3636 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
3637 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
3638 ; EG-NEXT: CF_END
3639 ; EG-NEXT: PAD
3640 ; EG-NEXT: Fetch clause starting at 6:
3641 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3642 ; EG-NEXT: ALU clause starting at 8:
3643 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3644 ; EG-NEXT: ALU clause starting at 9:
3645 ; EG-NEXT: MOV * T0.Y, 0.0,
3646 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
3647 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3648 %load = load <1 x i1>, ptr addrspace(4) %in
3649 %ext = zext <1 x i1> %load to <1 x i64>
3650 store <1 x i64> %ext, ptr addrspace(1) %out
3651 ret void
3652 }
3654 define amdgpu_kernel void @constant_sextload_v1i1_to_v1i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3655 ; GFX6-LABEL: constant_sextload_v1i1_to_v1i64:
3656 ; GFX6: ; %bb.0:
3657 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3658 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3659 ; GFX6-NEXT: s_mov_b32 s6, -1
3660 ; GFX6-NEXT: s_mov_b32 s10, s6
3661 ; GFX6-NEXT: s_mov_b32 s11, s7
3662 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3663 ; GFX6-NEXT: s_mov_b32 s8, s2
3664 ; GFX6-NEXT: s_mov_b32 s9, s3
3665 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
3666 ; GFX6-NEXT: s_mov_b32 s4, s0
3667 ; GFX6-NEXT: s_mov_b32 s5, s1
3668 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3669 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
3670 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
3671 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
3672 ; GFX6-NEXT: s_endpgm
3673 ;
3674 ; GFX8-LABEL: constant_sextload_v1i1_to_v1i64:
3675 ; GFX8: ; %bb.0:
3676 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3677 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3678 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3679 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3680 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
3681 ; GFX8-NEXT: v_mov_b32_e32 v1, s0
3682 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
3683 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3684 ; GFX8-NEXT: v_bfe_i32 v3, v0, 0, 1
3685 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
3686 ; GFX8-NEXT: flat_store_dwordx2 v[1:2], v[3:4]
3687 ; GFX8-NEXT: s_endpgm
3688 ;
3689 ; EG-LABEL: constant_sextload_v1i1_to_v1i64:
3690 ; EG: ; %bb.0:
3691 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3692 ; EG-NEXT: TEX 0 @6
3693 ; EG-NEXT: ALU 3, @9, KC0[CB0:0-32], KC1[]
3694 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
3695 ; EG-NEXT: CF_END
3696 ; EG-NEXT: PAD
3697 ; EG-NEXT: Fetch clause starting at 6:
3698 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3699 ; EG-NEXT: ALU clause starting at 8:
3700 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3701 ; EG-NEXT: ALU clause starting at 9:
3702 ; EG-NEXT: BFE_INT T0.X, T0.X, 0.0, 1,
3703 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
3704 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3705 ; EG-NEXT: MOV * T0.Y, PV.X,
3706 %load = load <1 x i1>, ptr addrspace(4) %in
3707 %ext = sext <1 x i1> %load to <1 x i64>
3708 store <1 x i64> %ext, ptr addrspace(1) %out
3709 ret void
3710 }
3712 define amdgpu_kernel void @constant_zextload_v2i1_to_v2i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3713 ; GFX6-LABEL: constant_zextload_v2i1_to_v2i64:
3714 ; GFX6: ; %bb.0:
3715 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3716 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3717 ; GFX6-NEXT: s_mov_b32 s6, -1
3718 ; GFX6-NEXT: s_mov_b32 s10, s6
3719 ; GFX6-NEXT: s_mov_b32 s11, s7
3720 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3721 ; GFX6-NEXT: s_mov_b32 s8, s2
3722 ; GFX6-NEXT: s_mov_b32 s9, s3
3723 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
3724 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
3725 ; GFX6-NEXT: s_mov_b32 s4, s0
3726 ; GFX6-NEXT: s_mov_b32 s5, s1
3727 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3728 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v0
3729 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
3730 ; GFX6-NEXT: v_mov_b32_e32 v3, v1
3731 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
3732 ; GFX6-NEXT: s_endpgm
3733 ;
3734 ; GFX8-LABEL: constant_zextload_v2i1_to_v2i64:
3735 ; GFX8: ; %bb.0:
3736 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3737 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3738 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3739 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3740 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
3741 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
3742 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
3743 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
3744 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3745 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v0
3746 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v0
3747 ; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v3
3748 ; GFX8-NEXT: v_mov_b32_e32 v3, v1
3749 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3750 ; GFX8-NEXT: s_endpgm
3751 ;
3752 ; EG-LABEL: constant_zextload_v2i1_to_v2i64:
3753 ; EG: ; %bb.0:
3754 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3755 ; EG-NEXT: TEX 0 @6
3756 ; EG-NEXT: ALU 5, @9, KC0[CB0:0-32], KC1[]
3757 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
3758 ; EG-NEXT: CF_END
3759 ; EG-NEXT: PAD
3760 ; EG-NEXT: Fetch clause starting at 6:
3761 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3762 ; EG-NEXT: ALU clause starting at 8:
3763 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3764 ; EG-NEXT: ALU clause starting at 9:
3765 ; EG-NEXT: BFE_UINT * T0.Z, T0.X, 1, 1,
3766 ; EG-NEXT: AND_INT T0.X, T0.X, 1,
3767 ; EG-NEXT: MOV T0.Y, 0.0,
3768 ; EG-NEXT: MOV T0.W, 0.0,
3769 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
3770 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3771 %load = load <2 x i1>, ptr addrspace(4) %in
3772 %ext = zext <2 x i1> %load to <2 x i64>
3773 store <2 x i64> %ext, ptr addrspace(1) %out
3774 ret void
3775 }
3777 define amdgpu_kernel void @constant_sextload_v2i1_to_v2i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3778 ; GFX6-LABEL: constant_sextload_v2i1_to_v2i64:
3779 ; GFX6: ; %bb.0:
3780 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3781 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3782 ; GFX6-NEXT: s_mov_b32 s6, -1
3783 ; GFX6-NEXT: s_mov_b32 s10, s6
3784 ; GFX6-NEXT: s_mov_b32 s11, s7
3785 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3786 ; GFX6-NEXT: s_mov_b32 s8, s2
3787 ; GFX6-NEXT: s_mov_b32 s9, s3
3788 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
3789 ; GFX6-NEXT: s_mov_b32 s4, s0
3790 ; GFX6-NEXT: s_mov_b32 s5, s1
3791 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3792 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v0
3793 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
3794 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
3795 ; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 1
3796 ; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2
3797 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
3798 ; GFX6-NEXT: s_endpgm
3799 ;
3800 ; GFX8-LABEL: constant_sextload_v2i1_to_v2i64:
3801 ; GFX8: ; %bb.0:
3802 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3803 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3804 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3805 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3806 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
3807 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
3808 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
3809 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3810 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v0
3811 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
3812 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
3813 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
3814 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
3815 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3816 ; GFX8-NEXT: s_endpgm
3817 ;
3818 ; EG-LABEL: constant_sextload_v2i1_to_v2i64:
3819 ; EG: ; %bb.0:
3820 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3821 ; EG-NEXT: TEX 0 @6
3822 ; EG-NEXT: ALU 6, @9, KC0[CB0:0-32], KC1[]
3823 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
3824 ; EG-NEXT: CF_END
3825 ; EG-NEXT: PAD
3826 ; EG-NEXT: Fetch clause starting at 6:
3827 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3828 ; EG-NEXT: ALU clause starting at 8:
3829 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3830 ; EG-NEXT: ALU clause starting at 9:
3831 ; EG-NEXT: BFE_INT T1.X, T0.X, 0.0, 1,
3832 ; EG-NEXT: LSHR * T0.W, T0.X, 1,
3833 ; EG-NEXT: BFE_INT * T1.Z, PV.W, 0.0, 1,
3834 ; EG-NEXT: MOV * T1.Y, T1.X,
3835 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
3836 ; EG-NEXT: MOV * T1.W, T1.Z,
3837 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3838 %load = load <2 x i1>, ptr addrspace(4) %in
3839 %ext = sext <2 x i1> %load to <2 x i64>
3840 store <2 x i64> %ext, ptr addrspace(1) %out
3841 ret void
3842 }
3844 define amdgpu_kernel void @constant_zextload_v3i1_to_v3i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3845 ; GFX6-LABEL: constant_zextload_v3i1_to_v3i64:
3846 ; GFX6: ; %bb.0:
3847 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3848 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3849 ; GFX6-NEXT: s_mov_b32 s6, -1
3850 ; GFX6-NEXT: s_mov_b32 s10, s6
3851 ; GFX6-NEXT: s_mov_b32 s11, s7
3852 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3853 ; GFX6-NEXT: s_mov_b32 s8, s2
3854 ; GFX6-NEXT: s_mov_b32 s9, s3
3855 ; GFX6-NEXT: buffer_load_ubyte v4, off, s[8:11], 0
3856 ; GFX6-NEXT: v_mov_b32_e32 v5, 0
3857 ; GFX6-NEXT: v_mov_b32_e32 v1, v5
3858 ; GFX6-NEXT: v_mov_b32_e32 v3, v5
3859 ; GFX6-NEXT: s_mov_b32 s4, s0
3860 ; GFX6-NEXT: s_mov_b32 s5, s1
3861 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3862 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v4
3863 ; GFX6-NEXT: v_bfe_u32 v2, v4, 1, 1
3864 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 2, v4
3865 ; GFX6-NEXT: buffer_store_dwordx2 v[4:5], off, s[4:7], 0 offset:16
3866 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
3867 ; GFX6-NEXT: s_endpgm
3868 ;
3869 ; GFX8-LABEL: constant_zextload_v3i1_to_v3i64:
3870 ; GFX8: ; %bb.0:
3871 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3872 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
3873 ; GFX8-NEXT: v_mov_b32_e32 v3, v5
3874 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3875 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3876 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3877 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
3878 ; GFX8-NEXT: s_add_u32 s2, s0, 16
3879 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3880 ; GFX8-NEXT: v_mov_b32_e32 v7, s3
3881 ; GFX8-NEXT: v_mov_b32_e32 v6, s2
3882 ; GFX8-NEXT: v_mov_b32_e32 v1, v5
3883 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3884 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v0
3885 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 2, v0
3886 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v0
3887 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
3888 ; GFX8-NEXT: flat_store_dwordx2 v[6:7], v[4:5]
3889 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
3890 ; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v8
3891 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2
3892 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
3893 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3894 ; GFX8-NEXT: s_endpgm
3895 ;
3896 ; EG-LABEL: constant_zextload_v3i1_to_v3i64:
3897 ; EG: ; %bb.0:
3898 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3899 ; EG-NEXT: TEX 0 @6
3900 ; EG-NEXT: ALU 11, @9, KC0[CB0:0-32], KC1[]
3901 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T3.X, 0
3902 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T2.X, 1
3903 ; EG-NEXT: CF_END
3904 ; EG-NEXT: Fetch clause starting at 6:
3905 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3906 ; EG-NEXT: ALU clause starting at 8:
3907 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3908 ; EG-NEXT: ALU clause starting at 9:
3909 ; EG-NEXT: BFE_UINT * T1.Z, T0.X, 1, 1,
3910 ; EG-NEXT: AND_INT T1.X, T0.X, 1,
3911 ; EG-NEXT: MOV T1.Y, 0.0,
3912 ; EG-NEXT: LSHR * T0.X, T0.X, literal.x,
3913 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3914 ; EG-NEXT: MOV T0.Y, 0.0,
3915 ; EG-NEXT: MOV * T1.W, 0.0,
3916 ; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,
3917 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3918 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
3919 ; EG-NEXT: LSHR * T3.X, PV.W, literal.x,
3920 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3921 %load = load <3 x i1>, ptr addrspace(4) %in
3922 %ext = zext <3 x i1> %load to <3 x i64>
3923 store <3 x i64> %ext, ptr addrspace(1) %out
3924 ret void
3925 }
3927 define amdgpu_kernel void @constant_sextload_v3i1_to_v3i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
3928 ; GFX6-LABEL: constant_sextload_v3i1_to_v3i64:
3929 ; GFX6: ; %bb.0:
3930 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3931 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
3932 ; GFX6-NEXT: s_mov_b32 s6, -1
3933 ; GFX6-NEXT: s_mov_b32 s10, s6
3934 ; GFX6-NEXT: s_mov_b32 s11, s7
3935 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
3936 ; GFX6-NEXT: s_mov_b32 s8, s2
3937 ; GFX6-NEXT: s_mov_b32 s9, s3
3938 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
3939 ; GFX6-NEXT: s_mov_b32 s4, s0
3940 ; GFX6-NEXT: s_mov_b32 s5, s1
3941 ; GFX6-NEXT: s_waitcnt vmcnt(0)
3942 ; GFX6-NEXT: v_lshrrev_b32_e32 v3, 2, v0
3943 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v0
3944 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
3945 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
3946 ; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 1
3947 ; GFX6-NEXT: v_bfe_i32 v4, v3, 0, 1
3948 ; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2
3949 ; GFX6-NEXT: v_ashrrev_i32_e32 v5, 31, v4
3950 ; GFX6-NEXT: buffer_store_dwordx2 v[4:5], off, s[4:7], 0 offset:16
3951 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
3952 ; GFX6-NEXT: s_endpgm
3953 ;
3954 ; GFX8-LABEL: constant_sextload_v3i1_to_v3i64:
3955 ; GFX8: ; %bb.0:
3956 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
3957 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
3958 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
3959 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
3960 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
3961 ; GFX8-NEXT: s_add_u32 s2, s0, 16
3962 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
3963 ; GFX8-NEXT: v_mov_b32_e32 v7, s3
3964 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
3965 ; GFX8-NEXT: v_mov_b32_e32 v6, s2
3966 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
3967 ; GFX8-NEXT: s_waitcnt vmcnt(0)
3968 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 2, v0
3969 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v0
3970 ; GFX8-NEXT: v_bfe_i32 v8, v3, 0, 1
3971 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
3972 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
3973 ; GFX8-NEXT: v_ashrrev_i32_e32 v9, 31, v8
3974 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
3975 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
3976 ; GFX8-NEXT: flat_store_dwordx2 v[6:7], v[8:9]
3977 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3978 ; GFX8-NEXT: s_endpgm
3979 ;
3980 ; EG-LABEL: constant_sextload_v3i1_to_v3i64:
3981 ; EG: ; %bb.0:
3982 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
3983 ; EG-NEXT: TEX 0 @6
3984 ; EG-NEXT: ALU 14, @9, KC0[CB0:0-32], KC1[]
3985 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T3.X, 0
3986 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T2.X, 1
3987 ; EG-NEXT: CF_END
3988 ; EG-NEXT: Fetch clause starting at 6:
3989 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
3990 ; EG-NEXT: ALU clause starting at 8:
3991 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
3992 ; EG-NEXT: ALU clause starting at 9:
3993 ; EG-NEXT: BFE_INT T1.X, T0.X, 0.0, 1,
3994 ; EG-NEXT: LSHR T0.W, T0.X, 1,
3995 ; EG-NEXT: LSHR * T2.X, KC0[2].Y, literal.x,
3996 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3997 ; EG-NEXT: BFE_INT T1.Z, PV.W, 0.0, 1,
3998 ; EG-NEXT: LSHR * T0.W, T0.X, literal.x,
3999 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4000 ; EG-NEXT: BFE_INT T0.X, PV.W, 0.0, 1,
4001 ; EG-NEXT: MOV T1.Y, T1.X,
4002 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
4003 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
4004 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
4005 ; EG-NEXT: MOV T0.Y, PV.X,
4006 ; EG-NEXT: MOV * T1.W, T1.Z,
4007 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4008 %load = load <3 x i1>, ptr addrspace(4) %in
4009 %ext = sext <3 x i1> %load to <3 x i64>
4010 store <3 x i64> %ext, ptr addrspace(1) %out
4011 ret void
4012 }
4014 define amdgpu_kernel void @constant_zextload_v4i1_to_v4i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
4015 ; GFX6-LABEL: constant_zextload_v4i1_to_v4i64:
4016 ; GFX6: ; %bb.0:
4017 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
4018 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
4019 ; GFX6-NEXT: s_mov_b32 s6, -1
4020 ; GFX6-NEXT: s_mov_b32 s10, s6
4021 ; GFX6-NEXT: s_mov_b32 s11, s7
4022 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
4023 ; GFX6-NEXT: s_mov_b32 s8, s2
4024 ; GFX6-NEXT: s_mov_b32 s9, s3
4025 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
4026 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
4027 ; GFX6-NEXT: v_mov_b32_e32 v3, v1
4028 ; GFX6-NEXT: v_mov_b32_e32 v5, v1
4029 ; GFX6-NEXT: v_mov_b32_e32 v7, v1
4030 ; GFX6-NEXT: s_mov_b32 s4, s0
4031 ; GFX6-NEXT: s_mov_b32 s5, s1
4032 ; GFX6-NEXT: s_waitcnt vmcnt(0)
4033 ; GFX6-NEXT: v_and_b32_e32 v4, 1, v0
4034 ; GFX6-NEXT: v_bfe_u32 v6, v0, 1, 1
4035 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 3, v0
4036 ; GFX6-NEXT: v_bfe_u32 v0, v0, 2, 1
4037 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 offset:16
4038 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0
4039 ; GFX6-NEXT: s_endpgm
4040 ;
4041 ; GFX8-LABEL: constant_zextload_v4i1_to_v4i64:
4042 ; GFX8: ; %bb.0:
4043 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
4044 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
4045 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
4046 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
4047 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
4048 ; GFX8-NEXT: s_add_u32 s2, s0, 16
4049 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4050 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
4051 ; GFX8-NEXT: v_mov_b32_e32 v11, s3
4052 ; GFX8-NEXT: v_mov_b32_e32 v3, v1
4053 ; GFX8-NEXT: v_mov_b32_e32 v9, s1
4054 ; GFX8-NEXT: v_mov_b32_e32 v10, s2
4055 ; GFX8-NEXT: v_mov_b32_e32 v5, v1
4056 ; GFX8-NEXT: v_mov_b32_e32 v7, v1
4057 ; GFX8-NEXT: v_mov_b32_e32 v8, s0
4058 ; GFX8-NEXT: s_waitcnt vmcnt(0)
4059 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 2, v0
4060 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 1, v0
4061 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v0
4062 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 3, v0
4063 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v4
4064 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v6
4065 ; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v0
4066 ; GFX8-NEXT: v_and_b32_e32 v4, 0xffff, v12
4067 ; GFX8-NEXT: v_and_b32_e32 v6, 0xffff, v6
4068 ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[0:3]
4069 ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
4070 ; GFX8-NEXT: s_endpgm
4071 ;
4072 ; EG-LABEL: constant_zextload_v4i1_to_v4i64:
4073 ; EG: ; %bb.0:
4074 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
4075 ; EG-NEXT: TEX 0 @6
4076 ; EG-NEXT: ALU 14, @9, KC0[CB0:0-32], KC1[]
4077 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T3.X, 0
4078 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T2.X, 1
4079 ; EG-NEXT: CF_END
4080 ; EG-NEXT: Fetch clause starting at 6:
4081 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
4082 ; EG-NEXT: ALU clause starting at 8:
4083 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
4084 ; EG-NEXT: ALU clause starting at 9:
4085 ; EG-NEXT: BFE_UINT * T1.Z, T0.X, literal.x, 1,
4086 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
4087 ; EG-NEXT: BFE_UINT T1.X, T0.X, literal.x, 1,
4088 ; EG-NEXT: MOV T1.Y, 0.0,
4089 ; EG-NEXT: BFE_UINT T0.Z, T0.X, 1, 1,
4090 ; EG-NEXT: AND_INT * T0.X, T0.X, 1,
4091 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4092 ; EG-NEXT: MOV T0.Y, 0.0,
4093 ; EG-NEXT: MOV T1.W, 0.0,
4094 ; EG-NEXT: MOV * T0.W, 0.0,
4095 ; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,
4096 ; EG-NEXT: ADD_INT * T2.W, KC0[2].Y, literal.y,
4097 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
4098 ; EG-NEXT: LSHR * T3.X, PV.W, literal.x,
4099 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4100 %load = load <4 x i1>, ptr addrspace(4) %in
4101 %ext = zext <4 x i1> %load to <4 x i64>
4102 store <4 x i64> %ext, ptr addrspace(1) %out
4103 ret void
4104 }
4106 define amdgpu_kernel void @constant_sextload_v4i1_to_v4i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
4107 ; GFX6-LABEL: constant_sextload_v4i1_to_v4i64:
4108 ; GFX6: ; %bb.0:
4109 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
4110 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
4111 ; GFX6-NEXT: s_mov_b32 s6, -1
4112 ; GFX6-NEXT: s_mov_b32 s10, s6
4113 ; GFX6-NEXT: s_mov_b32 s11, s7
4114 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
4115 ; GFX6-NEXT: s_mov_b32 s8, s2
4116 ; GFX6-NEXT: s_mov_b32 s9, s3
4117 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
4118 ; GFX6-NEXT: s_mov_b32 s4, s0
4119 ; GFX6-NEXT: s_mov_b32 s5, s1
4120 ; GFX6-NEXT: s_waitcnt vmcnt(0)
4121 ; GFX6-NEXT: v_lshrrev_b32_e32 v3, 2, v0
4122 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 3, v0
4123 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v0
4124 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
4125 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
4126 ; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 1
4127 ; GFX6-NEXT: v_bfe_i32 v6, v4, 0, 1
4128 ; GFX6-NEXT: v_bfe_i32 v4, v3, 0, 1
4129 ; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2
4130 ; GFX6-NEXT: v_ashrrev_i32_e32 v7, 31, v6
4131 ; GFX6-NEXT: v_ashrrev_i32_e32 v5, 31, v4
4132 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16
4133 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
4134 ; GFX6-NEXT: s_endpgm
4135 ;
4136 ; GFX8-LABEL: constant_sextload_v4i1_to_v4i64:
4137 ; GFX8: ; %bb.0:
4138 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
4139 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
4140 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
4141 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
4142 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
4143 ; GFX8-NEXT: s_add_u32 s2, s0, 16
4144 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4145 ; GFX8-NEXT: v_mov_b32_e32 v11, s3
4146 ; GFX8-NEXT: v_mov_b32_e32 v9, s1
4147 ; GFX8-NEXT: v_mov_b32_e32 v10, s2
4148 ; GFX8-NEXT: v_mov_b32_e32 v8, s0
4149 ; GFX8-NEXT: s_waitcnt vmcnt(0)
4150 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 2, v0
4151 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 3, v0
4152 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v0
4153 ; GFX8-NEXT: v_bfe_i32 v6, v4, 0, 1
4154 ; GFX8-NEXT: v_bfe_i32 v4, v3, 0, 1
4155 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
4156 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
4157 ; GFX8-NEXT: v_ashrrev_i32_e32 v7, 31, v6
4158 ; GFX8-NEXT: v_ashrrev_i32_e32 v5, 31, v4
4159 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
4160 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
4161 ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
4162 ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
4163 ; GFX8-NEXT: s_endpgm
4164 ;
4165 ; EG-LABEL: constant_sextload_v4i1_to_v4i64:
4166 ; EG: ; %bb.0:
4167 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
4168 ; EG-NEXT: TEX 0 @6
4169 ; EG-NEXT: ALU 17, @9, KC0[CB0:0-32], KC1[]
4170 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T3.X, 0
4171 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
4172 ; EG-NEXT: CF_END
4173 ; EG-NEXT: Fetch clause starting at 6:
4174 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
4175 ; EG-NEXT: ALU clause starting at 8:
4176 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
4177 ; EG-NEXT: ALU clause starting at 9:
4178 ; EG-NEXT: LSHR * T0.W, T0.X, literal.x,
4179 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
4180 ; EG-NEXT: BFE_INT T1.X, T0.X, 0.0, 1,
4181 ; EG-NEXT: BFE_INT T2.Z, PV.W, 0.0, 1,
4182 ; EG-NEXT: LSHR * T0.W, T0.X, literal.x,
4183 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4184 ; EG-NEXT: BFE_INT T2.X, PV.W, 0.0, 1,
4185 ; EG-NEXT: LSHR * T0.W, T0.X, 1,
4186 ; EG-NEXT: MOV T2.Y, PV.X,
4187 ; EG-NEXT: BFE_INT * T1.Z, PV.W, 0.0, 1,
4188 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
4189 ; EG-NEXT: MOV T1.Y, T1.X,
4190 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4191 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
4192 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
4193 ; EG-NEXT: MOV T1.W, T1.Z,
4194 ; EG-NEXT: MOV * T2.W, T2.Z,
4195 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4196 %load = load <4 x i1>, ptr addrspace(4) %in
4197 %ext = sext <4 x i1> %load to <4 x i64>
4198 store <4 x i64> %ext, ptr addrspace(1) %out
4199 ret void
4200 }
4202 define amdgpu_kernel void @constant_zextload_v8i1_to_v8i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
4203 ; GFX6-LABEL: constant_zextload_v8i1_to_v8i64:
4204 ; GFX6: ; %bb.0:
4205 ; GFX6-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
4206 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
4207 ; GFX6-NEXT: s_mov_b32 s2, -1
4208 ; GFX6-NEXT: s_mov_b32 s10, s2
4209 ; GFX6-NEXT: s_mov_b32 s11, s3
4210 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
4211 ; GFX6-NEXT: s_mov_b32 s8, s6
4212 ; GFX6-NEXT: s_mov_b32 s9, s7
4213 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
4214 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
4215 ; GFX6-NEXT: v_mov_b32_e32 v3, v1
4216 ; GFX6-NEXT: v_mov_b32_e32 v5, v1
4217 ; GFX6-NEXT: v_mov_b32_e32 v7, v1
4218 ; GFX6-NEXT: v_mov_b32_e32 v9, v1
4219 ; GFX6-NEXT: v_mov_b32_e32 v11, v1
4220 ; GFX6-NEXT: v_mov_b32_e32 v13, v1
4221 ; GFX6-NEXT: v_mov_b32_e32 v15, v1
4222 ; GFX6-NEXT: s_mov_b32 s0, s4
4223 ; GFX6-NEXT: s_mov_b32 s1, s5
4224 ; GFX6-NEXT: s_waitcnt vmcnt(0)
4225 ; GFX6-NEXT: v_bfe_u32 v14, v0, 1, 1
4226 ; GFX6-NEXT: v_bfe_u32 v10, v0, 3, 1
4227 ; GFX6-NEXT: v_bfe_u32 v6, v0, 5, 1
4228 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 7, v0
4229 ; GFX6-NEXT: v_and_b32_e32 v12, 1, v0
4230 ; GFX6-NEXT: v_bfe_u32 v8, v0, 2, 1
4231 ; GFX6-NEXT: v_bfe_u32 v4, v0, 4, 1
4232 ; GFX6-NEXT: v_bfe_u32 v0, v0, 6, 1
4233 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
4234 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:32
4235 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
4236 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0
4237 ; GFX6-NEXT: s_endpgm
4238 ;
4239 ; GFX8-LABEL: constant_zextload_v8i1_to_v8i64:
4240 ; GFX8: ; %bb.0:
4241 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
4242 ; GFX8-NEXT: v_mov_b32_e32 v13, 0
4243 ; GFX8-NEXT: v_mov_b32_e32 v15, v13
4244 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
4245 ; GFX8-NEXT: v_mov_b32_e32 v7, 0
4246 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
4247 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
4248 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
4249 ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
4250 ; GFX8-NEXT: s_add_u32 s2, s0, 48
4251 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4252 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
4253 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
4254 ; GFX8-NEXT: s_add_u32 s2, s0, 32
4255 ; GFX8-NEXT: v_mov_b32_e32 v17, s1
4256 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4257 ; GFX8-NEXT: v_mov_b32_e32 v16, s0
4258 ; GFX8-NEXT: s_add_u32 s0, s0, 16
4259 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
4260 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
4261 ; GFX8-NEXT: v_mov_b32_e32 v23, s1
4262 ; GFX8-NEXT: v_mov_b32_e32 v11, 0
4263 ; GFX8-NEXT: v_mov_b32_e32 v9, v13
4264 ; GFX8-NEXT: v_mov_b32_e32 v5, v13
4265 ; GFX8-NEXT: v_mov_b32_e32 v1, v13
4266 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
4267 ; GFX8-NEXT: v_mov_b32_e32 v22, s0
4268 ; GFX8-NEXT: s_waitcnt vmcnt(0)
4269 ; GFX8-NEXT: v_lshrrev_b16_e32 v0, 2, v2
4270 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v0
4271 ; GFX8-NEXT: v_lshrrev_b16_e32 v0, 4, v2
4272 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 6, v2
4273 ; GFX8-NEXT: v_lshrrev_b16_e32 v10, 5, v2
4274 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v0
4275 ; GFX8-NEXT: v_lshrrev_b16_e32 v12, 3, v2
4276 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v2
4277 ; GFX8-NEXT: v_lshrrev_b16_e32 v14, 7, v2
4278 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v2
4279 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v10
4280 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v12
4281 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
4282 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v6
4283 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2
4284 ; GFX8-NEXT: v_and_b32_e32 v6, 0xffff, v24
4285 ; GFX8-NEXT: v_and_b32_e32 v10, 0xffff, v10
4286 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
4287 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[8:11]
4288 ; GFX8-NEXT: flat_store_dwordx4 v[22:23], v[4:7]
4289 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
4290 ; GFX8-NEXT: s_endpgm
4291 ;
4292 ; EG-LABEL: constant_zextload_v8i1_to_v8i64:
4293 ; EG: ; %bb.0:
4294 ; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]
4295 ; EG-NEXT: TEX 0 @8
4296 ; EG-NEXT: ALU 30, @11, KC0[CB0:0-32], KC1[]
4297 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T12.X, 0
4298 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T11.X, 0
4299 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T10.X, 0
4300 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T9.X, 1
4301 ; EG-NEXT: CF_END
4302 ; EG-NEXT: Fetch clause starting at 8:
4303 ; EG-NEXT: VTX_READ_8 T5.X, T5.X, 0, #1
4304 ; EG-NEXT: ALU clause starting at 10:
4305 ; EG-NEXT: MOV * T5.X, KC0[2].Z,
4306 ; EG-NEXT: ALU clause starting at 11:
4307 ; EG-NEXT: BFE_UINT * T6.Z, T5.X, literal.x, 1,
4308 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
4309 ; EG-NEXT: BFE_UINT T6.X, T5.X, literal.x, 1,
4310 ; EG-NEXT: MOV T6.Y, 0.0,
4311 ; EG-NEXT: BFE_UINT * T7.Z, T5.X, literal.y, 1,
4312 ; EG-NEXT: 6(8.407791e-45), 5(7.006492e-45)
4313 ; EG-NEXT: BFE_UINT T7.X, T5.X, literal.x, 1,
4314 ; EG-NEXT: MOV T7.Y, 0.0,
4315 ; EG-NEXT: BFE_UINT * T8.Z, T5.X, literal.y, 1,
4316 ; EG-NEXT: 4(5.605194e-45), 3(4.203895e-45)
4317 ; EG-NEXT: BFE_UINT T8.X, T5.X, literal.x, 1,
4318 ; EG-NEXT: MOV T8.Y, 0.0,
4319 ; EG-NEXT: BFE_UINT T5.Z, T5.X, 1, 1,
4320 ; EG-NEXT: AND_INT * T5.X, T5.X, 1,
4321 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4322 ; EG-NEXT: MOV T5.Y, 0.0,
4323 ; EG-NEXT: MOV T6.W, 0.0,
4324 ; EG-NEXT: MOV * T7.W, 0.0,
4325 ; EG-NEXT: MOV T8.W, 0.0,
4326 ; EG-NEXT: MOV * T5.W, 0.0,
4327 ; EG-NEXT: LSHR T9.X, KC0[2].Y, literal.x,
4328 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4329 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
4330 ; EG-NEXT: LSHR T10.X, PV.W, literal.x,
4331 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4332 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
4333 ; EG-NEXT: LSHR T11.X, PV.W, literal.x,
4334 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4335 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
4336 ; EG-NEXT: LSHR * T12.X, PV.W, literal.x,
4337 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4338 %load = load <8 x i1>, ptr addrspace(4) %in
4339 %ext = zext <8 x i1> %load to <8 x i64>
4340 store <8 x i64> %ext, ptr addrspace(1) %out
4341 ret void
4342 }
4344 define amdgpu_kernel void @constant_sextload_v8i1_to_v8i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
4345 ; GFX6-LABEL: constant_sextload_v8i1_to_v8i64:
4346 ; GFX6: ; %bb.0:
4347 ; GFX6-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
4348 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
4349 ; GFX6-NEXT: s_mov_b32 s2, -1
4350 ; GFX6-NEXT: s_mov_b32 s10, s2
4351 ; GFX6-NEXT: s_mov_b32 s11, s3
4352 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
4353 ; GFX6-NEXT: s_mov_b32 s8, s6
4354 ; GFX6-NEXT: s_mov_b32 s9, s7
4355 ; GFX6-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
4356 ; GFX6-NEXT: s_mov_b32 s0, s4
4357 ; GFX6-NEXT: s_mov_b32 s1, s5
4358 ; GFX6-NEXT: s_waitcnt vmcnt(0)
4359 ; GFX6-NEXT: v_lshrrev_b32_e32 v3, 6, v0
4360 ; GFX6-NEXT: v_lshrrev_b32_e32 v5, 7, v0
4361 ; GFX6-NEXT: v_lshrrev_b32_e32 v7, 4, v0
4362 ; GFX6-NEXT: v_lshrrev_b32_e32 v8, 5, v0
4363 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 2, v0
4364 ; GFX6-NEXT: v_lshrrev_b32_e32 v6, 3, v0
4365 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v0
4366 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
4367 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
4368 ; GFX6-NEXT: v_bfe_i32 v2, v2, 0, 1
4369 ; GFX6-NEXT: v_bfe_i32 v6, v6, 0, 1
4370 ; GFX6-NEXT: v_bfe_i32 v4, v4, 0, 1
4371 ; GFX6-NEXT: v_bfe_i32 v10, v8, 0, 1
4372 ; GFX6-NEXT: v_bfe_i32 v8, v7, 0, 1
4373 ; GFX6-NEXT: v_bfe_i32 v14, v5, 0, 1
4374 ; GFX6-NEXT: v_bfe_i32 v12, v3, 0, 1
4375 ; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2
4376 ; GFX6-NEXT: v_ashrrev_i32_e32 v7, 31, v6
4377 ; GFX6-NEXT: v_ashrrev_i32_e32 v5, 31, v4
4378 ; GFX6-NEXT: v_ashrrev_i32_e32 v11, 31, v10
4379 ; GFX6-NEXT: v_ashrrev_i32_e32 v9, 31, v8
4380 ; GFX6-NEXT: v_ashrrev_i32_e32 v15, 31, v14
4381 ; GFX6-NEXT: v_ashrrev_i32_e32 v13, 31, v12
4382 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
4383 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
4384 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
4385 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
4386 ; GFX6-NEXT: s_endpgm
4387 ;
4388 ; GFX8-LABEL: constant_sextload_v8i1_to_v8i64:
4389 ; GFX8: ; %bb.0:
4390 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
4391 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
4392 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
4393 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
4394 ; GFX8-NEXT: flat_load_ubyte v0, v[0:1]
4395 ; GFX8-NEXT: s_add_u32 s2, s0, 48
4396 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4397 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
4398 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
4399 ; GFX8-NEXT: s_add_u32 s2, s0, 32
4400 ; GFX8-NEXT: v_mov_b32_e32 v17, s1
4401 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4402 ; GFX8-NEXT: v_mov_b32_e32 v16, s0
4403 ; GFX8-NEXT: s_add_u32 s0, s0, 16
4404 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
4405 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
4406 ; GFX8-NEXT: v_mov_b32_e32 v23, s1
4407 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
4408 ; GFX8-NEXT: v_mov_b32_e32 v22, s0
4409 ; GFX8-NEXT: s_waitcnt vmcnt(0)
4410 ; GFX8-NEXT: v_lshrrev_b16_e32 v3, 6, v0
4411 ; GFX8-NEXT: v_lshrrev_b16_e32 v5, 7, v0
4412 ; GFX8-NEXT: v_lshrrev_b16_e32 v7, 4, v0
4413 ; GFX8-NEXT: v_lshrrev_b16_e32 v8, 5, v0
4414 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 2, v0
4415 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 3, v0
4416 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v0
4417 ; GFX8-NEXT: v_bfe_i32 v14, v5, 0, 1
4418 ; GFX8-NEXT: v_bfe_i32 v12, v3, 0, 1
4419 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
4420 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
4421 ; GFX8-NEXT: v_bfe_i32 v6, v6, 0, 1
4422 ; GFX8-NEXT: v_bfe_i32 v4, v4, 0, 1
4423 ; GFX8-NEXT: v_bfe_i32 v10, v8, 0, 1
4424 ; GFX8-NEXT: v_bfe_i32 v8, v7, 0, 1
4425 ; GFX8-NEXT: v_ashrrev_i32_e32 v15, 31, v14
4426 ; GFX8-NEXT: v_ashrrev_i32_e32 v13, 31, v12
4427 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
4428 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
4429 ; GFX8-NEXT: v_ashrrev_i32_e32 v7, 31, v6
4430 ; GFX8-NEXT: v_ashrrev_i32_e32 v5, 31, v4
4431 ; GFX8-NEXT: v_ashrrev_i32_e32 v11, 31, v10
4432 ; GFX8-NEXT: v_ashrrev_i32_e32 v9, 31, v8
4433 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
4434 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[8:11]
4435 ; GFX8-NEXT: flat_store_dwordx4 v[22:23], v[4:7]
4436 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
4437 ; GFX8-NEXT: s_endpgm
4438 ;
4439 ; EG-LABEL: constant_sextload_v8i1_to_v8i64:
4440 ; EG: ; %bb.0:
4441 ; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]
4442 ; EG-NEXT: TEX 0 @8
4443 ; EG-NEXT: ALU 37, @11, KC0[CB0:0-32], KC1[]
4444 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T12.X, 0
4445 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T11.X, 0
4446 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T10.X, 0
4447 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T6.X, 1
4448 ; EG-NEXT: CF_END
4449 ; EG-NEXT: Fetch clause starting at 8:
4450 ; EG-NEXT: VTX_READ_8 T5.X, T5.X, 0, #1
4451 ; EG-NEXT: ALU clause starting at 10:
4452 ; EG-NEXT: MOV * T5.X, KC0[2].Z,
4453 ; EG-NEXT: ALU clause starting at 11:
4454 ; EG-NEXT: LSHR T6.X, KC0[2].Y, literal.x,
4455 ; EG-NEXT: LSHR * T0.W, T5.X, literal.y,
4456 ; EG-NEXT: 2(2.802597e-45), 7(9.809089e-45)
4457 ; EG-NEXT: BFE_INT T7.X, T5.X, 0.0, 1,
4458 ; EG-NEXT: BFE_INT T8.Z, PV.W, 0.0, 1,
4459 ; EG-NEXT: LSHR T0.W, T5.X, literal.x,
4460 ; EG-NEXT: LSHR * T1.W, T5.X, literal.y,
4461 ; EG-NEXT: 3(4.203895e-45), 6(8.407791e-45)
4462 ; EG-NEXT: BFE_INT T8.X, PS, 0.0, 1,
4463 ; EG-NEXT: BFE_INT T9.Z, PV.W, 0.0, 1,
4464 ; EG-NEXT: LSHR T0.W, T5.X, 1,
4465 ; EG-NEXT: LSHR * T1.W, T5.X, literal.x,
4466 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4467 ; EG-NEXT: BFE_INT T9.X, PS, 0.0, 1,
4468 ; EG-NEXT: MOV T8.Y, PV.X,
4469 ; EG-NEXT: BFE_INT T7.Z, PV.W, 0.0, 1,
4470 ; EG-NEXT: LSHR T0.W, T5.X, literal.x,
4471 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,
4472 ; EG-NEXT: 5(7.006492e-45), 16(2.242078e-44)
4473 ; EG-NEXT: LSHR T10.X, PS, literal.x,
4474 ; EG-NEXT: MOV T9.Y, PV.X,
4475 ; EG-NEXT: BFE_INT T5.Z, PV.W, 0.0, 1,
4476 ; EG-NEXT: LSHR * T0.W, T5.X, literal.y,
4477 ; EG-NEXT: 2(2.802597e-45), 4(5.605194e-45)
4478 ; EG-NEXT: BFE_INT T5.X, PV.W, 0.0, 1,
4479 ; EG-NEXT: MOV T7.Y, T7.X,
4480 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
4481 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
4482 ; EG-NEXT: LSHR T11.X, PV.W, literal.x,
4483 ; EG-NEXT: MOV T5.Y, PV.X,
4484 ; EG-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.y,
4485 ; EG-NEXT: MOV T7.W, T7.Z,
4486 ; EG-NEXT: MOV * T9.W, T9.Z,
4487 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
4488 ; EG-NEXT: LSHR T12.X, PV.Z, literal.x,
4489 ; EG-NEXT: MOV T5.W, T5.Z,
4490 ; EG-NEXT: MOV * T8.W, T8.Z,
4491 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4492 %load = load <8 x i1>, ptr addrspace(4) %in
4493 %ext = sext <8 x i1> %load to <8 x i64>
4494 store <8 x i64> %ext, ptr addrspace(1) %out
4495 ret void
4496 }
4498 define amdgpu_kernel void @constant_zextload_v16i1_to_v16i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
4499 ; GFX6-LABEL: constant_zextload_v16i1_to_v16i64:
4500 ; GFX6: ; %bb.0:
4501 ; GFX6-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
4502 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
4503 ; GFX6-NEXT: s_mov_b32 s2, -1
4504 ; GFX6-NEXT: s_mov_b32 s10, s2
4505 ; GFX6-NEXT: s_mov_b32 s11, s3
4506 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
4507 ; GFX6-NEXT: s_mov_b32 s8, s6
4508 ; GFX6-NEXT: s_mov_b32 s9, s7
4509 ; GFX6-NEXT: buffer_load_ushort v29, off, s[8:11], 0
4510 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
4511 ; GFX6-NEXT: v_mov_b32_e32 v3, v1
4512 ; GFX6-NEXT: v_mov_b32_e32 v4, v1
4513 ; GFX6-NEXT: v_mov_b32_e32 v6, v1
4514 ; GFX6-NEXT: v_mov_b32_e32 v7, v1
4515 ; GFX6-NEXT: v_mov_b32_e32 v9, v1
4516 ; GFX6-NEXT: v_mov_b32_e32 v10, v1
4517 ; GFX6-NEXT: v_mov_b32_e32 v12, v1
4518 ; GFX6-NEXT: v_mov_b32_e32 v14, v1
4519 ; GFX6-NEXT: v_mov_b32_e32 v16, v1
4520 ; GFX6-NEXT: v_mov_b32_e32 v18, v1
4521 ; GFX6-NEXT: v_mov_b32_e32 v20, v1
4522 ; GFX6-NEXT: v_mov_b32_e32 v22, v1
4523 ; GFX6-NEXT: v_mov_b32_e32 v24, v1
4524 ; GFX6-NEXT: v_mov_b32_e32 v26, v1
4525 ; GFX6-NEXT: v_mov_b32_e32 v28, v1
4526 ; GFX6-NEXT: s_mov_b32 s0, s4
4527 ; GFX6-NEXT: s_mov_b32 s1, s5
4528 ; GFX6-NEXT: s_waitcnt vmcnt(0)
4529 ; GFX6-NEXT: v_bfe_u32 v2, v29, 11, 1
4530 ; GFX6-NEXT: v_bfe_u32 v0, v29, 10, 1
4531 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
4532 ; GFX6-NEXT: v_bfe_u32 v5, v29, 9, 1
4533 ; GFX6-NEXT: s_waitcnt expcnt(0)
4534 ; GFX6-NEXT: v_bfe_u32 v3, v29, 8, 1
4535 ; GFX6-NEXT: buffer_store_dwordx4 v[3:6], off, s[0:3], 0 offset:64
4536 ; GFX6-NEXT: v_lshrrev_b32_e32 v8, 15, v29
4537 ; GFX6-NEXT: s_waitcnt expcnt(0)
4538 ; GFX6-NEXT: v_bfe_u32 v6, v29, 14, 1
4539 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:112
4540 ; GFX6-NEXT: v_bfe_u32 v27, v29, 5, 1
4541 ; GFX6-NEXT: v_bfe_u32 v23, v29, 7, 1
4542 ; GFX6-NEXT: v_bfe_u32 v19, v29, 1, 1
4543 ; GFX6-NEXT: v_bfe_u32 v15, v29, 3, 1
4544 ; GFX6-NEXT: v_bfe_u32 v11, v29, 13, 1
4545 ; GFX6-NEXT: v_bfe_u32 v25, v29, 4, 1
4546 ; GFX6-NEXT: v_bfe_u32 v21, v29, 6, 1
4547 ; GFX6-NEXT: v_and_b32_e32 v17, 1, v29
4548 ; GFX6-NEXT: v_bfe_u32 v13, v29, 2, 1
4549 ; GFX6-NEXT: s_waitcnt expcnt(0)
4550 ; GFX6-NEXT: v_bfe_u32 v9, v29, 12, 1
4551 ; GFX6-NEXT: buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:96
4552 ; GFX6-NEXT: buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:16
4553 ; GFX6-NEXT: buffer_store_dwordx4 v[17:20], off, s[0:3], 0
4554 ; GFX6-NEXT: buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:48
4555 ; GFX6-NEXT: buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:32
4556 ; GFX6-NEXT: s_endpgm
4557 ;
4558 ; GFX8-LABEL: constant_zextload_v16i1_to_v16i64:
4559 ; GFX8: ; %bb.0:
4560 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
4561 ; GFX8-NEXT: v_mov_b32_e32 v20, 0
4562 ; GFX8-NEXT: v_mov_b32_e32 v19, 0
4563 ; GFX8-NEXT: v_mov_b32_e32 v17, v20
4564 ; GFX8-NEXT: v_mov_b32_e32 v22, v20
4565 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
4566 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
4567 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
4568 ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
4569 ; GFX8-NEXT: s_add_u32 s2, s0, 0x70
4570 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4571 ; GFX8-NEXT: s_add_u32 s4, s0, 0x50
4572 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
4573 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
4574 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
4575 ; GFX8-NEXT: v_mov_b32_e32 v23, v20
4576 ; GFX8-NEXT: v_mov_b32_e32 v13, v20
4577 ; GFX8-NEXT: v_mov_b32_e32 v9, v20
4578 ; GFX8-NEXT: v_mov_b32_e32 v5, v20
4579 ; GFX8-NEXT: v_mov_b32_e32 v25, 0
4580 ; GFX8-NEXT: v_mov_b32_e32 v15, 0
4581 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
4582 ; GFX8-NEXT: v_mov_b32_e32 v7, 0
4583 ; GFX8-NEXT: v_mov_b32_e32 v11, 0
4584 ; GFX8-NEXT: s_waitcnt vmcnt(0)
4585 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 10, v2
4586 ; GFX8-NEXT: v_and_b32_e32 v16, 1, v4
4587 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 11, v2
4588 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v4
4589 ; GFX8-NEXT: v_and_b32_e32 v18, 0xffff, v4
4590 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
4591 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 14, v2
4592 ; GFX8-NEXT: v_mov_b32_e32 v17, s3
4593 ; GFX8-NEXT: v_mov_b32_e32 v16, s2
4594 ; GFX8-NEXT: s_add_u32 s2, s0, 64
4595 ; GFX8-NEXT: v_mov_b32_e32 v0, 1
4596 ; GFX8-NEXT: v_and_b32_e32 v19, 1, v4
4597 ; GFX8-NEXT: v_lshrrev_b16_e32 v21, 15, v2
4598 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4599 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[19:22]
4600 ; GFX8-NEXT: v_mov_b32_e32 v17, s3
4601 ; GFX8-NEXT: v_and_b32_sdwa v19, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
4602 ; GFX8-NEXT: v_lshrrev_b16_e32 v0, 9, v2
4603 ; GFX8-NEXT: v_mov_b32_e32 v16, s2
4604 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v0
4605 ; GFX8-NEXT: s_add_u32 s2, s0, 0x60
4606 ; GFX8-NEXT: v_mov_b32_e32 v22, 0
4607 ; GFX8-NEXT: v_and_b32_e32 v21, 0xffff, v0
4608 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4609 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[19:22]
4610 ; GFX8-NEXT: v_mov_b32_e32 v1, v20
4611 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
4612 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
4613 ; GFX8-NEXT: s_add_u32 s2, s0, 48
4614 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4615 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
4616 ; GFX8-NEXT: v_lshrrev_b16_e32 v0, 12, v2
4617 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
4618 ; GFX8-NEXT: s_add_u32 s2, s0, 32
4619 ; GFX8-NEXT: v_and_b32_e32 v22, 1, v0
4620 ; GFX8-NEXT: v_lshrrev_b16_e32 v0, 13, v2
4621 ; GFX8-NEXT: v_mov_b32_e32 v17, s1
4622 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4623 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v0
4624 ; GFX8-NEXT: v_mov_b32_e32 v16, s0
4625 ; GFX8-NEXT: v_and_b32_e32 v24, 0xffff, v0
4626 ; GFX8-NEXT: s_add_u32 s0, s0, 16
4627 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 7, v2
4628 ; GFX8-NEXT: v_lshrrev_b16_e32 v0, 6, v2
4629 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[22:25]
4630 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
4631 ; GFX8-NEXT: v_lshrrev_b16_e32 v4, 2, v2
4632 ; GFX8-NEXT: v_lshrrev_b16_e32 v8, 4, v2
4633 ; GFX8-NEXT: v_lshrrev_b16_e32 v10, 5, v2
4634 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v0
4635 ; GFX8-NEXT: v_lshrrev_b16_e32 v14, 3, v2
4636 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v2
4637 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v2
4638 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v6
4639 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
4640 ; GFX8-NEXT: v_mov_b32_e32 v23, s1
4641 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v10
4642 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v14
4643 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
4644 ; GFX8-NEXT: v_and_b32_e32 v14, 0xffff, v24
4645 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
4646 ; GFX8-NEXT: v_mov_b32_e32 v22, s0
4647 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v4
4648 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v8
4649 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2
4650 ; GFX8-NEXT: v_and_b32_e32 v6, 0xffff, v6
4651 ; GFX8-NEXT: v_and_b32_e32 v10, 0xffff, v10
4652 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[12:15]
4653 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[8:11]
4654 ; GFX8-NEXT: flat_store_dwordx4 v[22:23], v[4:7]
4655 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
4656 ; GFX8-NEXT: s_endpgm
4657 ;
4658 ; EG-LABEL: constant_zextload_v16i1_to_v16i64:
4659 ; EG: ; %bb.0:
4660 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
4661 ; EG-NEXT: TEX 0 @12
4662 ; EG-NEXT: ALU 62, @15, KC0[CB0:0-32], KC1[]
4663 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T22.X, 0
4664 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T21.X, 0
4665 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T20.X, 0
4666 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T19.X, 0
4667 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T18.X, 0
4668 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T17.X, 0
4669 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T16.X, 0
4670 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T15.X, 1
4671 ; EG-NEXT: CF_END
4672 ; EG-NEXT: Fetch clause starting at 12:
4673 ; EG-NEXT: VTX_READ_16 T7.X, T7.X, 0, #1
4674 ; EG-NEXT: ALU clause starting at 14:
4675 ; EG-NEXT: MOV * T7.X, KC0[2].Z,
4676 ; EG-NEXT: ALU clause starting at 15:
4677 ; EG-NEXT: LSHR * T8.Z, T7.X, literal.x,
4678 ; EG-NEXT: 15(2.101948e-44), 0(0.000000e+00)
4679 ; EG-NEXT: BFE_UINT T8.X, T7.X, literal.x, 1,
4680 ; EG-NEXT: MOV T8.Y, 0.0,
4681 ; EG-NEXT: BFE_UINT * T9.Z, T7.X, literal.y, 1,
4682 ; EG-NEXT: 14(1.961818e-44), 13(1.821688e-44)
4683 ; EG-NEXT: BFE_UINT T9.X, T7.X, literal.x, 1,
4684 ; EG-NEXT: MOV T9.Y, 0.0,
4685 ; EG-NEXT: BFE_UINT * T10.Z, T7.X, literal.y, 1,
4686 ; EG-NEXT: 12(1.681558e-44), 11(1.541428e-44)
4687 ; EG-NEXT: BFE_UINT T10.X, T7.X, literal.x, 1,
4688 ; EG-NEXT: MOV T10.Y, 0.0,
4689 ; EG-NEXT: BFE_UINT * T11.Z, T7.X, literal.y, 1,
4690 ; EG-NEXT: 10(1.401298e-44), 9(1.261169e-44)
4691 ; EG-NEXT: BFE_UINT T11.X, T7.X, literal.x, 1,
4692 ; EG-NEXT: MOV T11.Y, 0.0,
4693 ; EG-NEXT: BFE_UINT * T12.Z, T7.X, literal.y, 1,
4694 ; EG-NEXT: 8(1.121039e-44), 7(9.809089e-45)
4695 ; EG-NEXT: BFE_UINT T12.X, T7.X, literal.x, 1,
4696 ; EG-NEXT: MOV T12.Y, 0.0,
4697 ; EG-NEXT: BFE_UINT * T13.Z, T7.X, literal.y, 1,
4698 ; EG-NEXT: 6(8.407791e-45), 5(7.006492e-45)
4699 ; EG-NEXT: BFE_UINT T13.X, T7.X, literal.x, 1,
4700 ; EG-NEXT: MOV T13.Y, 0.0,
4701 ; EG-NEXT: BFE_UINT * T14.Z, T7.X, literal.y, 1,
4702 ; EG-NEXT: 4(5.605194e-45), 3(4.203895e-45)
4703 ; EG-NEXT: BFE_UINT T14.X, T7.X, literal.x, 1,
4704 ; EG-NEXT: MOV T14.Y, 0.0,
4705 ; EG-NEXT: BFE_UINT T7.Z, T7.X, 1, 1,
4706 ; EG-NEXT: AND_INT * T7.X, T7.X, 1,
4707 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4708 ; EG-NEXT: MOV T7.Y, 0.0,
4709 ; EG-NEXT: MOV T8.W, 0.0,
4710 ; EG-NEXT: MOV * T9.W, 0.0,
4711 ; EG-NEXT: MOV T10.W, 0.0,
4712 ; EG-NEXT: MOV * T11.W, 0.0,
4713 ; EG-NEXT: MOV T12.W, 0.0,
4714 ; EG-NEXT: MOV * T13.W, 0.0,
4715 ; EG-NEXT: MOV T14.W, 0.0,
4716 ; EG-NEXT: MOV * T7.W, 0.0,
4717 ; EG-NEXT: LSHR T15.X, KC0[2].Y, literal.x,
4718 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4719 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
4720 ; EG-NEXT: LSHR T16.X, PV.W, literal.x,
4721 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4722 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
4723 ; EG-NEXT: LSHR T17.X, PV.W, literal.x,
4724 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4725 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
4726 ; EG-NEXT: LSHR T18.X, PV.W, literal.x,
4727 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4728 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
4729 ; EG-NEXT: LSHR T19.X, PV.W, literal.x,
4730 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4731 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
4732 ; EG-NEXT: LSHR T20.X, PV.W, literal.x,
4733 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4734 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
4735 ; EG-NEXT: LSHR T21.X, PV.W, literal.x,
4736 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4737 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
4738 ; EG-NEXT: LSHR * T22.X, PV.W, literal.x,
4739 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4740 %load = load <16 x i1>, ptr addrspace(4) %in
4741 %ext = zext <16 x i1> %load to <16 x i64>
4742 store <16 x i64> %ext, ptr addrspace(1) %out
4743 ret void
4744 }
4746 define amdgpu_kernel void @constant_sextload_v16i1_to_v16i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
4747 ; GFX6-LABEL: constant_sextload_v16i1_to_v16i64:
4748 ; GFX6: ; %bb.0:
4749 ; GFX6-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
4750 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
4751 ; GFX6-NEXT: s_mov_b32 s2, -1
4752 ; GFX6-NEXT: s_mov_b32 s10, s2
4753 ; GFX6-NEXT: s_mov_b32 s11, s3
4754 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
4755 ; GFX6-NEXT: s_mov_b32 s8, s6
4756 ; GFX6-NEXT: s_mov_b32 s9, s7
4757 ; GFX6-NEXT: buffer_load_ushort v5, off, s[8:11], 0
4758 ; GFX6-NEXT: s_mov_b32 s0, s4
4759 ; GFX6-NEXT: s_mov_b32 s1, s5
4760 ; GFX6-NEXT: s_waitcnt vmcnt(0)
4761 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 14, v5
4762 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 15, v5
4763 ; GFX6-NEXT: v_lshrrev_b32_e32 v7, 12, v5
4764 ; GFX6-NEXT: v_lshrrev_b32_e32 v9, 10, v5
4765 ; GFX6-NEXT: v_lshrrev_b32_e32 v11, 11, v5
4766 ; GFX6-NEXT: v_lshrrev_b32_e32 v12, 8, v5
4767 ; GFX6-NEXT: v_lshrrev_b32_e32 v13, 9, v5
4768 ; GFX6-NEXT: v_lshrrev_b32_e32 v8, 6, v5
4769 ; GFX6-NEXT: v_lshrrev_b32_e32 v10, 7, v5
4770 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 4, v5
4771 ; GFX6-NEXT: v_lshrrev_b32_e32 v6, 5, v5
4772 ; GFX6-NEXT: v_lshrrev_b32_e32 v14, 2, v5
4773 ; GFX6-NEXT: v_bfe_i32 v2, v1, 0, 1
4774 ; GFX6-NEXT: v_bfe_i32 v0, v0, 0, 1
4775 ; GFX6-NEXT: v_lshrrev_b32_e32 v15, 3, v5
4776 ; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2
4777 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
4778 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
4779 ; GFX6-NEXT: s_waitcnt expcnt(0)
4780 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 1, v5
4781 ; GFX6-NEXT: v_bfe_i32 v2, v15, 0, 1
4782 ; GFX6-NEXT: v_bfe_i32 v0, v14, 0, 1
4783 ; GFX6-NEXT: v_bfe_i32 v6, v6, 0, 1
4784 ; GFX6-NEXT: v_bfe_i32 v4, v4, 0, 1
4785 ; GFX6-NEXT: v_bfe_i32 v10, v10, 0, 1
4786 ; GFX6-NEXT: v_bfe_i32 v8, v8, 0, 1
4787 ; GFX6-NEXT: v_bfe_i32 v14, v13, 0, 1
4788 ; GFX6-NEXT: v_bfe_i32 v12, v12, 0, 1
4789 ; GFX6-NEXT: v_bfe_i32 v18, v11, 0, 1
4790 ; GFX6-NEXT: v_bfe_i32 v16, v9, 0, 1
4791 ; GFX6-NEXT: v_bfe_i32 v22, v1, 0, 1
4792 ; GFX6-NEXT: v_bfe_i32 v20, v5, 0, 1
4793 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 13, v5
4794 ; GFX6-NEXT: v_bfe_i32 v26, v1, 0, 1
4795 ; GFX6-NEXT: v_bfe_i32 v24, v7, 0, 1
4796 ; GFX6-NEXT: v_ashrrev_i32_e32 v21, 31, v20
4797 ; GFX6-NEXT: v_ashrrev_i32_e32 v23, 31, v22
4798 ; GFX6-NEXT: v_ashrrev_i32_e32 v3, 31, v2
4799 ; GFX6-NEXT: v_ashrrev_i32_e32 v1, 31, v0
4800 ; GFX6-NEXT: v_ashrrev_i32_e32 v7, 31, v6
4801 ; GFX6-NEXT: v_ashrrev_i32_e32 v5, 31, v4
4802 ; GFX6-NEXT: v_ashrrev_i32_e32 v11, 31, v10
4803 ; GFX6-NEXT: v_ashrrev_i32_e32 v9, 31, v8
4804 ; GFX6-NEXT: v_ashrrev_i32_e32 v15, 31, v14
4805 ; GFX6-NEXT: v_ashrrev_i32_e32 v13, 31, v12
4806 ; GFX6-NEXT: v_ashrrev_i32_e32 v19, 31, v18
4807 ; GFX6-NEXT: v_ashrrev_i32_e32 v17, 31, v16
4808 ; GFX6-NEXT: v_ashrrev_i32_e32 v27, 31, v26
4809 ; GFX6-NEXT: v_ashrrev_i32_e32 v25, 31, v24
4810 ; GFX6-NEXT: buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:96
4811 ; GFX6-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80
4812 ; GFX6-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:64
4813 ; GFX6-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48
4814 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:32
4815 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
4816 ; GFX6-NEXT: buffer_store_dwordx4 v[20:23], off, s[0:3], 0
4817 ; GFX6-NEXT: s_endpgm
4818 ;
4819 ; GFX8-LABEL: constant_sextload_v16i1_to_v16i64:
4820 ; GFX8: ; %bb.0:
4821 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
4822 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
4823 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
4824 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
4825 ; GFX8-NEXT: flat_load_ushort v0, v[0:1]
4826 ; GFX8-NEXT: s_add_u32 s2, s0, 0x70
4827 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4828 ; GFX8-NEXT: v_mov_b32_e32 v6, s3
4829 ; GFX8-NEXT: v_mov_b32_e32 v5, s2
4830 ; GFX8-NEXT: s_add_u32 s2, s0, 0x60
4831 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4832 ; GFX8-NEXT: v_mov_b32_e32 v8, s3
4833 ; GFX8-NEXT: v_mov_b32_e32 v7, s2
4834 ; GFX8-NEXT: s_add_u32 s2, s0, 0x50
4835 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4836 ; GFX8-NEXT: v_mov_b32_e32 v10, s3
4837 ; GFX8-NEXT: v_mov_b32_e32 v9, s2
4838 ; GFX8-NEXT: s_add_u32 s2, s0, 64
4839 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4840 ; GFX8-NEXT: v_mov_b32_e32 v12, s3
4841 ; GFX8-NEXT: v_mov_b32_e32 v11, s2
4842 ; GFX8-NEXT: s_add_u32 s2, s0, 48
4843 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4844 ; GFX8-NEXT: v_mov_b32_e32 v19, s3
4845 ; GFX8-NEXT: v_mov_b32_e32 v18, s2
4846 ; GFX8-NEXT: s_add_u32 s2, s0, 32
4847 ; GFX8-NEXT: v_mov_b32_e32 v17, s1
4848 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
4849 ; GFX8-NEXT: v_mov_b32_e32 v16, s0
4850 ; GFX8-NEXT: s_add_u32 s0, s0, 16
4851 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
4852 ; GFX8-NEXT: v_mov_b32_e32 v21, s3
4853 ; GFX8-NEXT: v_mov_b32_e32 v23, s1
4854 ; GFX8-NEXT: v_mov_b32_e32 v20, s2
4855 ; GFX8-NEXT: v_mov_b32_e32 v22, s0
4856 ; GFX8-NEXT: s_waitcnt vmcnt(0)
4857 ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 14, v0
4858 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 15, v0
4859 ; GFX8-NEXT: v_bfe_i32 v3, v2, 0, 1
4860 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 1
4861 ; GFX8-NEXT: v_lshrrev_b16_e32 v13, 12, v0
4862 ; GFX8-NEXT: v_lshrrev_b16_e32 v14, 13, v0
4863 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
4864 ; GFX8-NEXT: v_ashrrev_i32_e32 v2, 31, v1
4865 ; GFX8-NEXT: flat_store_dwordx4 v[5:6], v[1:4]
4866 ; GFX8-NEXT: v_lshrrev_b16_e32 v15, 10, v0
4867 ; GFX8-NEXT: v_bfe_i32 v3, v14, 0, 1
4868 ; GFX8-NEXT: v_bfe_i32 v1, v13, 0, 1
4869 ; GFX8-NEXT: v_lshrrev_b16_e32 v5, 11, v0
4870 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
4871 ; GFX8-NEXT: v_ashrrev_i32_e32 v2, 31, v1
4872 ; GFX8-NEXT: flat_store_dwordx4 v[7:8], v[1:4]
4873 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 8, v0
4874 ; GFX8-NEXT: v_bfe_i32 v3, v5, 0, 1
4875 ; GFX8-NEXT: v_bfe_i32 v1, v15, 0, 1
4876 ; GFX8-NEXT: v_lshrrev_b16_e32 v13, 9, v0
4877 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
4878 ; GFX8-NEXT: v_ashrrev_i32_e32 v2, 31, v1
4879 ; GFX8-NEXT: flat_store_dwordx4 v[9:10], v[1:4]
4880 ; GFX8-NEXT: v_lshrrev_b16_e32 v7, 6, v0
4881 ; GFX8-NEXT: v_bfe_i32 v3, v13, 0, 1
4882 ; GFX8-NEXT: v_bfe_i32 v1, v6, 0, 1
4883 ; GFX8-NEXT: v_lshrrev_b16_e32 v14, 7, v0
4884 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
4885 ; GFX8-NEXT: v_ashrrev_i32_e32 v2, 31, v1
4886 ; GFX8-NEXT: v_lshrrev_b16_e32 v5, 4, v0
4887 ; GFX8-NEXT: v_lshrrev_b16_e32 v8, 5, v0
4888 ; GFX8-NEXT: v_lshrrev_b16_e32 v9, 2, v0
4889 ; GFX8-NEXT: v_lshrrev_b16_e32 v6, 3, v0
4890 ; GFX8-NEXT: flat_store_dwordx4 v[11:12], v[1:4]
4891 ; GFX8-NEXT: v_bfe_i32 v14, v14, 0, 1
4892 ; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v0
4893 ; GFX8-NEXT: v_bfe_i32 v12, v7, 0, 1
4894 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
4895 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 1
4896 ; GFX8-NEXT: v_bfe_i32 v6, v6, 0, 1
4897 ; GFX8-NEXT: v_bfe_i32 v4, v9, 0, 1
4898 ; GFX8-NEXT: v_bfe_i32 v10, v8, 0, 1
4899 ; GFX8-NEXT: v_bfe_i32 v8, v5, 0, 1
4900 ; GFX8-NEXT: v_ashrrev_i32_e32 v15, 31, v14
4901 ; GFX8-NEXT: v_ashrrev_i32_e32 v13, 31, v12
4902 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
4903 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
4904 ; GFX8-NEXT: v_ashrrev_i32_e32 v7, 31, v6
4905 ; GFX8-NEXT: v_ashrrev_i32_e32 v5, 31, v4
4906 ; GFX8-NEXT: v_ashrrev_i32_e32 v11, 31, v10
4907 ; GFX8-NEXT: v_ashrrev_i32_e32 v9, 31, v8
4908 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
4909 ; GFX8-NEXT: flat_store_dwordx4 v[20:21], v[8:11]
4910 ; GFX8-NEXT: flat_store_dwordx4 v[22:23], v[4:7]
4911 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
4912 ; GFX8-NEXT: s_endpgm
4913 ;
4914 ; EG-LABEL: constant_sextload_v16i1_to_v16i64:
4915 ; EG: ; %bb.0:
4916 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
4917 ; EG-NEXT: TEX 0 @12
4918 ; EG-NEXT: ALU 78, @15, KC0[CB0:0-32], KC1[]
4919 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T22.X, 0
4920 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T21.X, 0
4921 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T18.X, 0
4922 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T12.X, 0
4923 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T11.X, 0
4924 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T10.X, 0
4925 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T9.X, 0
4926 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T8.X, 1
4927 ; EG-NEXT: CF_END
4928 ; EG-NEXT: Fetch clause starting at 12:
4929 ; EG-NEXT: VTX_READ_16 T7.X, T7.X, 0, #1
4930 ; EG-NEXT: ALU clause starting at 14:
4931 ; EG-NEXT: MOV * T7.X, KC0[2].Z,
4932 ; EG-NEXT: ALU clause starting at 15:
4933 ; EG-NEXT: LSHR T8.X, KC0[2].Y, literal.x,
4934 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4935 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
4936 ; EG-NEXT: LSHR T9.X, PV.W, literal.x,
4937 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4938 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
4939 ; EG-NEXT: LSHR T10.X, PV.W, literal.x,
4940 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4941 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
4942 ; EG-NEXT: LSHR T11.X, PV.W, literal.x,
4943 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4944 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
4945 ; EG-NEXT: LSHR T12.X, PV.W, literal.x,
4946 ; EG-NEXT: LSHR * T0.W, T7.X, literal.y,
4947 ; EG-NEXT: 2(2.802597e-45), 15(2.101948e-44)
4948 ; EG-NEXT: BFE_INT T13.X, T7.X, 0.0, 1,
4949 ; EG-NEXT: BFE_INT T14.Z, PV.W, 0.0, 1,
4950 ; EG-NEXT: LSHR T0.W, T7.X, literal.x,
4951 ; EG-NEXT: LSHR * T1.W, T7.X, literal.y,
4952 ; EG-NEXT: 11(1.541428e-44), 14(1.961818e-44)
4953 ; EG-NEXT: BFE_INT T14.X, PS, 0.0, 1,
4954 ; EG-NEXT: LSHR T0.Y, T7.X, literal.x,
4955 ; EG-NEXT: BFE_INT T15.Z, PV.W, 0.0, 1,
4956 ; EG-NEXT: LSHR T0.W, T7.X, literal.y,
4957 ; EG-NEXT: LSHR * T1.W, T7.X, literal.z,
4958 ; EG-NEXT: 12(1.681558e-44), 7(9.809089e-45)
4959 ; EG-NEXT: 10(1.401298e-44), 0(0.000000e+00)
4960 ; EG-NEXT: BFE_INT T15.X, PS, 0.0, 1,
4961 ; EG-NEXT: MOV T14.Y, PV.X,
4962 ; EG-NEXT: BFE_INT T16.Z, PV.W, 0.0, 1,
4963 ; EG-NEXT: LSHR T0.W, T7.X, literal.x,
4964 ; EG-NEXT: LSHR * T1.W, T7.X, literal.y,
4965 ; EG-NEXT: 3(4.203895e-45), 6(8.407791e-45)
4966 ; EG-NEXT: BFE_INT T16.X, PS, 0.0, 1,
4967 ; EG-NEXT: MOV T15.Y, PV.X,
4968 ; EG-NEXT: BFE_INT T17.Z, PV.W, 0.0, 1,
4969 ; EG-NEXT: LSHR T0.W, T7.X, 1,
4970 ; EG-NEXT: LSHR * T1.W, T7.X, literal.x,
4971 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4972 ; EG-NEXT: BFE_INT T17.X, PS, 0.0, 1,
4973 ; EG-NEXT: MOV T16.Y, PV.X,
4974 ; EG-NEXT: BFE_INT T13.Z, PV.W, 0.0, 1,
4975 ; EG-NEXT: LSHR T0.W, T7.X, literal.x,
4976 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,
4977 ; EG-NEXT: 5(7.006492e-45), 80(1.121039e-43)
4978 ; EG-NEXT: LSHR T18.X, PS, literal.x,
4979 ; EG-NEXT: MOV T17.Y, PV.X,
4980 ; EG-NEXT: BFE_INT T19.Z, PV.W, 0.0, 1,
4981 ; EG-NEXT: LSHR T0.W, T7.X, literal.y,
4982 ; EG-NEXT: LSHR * T1.W, T7.X, literal.z,
4983 ; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)
4984 ; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)
4985 ; EG-NEXT: BFE_INT T19.X, PS, 0.0, 1,
4986 ; EG-NEXT: MOV T13.Y, T13.X,
4987 ; EG-NEXT: BFE_INT T7.Z, PV.W, 0.0, 1,
4988 ; EG-NEXT: LSHR T0.W, T7.X, literal.x, BS:VEC_120/SCL_212
4989 ; EG-NEXT: LSHR * T1.W, T7.X, literal.y,
4990 ; EG-NEXT: 13(1.821688e-44), 8(1.121039e-44)
4991 ; EG-NEXT: BFE_INT T7.X, PS, 0.0, 1,
4992 ; EG-NEXT: MOV T19.Y, PV.X,
4993 ; EG-NEXT: BFE_INT T20.Z, PV.W, 0.0, 1,
4994 ; EG-NEXT: MOV T13.W, T13.Z,
4995 ; EG-NEXT: MOV * T17.W, T17.Z,
4996 ; EG-NEXT: BFE_INT T20.X, T0.Y, 0.0, 1,
4997 ; EG-NEXT: MOV T7.Y, PV.X,
4998 ; EG-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.x,
4999 ; EG-NEXT: MOV T19.W, T19.Z,
5000 ; EG-NEXT: MOV * T16.W, T16.Z,
5001 ; EG-NEXT: 96(1.345247e-43), 0(0.000000e+00)
5002 ; EG-NEXT: LSHR T21.X, PV.Z, literal.x,
5003 ; EG-NEXT: MOV T20.Y, PV.X,
5004 ; EG-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.y,
5005 ; EG-NEXT: MOV T7.W, T7.Z,
5006 ; EG-NEXT: MOV * T15.W, T15.Z,
5007 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
5008 ; EG-NEXT: LSHR T22.X, PV.Z, literal.x,
5009 ; EG-NEXT: MOV T20.W, T20.Z,
5010 ; EG-NEXT: MOV * T14.W, T14.Z,
5011 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
5012 %load = load <16 x i1>, ptr addrspace(4) %in
5013 %ext = sext <16 x i1> %load to <16 x i64>
5014 store <16 x i64> %ext, ptr addrspace(1) %out
5015 ret void
5016 }
5018 define amdgpu_kernel void @constant_zextload_v32i1_to_v32i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
5019 ; GFX6-LABEL: constant_zextload_v32i1_to_v32i64:
5020 ; GFX6: ; %bb.0:
5021 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
5022 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
5023 ; GFX6-NEXT: s_load_dword s4, s[2:3], 0x0
5024 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
5025 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
5026 ; GFX6-NEXT: s_mov_b32 s2, -1
5027 ; GFX6-NEXT: v_mov_b32_e32 v3, v1
5028 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
5029 ; GFX6-NEXT: s_bfe_u32 s5, s4, 0x10001
5030 ; GFX6-NEXT: s_bfe_u32 s6, s4, 0x10003
5031 ; GFX6-NEXT: s_bfe_u32 s7, s4, 0x10005
5032 ; GFX6-NEXT: s_bfe_u32 s8, s4, 0x10007
5033 ; GFX6-NEXT: s_bfe_u32 s9, s4, 0x10009
5034 ; GFX6-NEXT: s_bfe_u32 s10, s4, 0x1000b
5035 ; GFX6-NEXT: s_bfe_u32 s11, s4, 0x1000d
5036 ; GFX6-NEXT: s_bfe_u32 s12, s4, 0x1000f
5037 ; GFX6-NEXT: s_bfe_u32 s13, s4, 0x10011
5038 ; GFX6-NEXT: s_bfe_u32 s14, s4, 0x10013
5039 ; GFX6-NEXT: s_bfe_u32 s15, s4, 0x10015
5040 ; GFX6-NEXT: s_bfe_u32 s16, s4, 0x10017
5041 ; GFX6-NEXT: s_bfe_u32 s17, s4, 0x10019
5042 ; GFX6-NEXT: s_bfe_u32 s18, s4, 0x1001b
5043 ; GFX6-NEXT: s_bfe_u32 s19, s4, 0x1001d
5044 ; GFX6-NEXT: s_lshr_b32 s20, s4, 31
5045 ; GFX6-NEXT: s_and_b32 s21, s4, 1
5046 ; GFX6-NEXT: s_bfe_u32 s22, s4, 0x10002
5047 ; GFX6-NEXT: s_bfe_u32 s23, s4, 0x10004
5048 ; GFX6-NEXT: s_bfe_u32 s24, s4, 0x10006
5049 ; GFX6-NEXT: s_bfe_u32 s25, s4, 0x10008
5050 ; GFX6-NEXT: s_bfe_u32 s26, s4, 0x1000a
5051 ; GFX6-NEXT: s_bfe_u32 s27, s4, 0x1000c
5052 ; GFX6-NEXT: s_bfe_u32 s28, s4, 0x1000e
5053 ; GFX6-NEXT: s_bfe_u32 s29, s4, 0x10010
5054 ; GFX6-NEXT: s_bfe_u32 s30, s4, 0x10012
5055 ; GFX6-NEXT: s_bfe_u32 s31, s4, 0x10014
5056 ; GFX6-NEXT: s_bfe_u32 s33, s4, 0x10016
5057 ; GFX6-NEXT: s_bfe_u32 s34, s4, 0x10018
5058 ; GFX6-NEXT: s_bfe_u32 s35, s4, 0x1001a
5059 ; GFX6-NEXT: s_bfe_u32 s36, s4, 0x1001e
5060 ; GFX6-NEXT: s_bfe_u32 s4, s4, 0x1001c
5061 ; GFX6-NEXT: v_mov_b32_e32 v0, s36
5062 ; GFX6-NEXT: v_mov_b32_e32 v2, s20
5063 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
5064 ; GFX6-NEXT: s_waitcnt expcnt(0)
5065 ; GFX6-NEXT: v_mov_b32_e32 v0, s4
5066 ; GFX6-NEXT: v_mov_b32_e32 v2, s19
5067 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
5068 ; GFX6-NEXT: s_waitcnt expcnt(0)
5069 ; GFX6-NEXT: v_mov_b32_e32 v0, s35
5070 ; GFX6-NEXT: v_mov_b32_e32 v2, s18
5071 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:208
5072 ; GFX6-NEXT: s_waitcnt expcnt(0)
5073 ; GFX6-NEXT: v_mov_b32_e32 v0, s34
5074 ; GFX6-NEXT: v_mov_b32_e32 v2, s17
5075 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192
5076 ; GFX6-NEXT: s_waitcnt expcnt(0)
5077 ; GFX6-NEXT: v_mov_b32_e32 v0, s33
5078 ; GFX6-NEXT: v_mov_b32_e32 v2, s16
5079 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
5080 ; GFX6-NEXT: s_waitcnt expcnt(0)
5081 ; GFX6-NEXT: v_mov_b32_e32 v0, s31
5082 ; GFX6-NEXT: v_mov_b32_e32 v2, s15
5083 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
5084 ; GFX6-NEXT: s_waitcnt expcnt(0)
5085 ; GFX6-NEXT: v_mov_b32_e32 v0, s30
5086 ; GFX6-NEXT: v_mov_b32_e32 v2, s14
5087 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
5088 ; GFX6-NEXT: s_waitcnt expcnt(0)
5089 ; GFX6-NEXT: v_mov_b32_e32 v0, s29
5090 ; GFX6-NEXT: v_mov_b32_e32 v2, s13
5091 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
5092 ; GFX6-NEXT: s_waitcnt expcnt(0)
5093 ; GFX6-NEXT: v_mov_b32_e32 v0, s28
5094 ; GFX6-NEXT: v_mov_b32_e32 v2, s12
5095 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
5096 ; GFX6-NEXT: s_waitcnt expcnt(0)
5097 ; GFX6-NEXT: v_mov_b32_e32 v0, s27
5098 ; GFX6-NEXT: v_mov_b32_e32 v2, s11
5099 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
5100 ; GFX6-NEXT: s_waitcnt expcnt(0)
5101 ; GFX6-NEXT: v_mov_b32_e32 v0, s26
5102 ; GFX6-NEXT: v_mov_b32_e32 v2, s10
5103 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
5104 ; GFX6-NEXT: s_waitcnt expcnt(0)
5105 ; GFX6-NEXT: v_mov_b32_e32 v0, s25
5106 ; GFX6-NEXT: v_mov_b32_e32 v2, s9
5107 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
5108 ; GFX6-NEXT: s_waitcnt expcnt(0)
5109 ; GFX6-NEXT: v_mov_b32_e32 v0, s24
5110 ; GFX6-NEXT: v_mov_b32_e32 v2, s8
5111 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
5112 ; GFX6-NEXT: s_waitcnt expcnt(0)
5113 ; GFX6-NEXT: v_mov_b32_e32 v0, s23
5114 ; GFX6-NEXT: v_mov_b32_e32 v2, s7
5115 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
5116 ; GFX6-NEXT: s_waitcnt expcnt(0)
5117 ; GFX6-NEXT: v_mov_b32_e32 v0, s22
5118 ; GFX6-NEXT: v_mov_b32_e32 v2, s6
5119 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
5120 ; GFX6-NEXT: s_waitcnt expcnt(0)
5121 ; GFX6-NEXT: v_mov_b32_e32 v0, s21
5122 ; GFX6-NEXT: v_mov_b32_e32 v2, s5
5123 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
5124 ; GFX6-NEXT: s_endpgm
5125 ;
5126 ; GFX8-LABEL: constant_zextload_v32i1_to_v32i64:
5127 ; GFX8: ; %bb.0:
5128 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
5129 ; GFX8-NEXT: v_mov_b32_e32 v26, 0
5130 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
5131 ; GFX8-NEXT: s_load_dword s2, s[2:3], 0x0
5132 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
5133 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 13, s2
5134 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 11, s2
5135 ; GFX8-NEXT: v_and_b32_e32 v16, 1, v0
5136 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 9, s2
5137 ; GFX8-NEXT: s_lshr_b32 s14, s2, 24
5138 ; GFX8-NEXT: v_and_b32_e32 v11, 1, v1
5139 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v0
5140 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 7, s2
5141 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 3, s2
5142 ; GFX8-NEXT: s_bfe_u32 s10, s2, 0x10018
5143 ; GFX8-NEXT: s_and_b32 s11, s2, 1
5144 ; GFX8-NEXT: s_bfe_u32 s15, s2, 0x10011
5145 ; GFX8-NEXT: s_bfe_u32 s16, s2, 0x10010
5146 ; GFX8-NEXT: s_bfe_u32 s17, s2, 0x10012
5147 ; GFX8-NEXT: s_bfe_u32 s18, s2, 0x10013
5148 ; GFX8-NEXT: s_bfe_u32 s19, s2, 0x10014
5149 ; GFX8-NEXT: s_bfe_u32 s20, s2, 0x10015
5150 ; GFX8-NEXT: s_bfe_u32 s21, s2, 0x10016
5151 ; GFX8-NEXT: s_bfe_u32 s22, s2, 0x10017
5152 ; GFX8-NEXT: v_mov_b32_e32 v4, s2
5153 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 14, s2
5154 ; GFX8-NEXT: v_lshrrev_b16_e64 v15, 12, s2
5155 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 10, s2
5156 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v0
5157 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 6, s2
5158 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 5, s2
5159 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 4, s2
5160 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v1
5161 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 2, s2
5162 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 1, s2
5163 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 15, s2
5164 ; GFX8-NEXT: s_add_u32 s2, s0, 0xb0
5165 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
5166 ; GFX8-NEXT: s_add_u32 s4, s0, 0xa0
5167 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
5168 ; GFX8-NEXT: s_add_u32 s6, s0, 0x90
5169 ; GFX8-NEXT: s_addc_u32 s7, s1, 0
5170 ; GFX8-NEXT: s_add_u32 s8, s0, 0x80
5171 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
5172 ; GFX8-NEXT: s_add_u32 s12, s0, 0x70
5173 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v1
5174 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 5, s14
5175 ; GFX8-NEXT: s_addc_u32 s13, s1, 0
5176 ; GFX8-NEXT: v_and_b32_e32 v12, 1, v1
5177 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 3, s14
5178 ; GFX8-NEXT: v_mov_b32_e32 v25, s13
5179 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v1
5180 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
5181 ; GFX8-NEXT: v_mov_b32_e32 v24, s12
5182 ; GFX8-NEXT: s_add_u32 s12, s0, 0xf0
5183 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v14
5184 ; GFX8-NEXT: v_mov_b32_e32 v21, v1
5185 ; GFX8-NEXT: v_mov_b32_e32 v23, v1
5186 ; GFX8-NEXT: s_addc_u32 s13, s1, 0
5187 ; GFX8-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
5188 ; GFX8-NEXT: v_mov_b32_e32 v25, s13
5189 ; GFX8-NEXT: v_lshrrev_b16_e64 v17, 6, s14
5190 ; GFX8-NEXT: v_mov_b32_e32 v24, s12
5191 ; GFX8-NEXT: s_add_u32 s12, s0, 0x60
5192 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v17
5193 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 7, s14
5194 ; GFX8-NEXT: s_addc_u32 s13, s1, 0
5195 ; GFX8-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
5196 ; GFX8-NEXT: v_and_b32_e32 v25, 0xffff, v11
5197 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v15
5198 ; GFX8-NEXT: v_and_b32_e32 v22, 0xffff, v16
5199 ; GFX8-NEXT: v_mov_b32_e32 v16, s13
5200 ; GFX8-NEXT: v_mov_b32_e32 v15, s12
5201 ; GFX8-NEXT: s_add_u32 s12, s0, 0x50
5202 ; GFX8-NEXT: v_mov_b32_e32 v23, 0
5203 ; GFX8-NEXT: s_addc_u32 s13, s1, 0
5204 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[20:23]
5205 ; GFX8-NEXT: v_mov_b32_e32 v16, s13
5206 ; GFX8-NEXT: v_and_b32_e32 v23, 1, v9
5207 ; GFX8-NEXT: v_mov_b32_e32 v24, v1
5208 ; GFX8-NEXT: v_mov_b32_e32 v15, s12
5209 ; GFX8-NEXT: s_add_u32 s12, s0, 64
5210 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[23:26]
5211 ; GFX8-NEXT: v_mov_b32_e32 v15, 1
5212 ; GFX8-NEXT: s_addc_u32 s13, s1, 0
5213 ; GFX8-NEXT: v_and_b32_sdwa v23, v4, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
5214 ; GFX8-NEXT: v_mov_b32_e32 v16, s13
5215 ; GFX8-NEXT: v_mov_b32_e32 v15, s12
5216 ; GFX8-NEXT: s_add_u32 s12, s0, 48
5217 ; GFX8-NEXT: v_and_b32_e32 v25, 0xffff, v8
5218 ; GFX8-NEXT: v_mov_b32_e32 v26, 0
5219 ; GFX8-NEXT: s_addc_u32 s13, s1, 0
5220 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[23:26]
5221 ; GFX8-NEXT: v_mov_b32_e32 v16, s13
5222 ; GFX8-NEXT: v_and_b32_e32 v23, 1, v5
5223 ; GFX8-NEXT: v_and_b32_e32 v25, 0xffff, v3
5224 ; GFX8-NEXT: v_mov_b32_e32 v26, 0
5225 ; GFX8-NEXT: v_mov_b32_e32 v15, s12
5226 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v0
5227 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[23:26]
5228 ; GFX8-NEXT: v_mov_b32_e32 v16, s3
5229 ; GFX8-NEXT: v_and_b32_e32 v23, 1, v2
5230 ; GFX8-NEXT: v_and_b32_e32 v25, 0xffff, v0
5231 ; GFX8-NEXT: v_mov_b32_e32 v0, s21
5232 ; GFX8-NEXT: v_mov_b32_e32 v2, s22
5233 ; GFX8-NEXT: v_mov_b32_e32 v3, v1
5234 ; GFX8-NEXT: v_mov_b32_e32 v15, s2
5235 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[0:3]
5236 ; GFX8-NEXT: v_mov_b32_e32 v16, s5
5237 ; GFX8-NEXT: v_mov_b32_e32 v0, s19
5238 ; GFX8-NEXT: v_mov_b32_e32 v2, s20
5239 ; GFX8-NEXT: v_mov_b32_e32 v15, s4
5240 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[0:3]
5241 ; GFX8-NEXT: v_mov_b32_e32 v16, s7
5242 ; GFX8-NEXT: v_mov_b32_e32 v0, s17
5243 ; GFX8-NEXT: v_mov_b32_e32 v2, s18
5244 ; GFX8-NEXT: v_mov_b32_e32 v15, s6
5245 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[0:3]
5246 ; GFX8-NEXT: v_mov_b32_e32 v16, s9
5247 ; GFX8-NEXT: v_mov_b32_e32 v0, s16
5248 ; GFX8-NEXT: v_mov_b32_e32 v2, s15
5249 ; GFX8-NEXT: v_mov_b32_e32 v15, s8
5250 ; GFX8-NEXT: s_add_u32 s2, s0, 32
5251 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[0:3]
5252 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
5253 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
5254 ; GFX8-NEXT: v_mov_b32_e32 v26, 0
5255 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
5256 ; GFX8-NEXT: s_add_u32 s2, s0, 16
5257 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[23:26]
5258 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
5259 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
5260 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 4, s14
5261 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v7
5262 ; GFX8-NEXT: v_and_b32_e32 v6, 0xffff, v6
5263 ; GFX8-NEXT: v_mov_b32_e32 v7, 0
5264 ; GFX8-NEXT: v_mov_b32_e32 v5, v1
5265 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
5266 ; GFX8-NEXT: v_and_b32_e32 v9, 1, v13
5267 ; GFX8-NEXT: v_and_b32_e32 v10, 0xffff, v10
5268 ; GFX8-NEXT: v_mov_b32_e32 v13, 0
5269 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[4:7]
5270 ; GFX8-NEXT: v_mov_b32_e32 v0, s11
5271 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
5272 ; GFX8-NEXT: v_mov_b32_e32 v2, v10
5273 ; GFX8-NEXT: v_mov_b32_e32 v3, v13
5274 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
5275 ; GFX8-NEXT: s_add_u32 s2, s0, 0xe0
5276 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
5277 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
5278 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
5279 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
5280 ; GFX8-NEXT: s_add_u32 s2, s0, 0xd0
5281 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
5282 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 1, s14
5283 ; GFX8-NEXT: v_and_b32_e32 v11, 0xffff, v12
5284 ; GFX8-NEXT: v_mov_b32_e32 v12, 0
5285 ; GFX8-NEXT: v_mov_b32_e32 v10, v1
5286 ; GFX8-NEXT: s_add_u32 s0, s0, 0xc0
5287 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 2, s14
5288 ; GFX8-NEXT: v_and_b32_e32 v14, 1, v14
5289 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[9:12]
5290 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
5291 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
5292 ; GFX8-NEXT: v_and_b32_e32 v14, 0xffff, v14
5293 ; GFX8-NEXT: v_mov_b32_e32 v17, 0
5294 ; GFX8-NEXT: v_and_b32_e32 v19, 1, v19
5295 ; GFX8-NEXT: v_and_b32_e32 v21, 0xffff, v18
5296 ; GFX8-NEXT: v_mov_b32_e32 v22, 0
5297 ; GFX8-NEXT: v_mov_b32_e32 v20, v1
5298 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
5299 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
5300 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[19:22]
5301 ; GFX8-NEXT: v_mov_b32_e32 v0, s10
5302 ; GFX8-NEXT: v_mov_b32_e32 v2, v14
5303 ; GFX8-NEXT: v_mov_b32_e32 v3, v17
5304 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
5305 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
5306 ; GFX8-NEXT: s_endpgm
5307 ;
5308 ; EG-LABEL: constant_zextload_v32i1_to_v32i64:
5309 ; EG: ; %bb.0:
5310 ; EG-NEXT: ALU 0, @24, KC0[CB0:0-32], KC1[]
5311 ; EG-NEXT: TEX 0 @22
5312 ; EG-NEXT: ALU 96, @25, KC0[CB0:0-32], KC1[]
5313 ; EG-NEXT: ALU 30, @122, KC0[CB0:0-32], KC1[]
5314 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T42.X, 0
5315 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T41.X, 0
5316 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T40.X, 0
5317 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T39.X, 0
5318 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T38.X, 0
5319 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T37.X, 0
5320 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T36.X, 0
5321 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T35.X, 0
5322 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T34.X, 0
5323 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T33.X, 0
5324 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T32.X, 0
5325 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T31.X, 0
5326 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T30.X, 0
5327 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T29.X, 0
5328 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T28.X, 0
5329 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T27.X, 1
5330 ; EG-NEXT: CF_END
5331 ; EG-NEXT: PAD
5332 ; EG-NEXT: Fetch clause starting at 22:
5333 ; EG-NEXT: VTX_READ_32 T11.X, T11.X, 0, #1
5334 ; EG-NEXT: ALU clause starting at 24:
5335 ; EG-NEXT: MOV * T11.X, KC0[2].Z,
5336 ; EG-NEXT: ALU clause starting at 25:
5337 ; EG-NEXT: LSHR * T12.Z, T11.X, literal.x,
5338 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
5339 ; EG-NEXT: BFE_UINT T12.X, T11.X, literal.x, 1,
5340 ; EG-NEXT: MOV T12.Y, 0.0,
5341 ; EG-NEXT: BFE_UINT * T13.Z, T11.X, literal.y, 1,
5342 ; EG-NEXT: 30(4.203895e-44), 29(4.063766e-44)
5343 ; EG-NEXT: BFE_UINT T13.X, T11.X, literal.x, 1,
5344 ; EG-NEXT: MOV T13.Y, 0.0,
5345 ; EG-NEXT: BFE_UINT * T14.Z, T11.X, literal.y, 1,
5346 ; EG-NEXT: 28(3.923636e-44), 27(3.783506e-44)
5347 ; EG-NEXT: BFE_UINT T14.X, T11.X, literal.x, 1,
5348 ; EG-NEXT: MOV T14.Y, 0.0,
5349 ; EG-NEXT: BFE_UINT * T15.Z, T11.X, literal.y, 1,
5350 ; EG-NEXT: 26(3.643376e-44), 25(3.503246e-44)
5351 ; EG-NEXT: BFE_UINT T15.X, T11.X, literal.x, 1,
5352 ; EG-NEXT: MOV T15.Y, 0.0,
5353 ; EG-NEXT: BFE_UINT * T16.Z, T11.X, literal.y, 1,
5354 ; EG-NEXT: 24(3.363116e-44), 23(3.222986e-44)
5355 ; EG-NEXT: BFE_UINT T16.X, T11.X, literal.x, 1,
5356 ; EG-NEXT: MOV T16.Y, 0.0,
5357 ; EG-NEXT: BFE_UINT * T17.Z, T11.X, literal.y, 1,
5358 ; EG-NEXT: 22(3.082857e-44), 21(2.942727e-44)
5359 ; EG-NEXT: BFE_UINT T17.X, T11.X, literal.x, 1,
5360 ; EG-NEXT: MOV T17.Y, 0.0,
5361 ; EG-NEXT: BFE_UINT * T18.Z, T11.X, literal.y, 1,
5362 ; EG-NEXT: 20(2.802597e-44), 19(2.662467e-44)
5363 ; EG-NEXT: BFE_UINT T18.X, T11.X, literal.x, 1,
5364 ; EG-NEXT: MOV T18.Y, 0.0,
5365 ; EG-NEXT: BFE_UINT * T19.Z, T11.X, literal.y, 1,
5366 ; EG-NEXT: 18(2.522337e-44), 17(2.382207e-44)
5367 ; EG-NEXT: BFE_UINT T19.X, T11.X, literal.x, 1,
5368 ; EG-NEXT: MOV T19.Y, 0.0,
5369 ; EG-NEXT: BFE_UINT * T20.Z, T11.X, literal.y, 1,
5370 ; EG-NEXT: 16(2.242078e-44), 15(2.101948e-44)
5371 ; EG-NEXT: BFE_UINT T20.X, T11.X, literal.x, 1,
5372 ; EG-NEXT: MOV T20.Y, 0.0,
5373 ; EG-NEXT: BFE_UINT * T21.Z, T11.X, literal.y, 1,
5374 ; EG-NEXT: 14(1.961818e-44), 13(1.821688e-44)
5375 ; EG-NEXT: BFE_UINT T21.X, T11.X, literal.x, 1,
5376 ; EG-NEXT: MOV T21.Y, 0.0,
5377 ; EG-NEXT: BFE_UINT * T22.Z, T11.X, literal.y, 1,
5378 ; EG-NEXT: 12(1.681558e-44), 11(1.541428e-44)
5379 ; EG-NEXT: BFE_UINT T22.X, T11.X, literal.x, 1,
5380 ; EG-NEXT: MOV T22.Y, 0.0,
5381 ; EG-NEXT: BFE_UINT * T23.Z, T11.X, literal.y, 1,
5382 ; EG-NEXT: 10(1.401298e-44), 9(1.261169e-44)
5383 ; EG-NEXT: BFE_UINT T23.X, T11.X, literal.x, 1,
5384 ; EG-NEXT: MOV T23.Y, 0.0,
5385 ; EG-NEXT: BFE_UINT * T24.Z, T11.X, literal.y, 1,
5386 ; EG-NEXT: 8(1.121039e-44), 7(9.809089e-45)
5387 ; EG-NEXT: BFE_UINT T24.X, T11.X, literal.x, 1,
5388 ; EG-NEXT: MOV T24.Y, 0.0,
5389 ; EG-NEXT: BFE_UINT * T25.Z, T11.X, literal.y, 1,
5390 ; EG-NEXT: 6(8.407791e-45), 5(7.006492e-45)
5391 ; EG-NEXT: BFE_UINT T25.X, T11.X, literal.x, 1,
5392 ; EG-NEXT: MOV T25.Y, 0.0,
5393 ; EG-NEXT: BFE_UINT * T26.Z, T11.X, literal.y, 1,
5394 ; EG-NEXT: 4(5.605194e-45), 3(4.203895e-45)
5395 ; EG-NEXT: BFE_UINT T26.X, T11.X, literal.x, 1,
5396 ; EG-NEXT: MOV T26.Y, 0.0,
5397 ; EG-NEXT: BFE_UINT T11.Z, T11.X, 1, 1,
5398 ; EG-NEXT: AND_INT * T11.X, T11.X, 1,
5399 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
5400 ; EG-NEXT: MOV T11.Y, 0.0,
5401 ; EG-NEXT: MOV T12.W, 0.0,
5402 ; EG-NEXT: MOV * T13.W, 0.0,
5403 ; EG-NEXT: MOV T14.W, 0.0,
5404 ; EG-NEXT: MOV * T15.W, 0.0,
5405 ; EG-NEXT: MOV T16.W, 0.0,
5406 ; EG-NEXT: MOV * T17.W, 0.0,
5407 ; EG-NEXT: MOV T18.W, 0.0,
5408 ; EG-NEXT: MOV * T19.W, 0.0,
5409 ; EG-NEXT: MOV T20.W, 0.0,
5410 ; EG-NEXT: MOV * T21.W, 0.0,
5411 ; EG-NEXT: MOV T22.W, 0.0,
5412 ; EG-NEXT: MOV * T23.W, 0.0,
5413 ; EG-NEXT: MOV T24.W, 0.0,
5414 ; EG-NEXT: MOV * T25.W, 0.0,
5415 ; EG-NEXT: MOV T26.W, 0.0,
5416 ; EG-NEXT: MOV * T11.W, 0.0,
5417 ; EG-NEXT: LSHR T27.X, KC0[2].Y, literal.x,
5418 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5419 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
5420 ; EG-NEXT: LSHR T28.X, PV.W, literal.x,
5421 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5422 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
5423 ; EG-NEXT: LSHR T29.X, PV.W, literal.x,
5424 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5425 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
5426 ; EG-NEXT: LSHR T30.X, PV.W, literal.x,
5427 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5428 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
5429 ; EG-NEXT: LSHR T31.X, PV.W, literal.x,
5430 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5431 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
5432 ; EG-NEXT: LSHR * T32.X, PV.W, literal.x,
5433 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
5434 ; EG-NEXT: ALU clause starting at 122:
5435 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
5436 ; EG-NEXT: 96(1.345247e-43), 0(0.000000e+00)
5437 ; EG-NEXT: LSHR T33.X, PV.W, literal.x,
5438 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5439 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
5440 ; EG-NEXT: LSHR T34.X, PV.W, literal.x,
5441 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5442 ; EG-NEXT: 2(2.802597e-45), 128(1.793662e-43)
5443 ; EG-NEXT: LSHR T35.X, PV.W, literal.x,
5444 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5445 ; EG-NEXT: 2(2.802597e-45), 144(2.017870e-43)
5446 ; EG-NEXT: LSHR T36.X, PV.W, literal.x,
5447 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5448 ; EG-NEXT: 2(2.802597e-45), 160(2.242078e-43)
5449 ; EG-NEXT: LSHR T37.X, PV.W, literal.x,
5450 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5451 ; EG-NEXT: 2(2.802597e-45), 176(2.466285e-43)
5452 ; EG-NEXT: LSHR T38.X, PV.W, literal.x,
5453 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5454 ; EG-NEXT: 2(2.802597e-45), 192(2.690493e-43)
5455 ; EG-NEXT: LSHR T39.X, PV.W, literal.x,
5456 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5457 ; EG-NEXT: 2(2.802597e-45), 208(2.914701e-43)
5458 ; EG-NEXT: LSHR T40.X, PV.W, literal.x,
5459 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5460 ; EG-NEXT: 2(2.802597e-45), 224(3.138909e-43)
5461 ; EG-NEXT: LSHR T41.X, PV.W, literal.x,
5462 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5463 ; EG-NEXT: 2(2.802597e-45), 240(3.363116e-43)
5464 ; EG-NEXT: LSHR * T42.X, PV.W, literal.x,
5465 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
5466 %load = load <32 x i1>, ptr addrspace(4) %in
5467 %ext = zext <32 x i1> %load to <32 x i64>
5468 store <32 x i64> %ext, ptr addrspace(1) %out
5469 ret void
5470 }
5472 define amdgpu_kernel void @constant_sextload_v32i1_to_v32i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
5473 ; GFX6-LABEL: constant_sextload_v32i1_to_v32i64:
5474 ; GFX6: ; %bb.0:
5475 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
5476 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
5477 ; GFX6-NEXT: s_load_dword s8, s[2:3], 0x0
5478 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
5479 ; GFX6-NEXT: s_mov_b32 s2, -1
5480 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
5481 ; GFX6-NEXT: s_lshr_b32 s52, s8, 30
5482 ; GFX6-NEXT: s_lshr_b32 s46, s8, 31
5483 ; GFX6-NEXT: s_lshr_b32 s48, s8, 28
5484 ; GFX6-NEXT: s_lshr_b32 s36, s8, 29
5485 ; GFX6-NEXT: s_lshr_b32 s38, s8, 26
5486 ; GFX6-NEXT: s_lshr_b32 s26, s8, 27
5487 ; GFX6-NEXT: s_lshr_b32 s28, s8, 24
5488 ; GFX6-NEXT: s_lshr_b32 s4, s8, 25
5489 ; GFX6-NEXT: s_lshr_b32 s6, s8, 22
5490 ; GFX6-NEXT: s_lshr_b32 s10, s8, 23
5491 ; GFX6-NEXT: s_lshr_b32 s12, s8, 20
5492 ; GFX6-NEXT: s_lshr_b32 s14, s8, 21
5493 ; GFX6-NEXT: s_lshr_b32 s16, s8, 18
5494 ; GFX6-NEXT: s_lshr_b32 s18, s8, 19
5495 ; GFX6-NEXT: s_lshr_b32 s20, s8, 16
5496 ; GFX6-NEXT: s_lshr_b32 s22, s8, 17
5497 ; GFX6-NEXT: s_lshr_b32 s24, s8, 14
5498 ; GFX6-NEXT: s_lshr_b32 s30, s8, 15
5499 ; GFX6-NEXT: s_lshr_b32 s34, s8, 12
5500 ; GFX6-NEXT: s_lshr_b32 s40, s8, 13
5501 ; GFX6-NEXT: s_lshr_b32 s42, s8, 10
5502 ; GFX6-NEXT: s_lshr_b32 s44, s8, 11
5503 ; GFX6-NEXT: s_bfe_i64 s[50:51], s[8:9], 0x10000
5504 ; GFX6-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000
5505 ; GFX6-NEXT: v_mov_b32_e32 v0, s50
5506 ; GFX6-NEXT: v_mov_b32_e32 v1, s51
5507 ; GFX6-NEXT: s_lshr_b32 s50, s8, 8
5508 ; GFX6-NEXT: v_mov_b32_e32 v2, s52
5509 ; GFX6-NEXT: v_mov_b32_e32 v3, s53
5510 ; GFX6-NEXT: s_lshr_b32 s52, s8, 9
5511 ; GFX6-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000
5512 ; GFX6-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000
5513 ; GFX6-NEXT: v_mov_b32_e32 v4, s46
5514 ; GFX6-NEXT: v_mov_b32_e32 v5, s47
5515 ; GFX6-NEXT: s_lshr_b32 s46, s8, 6
5516 ; GFX6-NEXT: v_mov_b32_e32 v6, s48
5517 ; GFX6-NEXT: v_mov_b32_e32 v7, s49
5518 ; GFX6-NEXT: s_lshr_b32 s48, s8, 7
5519 ; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000
5520 ; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000
5521 ; GFX6-NEXT: v_mov_b32_e32 v8, s36
5522 ; GFX6-NEXT: v_mov_b32_e32 v9, s37
5523 ; GFX6-NEXT: s_lshr_b32 s36, s8, 4
5524 ; GFX6-NEXT: v_mov_b32_e32 v10, s38
5525 ; GFX6-NEXT: v_mov_b32_e32 v11, s39
5526 ; GFX6-NEXT: s_lshr_b32 s38, s8, 5
5527 ; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
5528 ; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
5529 ; GFX6-NEXT: v_mov_b32_e32 v12, s26
5530 ; GFX6-NEXT: v_mov_b32_e32 v13, s27
5531 ; GFX6-NEXT: s_lshr_b32 s26, s8, 2
5532 ; GFX6-NEXT: v_mov_b32_e32 v14, s28
5533 ; GFX6-NEXT: v_mov_b32_e32 v15, s29
5534 ; GFX6-NEXT: s_lshr_b32 s28, s8, 3
5535 ; GFX6-NEXT: s_lshr_b32 s8, s8, 1
5536 ; GFX6-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
5537 ; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
5538 ; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
5539 ; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000
5540 ; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000
5541 ; GFX6-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000
5542 ; GFX6-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000
5543 ; GFX6-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000
5544 ; GFX6-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000
5545 ; GFX6-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000
5546 ; GFX6-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000
5547 ; GFX6-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000
5548 ; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000
5549 ; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
5550 ; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
5551 ; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
5552 ; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
5553 ; GFX6-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
5554 ; GFX6-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
5555 ; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
5556 ; GFX6-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
5557 ; GFX6-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
5558 ; GFX6-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
5559 ; GFX6-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
5560 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:240
5561 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:224
5562 ; GFX6-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:208
5563 ; GFX6-NEXT: v_mov_b32_e32 v16, s4
5564 ; GFX6-NEXT: v_mov_b32_e32 v17, s5
5565 ; GFX6-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:192
5566 ; GFX6-NEXT: s_waitcnt expcnt(3)
5567 ; GFX6-NEXT: v_mov_b32_e32 v2, s6
5568 ; GFX6-NEXT: v_mov_b32_e32 v3, s7
5569 ; GFX6-NEXT: v_mov_b32_e32 v4, s10
5570 ; GFX6-NEXT: v_mov_b32_e32 v5, s11
5571 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:176
5572 ; GFX6-NEXT: s_waitcnt expcnt(0)
5573 ; GFX6-NEXT: v_mov_b32_e32 v2, s12
5574 ; GFX6-NEXT: v_mov_b32_e32 v3, s13
5575 ; GFX6-NEXT: v_mov_b32_e32 v4, s14
5576 ; GFX6-NEXT: v_mov_b32_e32 v5, s15
5577 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:160
5578 ; GFX6-NEXT: s_waitcnt expcnt(0)
5579 ; GFX6-NEXT: v_mov_b32_e32 v2, s16
5580 ; GFX6-NEXT: v_mov_b32_e32 v3, s17
5581 ; GFX6-NEXT: v_mov_b32_e32 v4, s18
5582 ; GFX6-NEXT: v_mov_b32_e32 v5, s19
5583 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:144
5584 ; GFX6-NEXT: s_waitcnt expcnt(0)
5585 ; GFX6-NEXT: v_mov_b32_e32 v2, s20
5586 ; GFX6-NEXT: v_mov_b32_e32 v3, s21
5587 ; GFX6-NEXT: v_mov_b32_e32 v4, s22
5588 ; GFX6-NEXT: v_mov_b32_e32 v5, s23
5589 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:128
5590 ; GFX6-NEXT: s_waitcnt expcnt(0)
5591 ; GFX6-NEXT: v_mov_b32_e32 v2, s24
5592 ; GFX6-NEXT: v_mov_b32_e32 v3, s25
5593 ; GFX6-NEXT: v_mov_b32_e32 v4, s30
5594 ; GFX6-NEXT: v_mov_b32_e32 v5, s31
5595 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:112
5596 ; GFX6-NEXT: s_waitcnt expcnt(0)
5597 ; GFX6-NEXT: v_mov_b32_e32 v2, s34
5598 ; GFX6-NEXT: v_mov_b32_e32 v3, s35
5599 ; GFX6-NEXT: v_mov_b32_e32 v4, s40
5600 ; GFX6-NEXT: v_mov_b32_e32 v5, s41
5601 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:96
5602 ; GFX6-NEXT: s_waitcnt expcnt(0)
5603 ; GFX6-NEXT: v_mov_b32_e32 v2, s42
5604 ; GFX6-NEXT: v_mov_b32_e32 v3, s43
5605 ; GFX6-NEXT: v_mov_b32_e32 v4, s44
5606 ; GFX6-NEXT: v_mov_b32_e32 v5, s45
5607 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:80
5608 ; GFX6-NEXT: s_waitcnt expcnt(0)
5609 ; GFX6-NEXT: v_mov_b32_e32 v2, s50
5610 ; GFX6-NEXT: v_mov_b32_e32 v3, s51
5611 ; GFX6-NEXT: v_mov_b32_e32 v4, s52
5612 ; GFX6-NEXT: v_mov_b32_e32 v5, s53
5613 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:64
5614 ; GFX6-NEXT: s_waitcnt expcnt(0)
5615 ; GFX6-NEXT: v_mov_b32_e32 v2, s46
5616 ; GFX6-NEXT: v_mov_b32_e32 v3, s47
5617 ; GFX6-NEXT: v_mov_b32_e32 v4, s48
5618 ; GFX6-NEXT: v_mov_b32_e32 v5, s49
5619 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:48
5620 ; GFX6-NEXT: s_waitcnt expcnt(0)
5621 ; GFX6-NEXT: v_mov_b32_e32 v2, s36
5622 ; GFX6-NEXT: v_mov_b32_e32 v3, s37
5623 ; GFX6-NEXT: v_mov_b32_e32 v4, s38
5624 ; GFX6-NEXT: v_mov_b32_e32 v5, s39
5625 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:32
5626 ; GFX6-NEXT: s_waitcnt expcnt(0)
5627 ; GFX6-NEXT: v_mov_b32_e32 v2, s26
5628 ; GFX6-NEXT: v_mov_b32_e32 v3, s27
5629 ; GFX6-NEXT: v_mov_b32_e32 v4, s28
5630 ; GFX6-NEXT: v_mov_b32_e32 v5, s29
5631 ; GFX6-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 0 offset:16
5632 ; GFX6-NEXT: s_waitcnt expcnt(0)
5633 ; GFX6-NEXT: v_mov_b32_e32 v2, s8
5634 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
5635 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
5636 ; GFX6-NEXT: s_endpgm
5637 ;
5638 ; GFX8-LABEL: constant_sextload_v32i1_to_v32i64:
5639 ; GFX8: ; %bb.0:
5640 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
5641 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
5642 ; GFX8-NEXT: s_load_dword s8, s[2:3], 0x0
5643 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
5644 ; GFX8-NEXT: s_lshr_b32 s10, s8, 22
5645 ; GFX8-NEXT: s_lshr_b32 s12, s8, 23
5646 ; GFX8-NEXT: s_lshr_b32 s14, s8, 20
5647 ; GFX8-NEXT: s_lshr_b32 s16, s8, 21
5648 ; GFX8-NEXT: s_lshr_b32 s18, s8, 18
5649 ; GFX8-NEXT: s_lshr_b32 s20, s8, 19
5650 ; GFX8-NEXT: s_lshr_b32 s22, s8, 16
5651 ; GFX8-NEXT: s_lshr_b32 s24, s8, 17
5652 ; GFX8-NEXT: s_lshr_b32 s6, s8, 24
5653 ; GFX8-NEXT: s_bfe_i64 s[2:3], s[6:7], 0x10000
5654 ; GFX8-NEXT: s_bfe_i64 s[4:5], s[8:9], 0x10000
5655 ; GFX8-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
5656 ; GFX8-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
5657 ; GFX8-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
5658 ; GFX8-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
5659 ; GFX8-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
5660 ; GFX8-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
5661 ; GFX8-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
5662 ; GFX8-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
5663 ; GFX8-NEXT: v_mov_b32_e32 v11, s10
5664 ; GFX8-NEXT: s_add_u32 s10, s0, 0xb0
5665 ; GFX8-NEXT: v_mov_b32_e32 v12, s11
5666 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
5667 ; GFX8-NEXT: v_mov_b32_e32 v16, s11
5668 ; GFX8-NEXT: v_mov_b32_e32 v15, s10
5669 ; GFX8-NEXT: s_add_u32 s10, s0, 0xa0
5670 ; GFX8-NEXT: v_mov_b32_e32 v13, s12
5671 ; GFX8-NEXT: v_mov_b32_e32 v14, s13
5672 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
5673 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
5674 ; GFX8-NEXT: v_mov_b32_e32 v16, s11
5675 ; GFX8-NEXT: v_mov_b32_e32 v15, s10
5676 ; GFX8-NEXT: s_add_u32 s10, s0, 0x90
5677 ; GFX8-NEXT: v_mov_b32_e32 v11, s14
5678 ; GFX8-NEXT: v_mov_b32_e32 v12, s15
5679 ; GFX8-NEXT: v_mov_b32_e32 v13, s16
5680 ; GFX8-NEXT: v_mov_b32_e32 v14, s17
5681 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
5682 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
5683 ; GFX8-NEXT: v_mov_b32_e32 v16, s11
5684 ; GFX8-NEXT: v_mov_b32_e32 v15, s10
5685 ; GFX8-NEXT: s_add_u32 s10, s0, 0x80
5686 ; GFX8-NEXT: v_mov_b32_e32 v11, s18
5687 ; GFX8-NEXT: v_mov_b32_e32 v12, s19
5688 ; GFX8-NEXT: v_mov_b32_e32 v13, s20
5689 ; GFX8-NEXT: v_mov_b32_e32 v14, s21
5690 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
5691 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
5692 ; GFX8-NEXT: v_mov_b32_e32 v16, s11
5693 ; GFX8-NEXT: v_mov_b32_e32 v15, s10
5694 ; GFX8-NEXT: s_add_u32 s10, s0, 0x70
5695 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 14, s8
5696 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 15, s8
5697 ; GFX8-NEXT: v_mov_b32_e32 v11, s22
5698 ; GFX8-NEXT: v_mov_b32_e32 v12, s23
5699 ; GFX8-NEXT: v_mov_b32_e32 v13, s24
5700 ; GFX8-NEXT: v_mov_b32_e32 v14, s25
5701 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
5702 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 12, s8
5703 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 13, s8
5704 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 10, s8
5705 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 11, s8
5706 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 8, s8
5707 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 9, s8
5708 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 6, s8
5709 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 7, s8
5710 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 4, s8
5711 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
5712 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 5, s8
5713 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 2, s8
5714 ; GFX8-NEXT: v_bfe_i32 v11, v10, 0, 1
5715 ; GFX8-NEXT: v_bfe_i32 v9, v9, 0, 1
5716 ; GFX8-NEXT: v_mov_b32_e32 v14, s11
5717 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 3, s8
5718 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 1, s8
5719 ; GFX8-NEXT: s_add_u32 s8, s0, 0x60
5720 ; GFX8-NEXT: v_ashrrev_i32_e32 v12, 31, v11
5721 ; GFX8-NEXT: v_ashrrev_i32_e32 v10, 31, v9
5722 ; GFX8-NEXT: v_mov_b32_e32 v13, s10
5723 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
5724 ; GFX8-NEXT: flat_store_dwordx4 v[13:14], v[9:12]
5725 ; GFX8-NEXT: v_bfe_i32 v7, v7, 0, 1
5726 ; GFX8-NEXT: v_mov_b32_e32 v12, s9
5727 ; GFX8-NEXT: v_bfe_i32 v9, v8, 0, 1
5728 ; GFX8-NEXT: v_mov_b32_e32 v11, s8
5729 ; GFX8-NEXT: s_add_u32 s8, s0, 0x50
5730 ; GFX8-NEXT: v_ashrrev_i32_e32 v10, 31, v9
5731 ; GFX8-NEXT: v_ashrrev_i32_e32 v8, 31, v7
5732 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
5733 ; GFX8-NEXT: flat_store_dwordx4 v[11:12], v[7:10]
5734 ; GFX8-NEXT: v_bfe_i32 v5, v5, 0, 1
5735 ; GFX8-NEXT: v_mov_b32_e32 v10, s9
5736 ; GFX8-NEXT: v_bfe_i32 v7, v6, 0, 1
5737 ; GFX8-NEXT: v_mov_b32_e32 v9, s8
5738 ; GFX8-NEXT: s_add_u32 s8, s0, 64
5739 ; GFX8-NEXT: v_ashrrev_i32_e32 v8, 31, v7
5740 ; GFX8-NEXT: v_ashrrev_i32_e32 v6, 31, v5
5741 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
5742 ; GFX8-NEXT: flat_store_dwordx4 v[9:10], v[5:8]
5743 ; GFX8-NEXT: v_mov_b32_e32 v11, s9
5744 ; GFX8-NEXT: v_bfe_i32 v5, v4, 0, 1
5745 ; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 1
5746 ; GFX8-NEXT: v_mov_b32_e32 v10, s8
5747 ; GFX8-NEXT: s_add_u32 s8, s0, 48
5748 ; GFX8-NEXT: v_ashrrev_i32_e32 v6, 31, v5
5749 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
5750 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
5751 ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[3:6]
5752 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 1
5753 ; GFX8-NEXT: v_bfe_i32 v3, v2, 0, 1
5754 ; GFX8-NEXT: v_mov_b32_e32 v11, s9
5755 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
5756 ; GFX8-NEXT: v_ashrrev_i32_e32 v2, 31, v1
5757 ; GFX8-NEXT: v_mov_b32_e32 v10, s8
5758 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 6, s6
5759 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 7, s6
5760 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 4, s6
5761 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 5, s6
5762 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 2, s6
5763 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 3, s6
5764 ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[1:4]
5765 ; GFX8-NEXT: v_bfe_i32 v18, v16, 0, 1
5766 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 1, s6
5767 ; GFX8-NEXT: s_add_u32 s6, s0, 32
5768 ; GFX8-NEXT: v_bfe_i32 v2, v1, 0, 1
5769 ; GFX8-NEXT: v_bfe_i32 v16, v0, 0, 1
5770 ; GFX8-NEXT: s_addc_u32 s7, s1, 0
5771 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
5772 ; GFX8-NEXT: v_ashrrev_i32_e32 v19, 31, v18
5773 ; GFX8-NEXT: v_ashrrev_i32_e32 v17, 31, v16
5774 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
5775 ; GFX8-NEXT: s_add_u32 s6, s0, 16
5776 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
5777 ; GFX8-NEXT: v_bfe_i32 v20, v20, 0, 1
5778 ; GFX8-NEXT: v_bfe_i32 v18, v22, 0, 1
5779 ; GFX8-NEXT: v_bfe_i32 v22, v21, 0, 1
5780 ; GFX8-NEXT: s_addc_u32 s7, s1, 0
5781 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
5782 ; GFX8-NEXT: v_ashrrev_i32_e32 v23, 31, v22
5783 ; GFX8-NEXT: v_ashrrev_i32_e32 v21, 31, v20
5784 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
5785 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[20:23]
5786 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
5787 ; GFX8-NEXT: v_ashrrev_i32_e32 v19, 31, v18
5788 ; GFX8-NEXT: v_mov_b32_e32 v16, s4
5789 ; GFX8-NEXT: v_mov_b32_e32 v17, s5
5790 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
5791 ; GFX8-NEXT: s_add_u32 s4, s0, 0xf0
5792 ; GFX8-NEXT: v_bfe_i32 v14, v13, 0, 1
5793 ; GFX8-NEXT: v_bfe_i32 v12, v12, 0, 1
5794 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
5795 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
5796 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
5797 ; GFX8-NEXT: v_ashrrev_i32_e32 v15, 31, v14
5798 ; GFX8-NEXT: v_ashrrev_i32_e32 v13, 31, v12
5799 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
5800 ; GFX8-NEXT: s_add_u32 s4, s0, 0xe0
5801 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[12:15]
5802 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
5803 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
5804 ; GFX8-NEXT: v_bfe_i32 v10, v9, 0, 1
5805 ; GFX8-NEXT: v_bfe_i32 v8, v8, 0, 1
5806 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
5807 ; GFX8-NEXT: s_add_u32 s4, s0, 0xd0
5808 ; GFX8-NEXT: v_ashrrev_i32_e32 v11, 31, v10
5809 ; GFX8-NEXT: v_ashrrev_i32_e32 v9, 31, v8
5810 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
5811 ; GFX8-NEXT: v_bfe_i32 v6, v6, 0, 1
5812 ; GFX8-NEXT: v_bfe_i32 v4, v5, 0, 1
5813 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
5814 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
5815 ; GFX8-NEXT: s_add_u32 s0, s0, 0xc0
5816 ; GFX8-NEXT: v_ashrrev_i32_e32 v7, 31, v6
5817 ; GFX8-NEXT: v_ashrrev_i32_e32 v5, 31, v4
5818 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
5819 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
5820 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
5821 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
5822 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
5823 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
5824 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
5825 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
5826 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
5827 ; GFX8-NEXT: s_endpgm
5828 ;
5829 ; EG-LABEL: constant_sextload_v32i1_to_v32i64:
5830 ; EG: ; %bb.0:
5831 ; EG-NEXT: ALU 0, @24, KC0[CB0:0-32], KC1[]
5832 ; EG-NEXT: TEX 0 @22
5833 ; EG-NEXT: ALU 92, @25, KC0[CB0:0-32], KC1[]
5834 ; EG-NEXT: ALU 65, @118, KC0[CB0:0-32], KC1[]
5835 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T42.X, 0
5836 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T40.XYZW, T41.X, 0
5837 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T27.XYZW, T34.X, 0
5838 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T39.XYZW, T24.X, 0
5839 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T28.XYZW, T23.X, 0
5840 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T22.X, 0
5841 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T29.XYZW, T21.X, 0
5842 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T37.XYZW, T20.X, 0
5843 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T30.XYZW, T19.X, 0
5844 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T18.X, 0
5845 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T31.XYZW, T17.X, 0
5846 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T16.X, 0
5847 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T32.XYZW, T15.X, 0
5848 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T35.XYZW, T14.X, 0
5849 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T33.XYZW, T13.X, 0
5850 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T12.X, 1
5851 ; EG-NEXT: CF_END
5852 ; EG-NEXT: PAD
5853 ; EG-NEXT: Fetch clause starting at 22:
5854 ; EG-NEXT: VTX_READ_32 T11.X, T11.X, 0, #1
5855 ; EG-NEXT: ALU clause starting at 24:
5856 ; EG-NEXT: MOV * T11.X, KC0[2].Z,
5857 ; EG-NEXT: ALU clause starting at 25:
5858 ; EG-NEXT: LSHR T12.X, KC0[2].Y, literal.x,
5859 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5860 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
5861 ; EG-NEXT: LSHR T13.X, PV.W, literal.x,
5862 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5863 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
5864 ; EG-NEXT: LSHR T14.X, PV.W, literal.x,
5865 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5866 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
5867 ; EG-NEXT: LSHR T15.X, PV.W, literal.x,
5868 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5869 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
5870 ; EG-NEXT: LSHR T16.X, PV.W, literal.x,
5871 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5872 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
5873 ; EG-NEXT: LSHR T17.X, PV.W, literal.x,
5874 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5875 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
5876 ; EG-NEXT: LSHR T18.X, PV.W, literal.x,
5877 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5878 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
5879 ; EG-NEXT: LSHR T19.X, PV.W, literal.x,
5880 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5881 ; EG-NEXT: 2(2.802597e-45), 128(1.793662e-43)
5882 ; EG-NEXT: LSHR T20.X, PV.W, literal.x,
5883 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5884 ; EG-NEXT: 2(2.802597e-45), 144(2.017870e-43)
5885 ; EG-NEXT: LSHR T21.X, PV.W, literal.x,
5886 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5887 ; EG-NEXT: 2(2.802597e-45), 160(2.242078e-43)
5888 ; EG-NEXT: LSHR T22.X, PV.W, literal.x,
5889 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
5890 ; EG-NEXT: 2(2.802597e-45), 176(2.466285e-43)
5891 ; EG-NEXT: LSHR T23.X, PV.W, literal.x,
5892 ; EG-NEXT: LSHR T0.Y, T11.X, literal.y,
5893 ; EG-NEXT: LSHR T0.Z, T11.X, literal.z,
5894 ; EG-NEXT: LSHR * T0.W, T11.X, literal.w,
5895 ; EG-NEXT: 2(2.802597e-45), 28(3.923636e-44)
5896 ; EG-NEXT: 29(4.063766e-44), 24(3.363116e-44)
5897 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.x,
5898 ; EG-NEXT: 192(2.690493e-43), 0(0.000000e+00)
5899 ; EG-NEXT: LSHR T24.X, PV.W, literal.x,
5900 ; EG-NEXT: LSHR T1.Y, T11.X, literal.y,
5901 ; EG-NEXT: LSHR T1.Z, T11.X, literal.z,
5902 ; EG-NEXT: LSHR * T1.W, T11.X, literal.w,
5903 ; EG-NEXT: 2(2.802597e-45), 25(3.503246e-44)
5904 ; EG-NEXT: 20(2.802597e-44), 21(2.942727e-44)
5905 ; EG-NEXT: LSHR * T2.W, T11.X, literal.x,
5906 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
5907 ; EG-NEXT: BFE_INT T25.X, T11.X, 0.0, 1,
5908 ; EG-NEXT: LSHR T2.Y, T11.X, literal.x,
5909 ; EG-NEXT: ASHR T26.Z, T11.X, literal.y,
5910 ; EG-NEXT: LSHR T3.W, T11.X, literal.z,
5911 ; EG-NEXT: LSHR * T4.W, T11.X, literal.w,
5912 ; EG-NEXT: 17(2.382207e-44), 31(4.344025e-44)
5913 ; EG-NEXT: 27(3.783506e-44), 30(4.203895e-44)
5914 ; EG-NEXT: BFE_INT T26.X, PS, 0.0, 1,
5915 ; EG-NEXT: LSHR T3.Y, T11.X, literal.x,
5916 ; EG-NEXT: BFE_INT T27.Z, PV.W, 0.0, 1,
5917 ; EG-NEXT: LSHR T3.W, T11.X, literal.y,
5918 ; EG-NEXT: LSHR * T4.W, T11.X, literal.z,
5919 ; EG-NEXT: 12(1.681558e-44), 23(3.222986e-44)
5920 ; EG-NEXT: 26(3.643376e-44), 0(0.000000e+00)
5921 ; EG-NEXT: BFE_INT T27.X, PS, 0.0, 1,
5922 ; EG-NEXT: MOV T26.Y, PV.X,
5923 ; EG-NEXT: BFE_INT T28.Z, PV.W, 0.0, 1,
5924 ; EG-NEXT: LSHR T3.W, T11.X, literal.x,
5925 ; EG-NEXT: LSHR * T4.W, T11.X, literal.y,
5926 ; EG-NEXT: 19(2.662467e-44), 22(3.082857e-44)
5927 ; EG-NEXT: BFE_INT T28.X, PS, 0.0, 1,
5928 ; EG-NEXT: MOV T27.Y, PV.X,
5929 ; EG-NEXT: BFE_INT T29.Z, PV.W, 0.0, 1,
5930 ; EG-NEXT: LSHR T3.W, T11.X, literal.x,
5931 ; EG-NEXT: LSHR * T4.W, T11.X, literal.y,
5932 ; EG-NEXT: 15(2.101948e-44), 18(2.522337e-44)
5933 ; EG-NEXT: BFE_INT T29.X, PS, 0.0, 1,
5934 ; EG-NEXT: MOV T28.Y, PV.X,
5935 ; EG-NEXT: BFE_INT T30.Z, PV.W, 0.0, 1,
5936 ; EG-NEXT: LSHR T3.W, T11.X, literal.x,
5937 ; EG-NEXT: LSHR * T4.W, T11.X, literal.y,
5938 ; EG-NEXT: 11(1.541428e-44), 14(1.961818e-44)
5939 ; EG-NEXT: BFE_INT T30.X, PS, 0.0, 1,
5940 ; EG-NEXT: MOV T29.Y, PV.X,
5941 ; EG-NEXT: BFE_INT T31.Z, PV.W, 0.0, 1,
5942 ; EG-NEXT: LSHR T3.W, T11.X, literal.x,
5943 ; EG-NEXT: LSHR * T4.W, T11.X, literal.y,
5944 ; EG-NEXT: 7(9.809089e-45), 10(1.401298e-44)
5945 ; EG-NEXT: BFE_INT T31.X, PS, 0.0, 1,
5946 ; EG-NEXT: MOV T30.Y, PV.X,
5947 ; EG-NEXT: BFE_INT T32.Z, PV.W, 0.0, 1,
5948 ; EG-NEXT: LSHR T3.W, T11.X, literal.x,
5949 ; EG-NEXT: LSHR * T4.W, T11.X, literal.y,
5950 ; EG-NEXT: 3(4.203895e-45), 6(8.407791e-45)
5951 ; EG-NEXT: ALU clause starting at 118:
5952 ; EG-NEXT: BFE_INT T32.X, T4.W, 0.0, 1,
5953 ; EG-NEXT: MOV T31.Y, T31.X,
5954 ; EG-NEXT: BFE_INT T33.Z, T3.W, 0.0, 1, BS:VEC_120/SCL_212
5955 ; EG-NEXT: LSHR T3.W, T11.X, 1, BS:VEC_120/SCL_212
5956 ; EG-NEXT: LSHR * T4.W, T11.X, literal.x,
5957 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
5958 ; EG-NEXT: BFE_INT T33.X, PS, 0.0, 1,
5959 ; EG-NEXT: MOV T32.Y, PV.X,
5960 ; EG-NEXT: BFE_INT T25.Z, PV.W, 0.0, 1,
5961 ; EG-NEXT: LSHR T3.W, T11.X, literal.x,
5962 ; EG-NEXT: ADD_INT * T4.W, KC0[2].Y, literal.y,
5963 ; EG-NEXT: 5(7.006492e-45), 208(2.914701e-43)
5964 ; EG-NEXT: LSHR T34.X, PS, literal.x,
5965 ; EG-NEXT: MOV T33.Y, PV.X,
5966 ; EG-NEXT: BFE_INT T35.Z, PV.W, 0.0, 1,
5967 ; EG-NEXT: LSHR T3.W, T11.X, literal.y,
5968 ; EG-NEXT: LSHR * T4.W, T11.X, literal.z,
5969 ; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)
5970 ; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)
5971 ; EG-NEXT: BFE_INT T35.X, PS, 0.0, 1,
5972 ; EG-NEXT: MOV T25.Y, T25.X,
5973 ; EG-NEXT: BFE_INT T11.Z, PV.W, 0.0, 1,
5974 ; EG-NEXT: LSHR T3.W, T11.X, literal.x, BS:VEC_120/SCL_212
5975 ; EG-NEXT: LSHR * T4.W, T11.X, literal.y,
5976 ; EG-NEXT: 13(1.821688e-44), 8(1.121039e-44)
5977 ; EG-NEXT: BFE_INT T11.X, PS, 0.0, 1,
5978 ; EG-NEXT: MOV T35.Y, PV.X,
5979 ; EG-NEXT: BFE_INT T36.Z, PV.W, 0.0, 1,
5980 ; EG-NEXT: MOV T25.W, T25.Z,
5981 ; EG-NEXT: MOV * T33.W, T33.Z,
5982 ; EG-NEXT: BFE_INT T36.X, T3.Y, 0.0, 1,
5983 ; EG-NEXT: MOV T11.Y, PV.X,
5984 ; EG-NEXT: BFE_INT T37.Z, T2.Y, 0.0, 1, BS:VEC_120/SCL_212
5985 ; EG-NEXT: MOV T35.W, T35.Z,
5986 ; EG-NEXT: MOV * T32.W, T32.Z,
5987 ; EG-NEXT: BFE_INT T37.X, T2.W, 0.0, 1,
5988 ; EG-NEXT: MOV T36.Y, PV.X,
5989 ; EG-NEXT: BFE_INT T38.Z, T1.W, 0.0, 1, BS:VEC_120/SCL_212
5990 ; EG-NEXT: MOV T11.W, T11.Z,
5991 ; EG-NEXT: MOV * T31.W, T31.Z,
5992 ; EG-NEXT: BFE_INT T38.X, T1.Z, 0.0, 1,
5993 ; EG-NEXT: MOV T37.Y, PV.X,
5994 ; EG-NEXT: BFE_INT T39.Z, T1.Y, 0.0, 1,
5995 ; EG-NEXT: MOV T36.W, T36.Z, BS:VEC_120/SCL_212
5996 ; EG-NEXT: MOV * T30.W, T30.Z,
5997 ; EG-NEXT: BFE_INT T39.X, T0.W, 0.0, 1,
5998 ; EG-NEXT: MOV T38.Y, PV.X,
5999 ; EG-NEXT: BFE_INT T40.Z, T0.Z, 0.0, 1,
6000 ; EG-NEXT: MOV T37.W, T37.Z, BS:VEC_120/SCL_212
6001 ; EG-NEXT: MOV * T29.W, T29.Z,
6002 ; EG-NEXT: BFE_INT T40.X, T0.Y, 0.0, 1,
6003 ; EG-NEXT: MOV T39.Y, PV.X,
6004 ; EG-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.x,
6005 ; EG-NEXT: MOV T38.W, T38.Z,
6006 ; EG-NEXT: MOV * T28.W, T28.Z,
6007 ; EG-NEXT: 224(3.138909e-43), 0(0.000000e+00)
6008 ; EG-NEXT: LSHR T41.X, PV.Z, literal.x,
6009 ; EG-NEXT: MOV T40.Y, PV.X,
6010 ; EG-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.y,
6011 ; EG-NEXT: MOV T39.W, T39.Z,
6012 ; EG-NEXT: MOV * T27.W, T27.Z,
6013 ; EG-NEXT: 2(2.802597e-45), 240(3.363116e-43)
6014 ; EG-NEXT: LSHR T42.X, PV.Z, literal.x,
6015 ; EG-NEXT: MOV T40.W, T40.Z,
6016 ; EG-NEXT: MOV * T26.W, T26.Z,
6017 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
6018 %load = load <32 x i1>, ptr addrspace(4) %in
6019 %ext = sext <32 x i1> %load to <32 x i64>
6020 store <32 x i64> %ext, ptr addrspace(1) %out
6021 ret void
6022 }
6024 define amdgpu_kernel void @constant_zextload_v64i1_to_v64i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
6025 ; GFX6-LABEL: constant_zextload_v64i1_to_v64i64:
6026 ; GFX6: ; %bb.0:
6027 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
6028 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
6029 ; GFX6-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
6030 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
6031 ; GFX6-NEXT: s_bfe_u32 s4, s2, 0x10003
6032 ; GFX6-NEXT: s_bfe_u32 s5, s2, 0x10005
6033 ; GFX6-NEXT: s_bfe_u32 s8, s2, 0x10007
6034 ; GFX6-NEXT: s_bfe_u32 s11, s2, 0x10009
6035 ; GFX6-NEXT: s_bfe_u32 s13, s2, 0x1000b
6036 ; GFX6-NEXT: s_bfe_u32 s15, s2, 0x1000d
6037 ; GFX6-NEXT: s_bfe_u32 s17, s2, 0x1000f
6038 ; GFX6-NEXT: s_bfe_u32 s19, s2, 0x10011
6039 ; GFX6-NEXT: s_bfe_u32 s21, s2, 0x10013
6040 ; GFX6-NEXT: s_bfe_u32 s23, s2, 0x10015
6041 ; GFX6-NEXT: s_bfe_u32 s25, s2, 0x10017
6042 ; GFX6-NEXT: s_bfe_u32 s27, s2, 0x10019
6043 ; GFX6-NEXT: s_bfe_u32 s29, s2, 0x1001b
6044 ; GFX6-NEXT: s_bfe_u32 s31, s2, 0x1001d
6045 ; GFX6-NEXT: s_lshr_b32 s34, s2, 31
6046 ; GFX6-NEXT: s_bfe_u32 s36, s3, 0x10003
6047 ; GFX6-NEXT: s_bfe_u32 s37, s3, 0x10005
6048 ; GFX6-NEXT: s_bfe_u32 s38, s3, 0x10007
6049 ; GFX6-NEXT: s_bfe_u32 s39, s3, 0x10009
6050 ; GFX6-NEXT: s_bfe_u32 s40, s3, 0x1000b
6051 ; GFX6-NEXT: s_bfe_u32 s41, s3, 0x1000d
6052 ; GFX6-NEXT: s_bfe_u32 s42, s3, 0x1000f
6053 ; GFX6-NEXT: s_bfe_u32 s43, s3, 0x10011
6054 ; GFX6-NEXT: s_bfe_u32 s44, s3, 0x10013
6055 ; GFX6-NEXT: s_bfe_u32 s45, s3, 0x10015
6056 ; GFX6-NEXT: s_bfe_u32 s46, s3, 0x10017
6057 ; GFX6-NEXT: s_bfe_u32 s47, s3, 0x10019
6058 ; GFX6-NEXT: s_bfe_u32 s48, s3, 0x1001b
6059 ; GFX6-NEXT: s_bfe_u32 s49, s3, 0x1001d
6060 ; GFX6-NEXT: s_lshr_b32 s50, s3, 31
6061 ; GFX6-NEXT: s_bfe_u32 s9, s3, 0x10001
6062 ; GFX6-NEXT: s_bfe_u32 s6, s2, 0x10001
6063 ; GFX6-NEXT: s_and_b32 s7, s2, 1
6064 ; GFX6-NEXT: s_and_b32 s10, s3, 1
6065 ; GFX6-NEXT: s_bfe_u32 s12, s2, 0x10002
6066 ; GFX6-NEXT: s_bfe_u32 s14, s2, 0x10004
6067 ; GFX6-NEXT: s_bfe_u32 s16, s2, 0x10006
6068 ; GFX6-NEXT: s_bfe_u32 s18, s2, 0x10008
6069 ; GFX6-NEXT: s_bfe_u32 s20, s2, 0x1000a
6070 ; GFX6-NEXT: s_bfe_u32 s22, s2, 0x1000c
6071 ; GFX6-NEXT: s_bfe_u32 s24, s2, 0x1000e
6072 ; GFX6-NEXT: s_bfe_u32 s26, s2, 0x10010
6073 ; GFX6-NEXT: s_bfe_u32 s28, s2, 0x10012
6074 ; GFX6-NEXT: s_bfe_u32 s30, s2, 0x10014
6075 ; GFX6-NEXT: s_bfe_u32 s33, s2, 0x10016
6076 ; GFX6-NEXT: s_bfe_u32 s35, s2, 0x10018
6077 ; GFX6-NEXT: s_bfe_u32 s51, s2, 0x1001a
6078 ; GFX6-NEXT: s_bfe_u32 s52, s2, 0x1001c
6079 ; GFX6-NEXT: s_bfe_u32 s53, s2, 0x1001e
6080 ; GFX6-NEXT: s_bfe_u32 s54, s3, 0x10002
6081 ; GFX6-NEXT: s_bfe_u32 s55, s3, 0x10004
6082 ; GFX6-NEXT: s_bfe_u32 s56, s3, 0x10006
6083 ; GFX6-NEXT: s_bfe_u32 s57, s3, 0x10008
6084 ; GFX6-NEXT: s_bfe_u32 s58, s3, 0x1000a
6085 ; GFX6-NEXT: s_bfe_u32 s59, s3, 0x1000c
6086 ; GFX6-NEXT: s_bfe_u32 s60, s3, 0x1000e
6087 ; GFX6-NEXT: s_bfe_u32 s61, s3, 0x10010
6088 ; GFX6-NEXT: s_bfe_u32 s62, s3, 0x10012
6089 ; GFX6-NEXT: s_bfe_u32 s63, s3, 0x10014
6090 ; GFX6-NEXT: s_bfe_u32 s64, s3, 0x10016
6091 ; GFX6-NEXT: s_bfe_u32 s65, s3, 0x10018
6092 ; GFX6-NEXT: s_bfe_u32 s66, s3, 0x1001a
6093 ; GFX6-NEXT: s_bfe_u32 s67, s3, 0x1001e
6094 ; GFX6-NEXT: s_bfe_u32 s68, s3, 0x1001c
6095 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
6096 ; GFX6-NEXT: v_mov_b32_e32 v1, 0
6097 ; GFX6-NEXT: s_mov_b32 s2, -1
6098 ; GFX6-NEXT: v_mov_b32_e32 v3, v1
6099 ; GFX6-NEXT: v_mov_b32_e32 v0, s67
6100 ; GFX6-NEXT: v_mov_b32_e32 v2, s50
6101 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:496
6102 ; GFX6-NEXT: s_waitcnt expcnt(0)
6103 ; GFX6-NEXT: v_mov_b32_e32 v0, s68
6104 ; GFX6-NEXT: v_mov_b32_e32 v2, s49
6105 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:480
6106 ; GFX6-NEXT: s_waitcnt expcnt(0)
6107 ; GFX6-NEXT: v_mov_b32_e32 v0, s66
6108 ; GFX6-NEXT: v_mov_b32_e32 v2, s48
6109 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:464
6110 ; GFX6-NEXT: s_waitcnt expcnt(0)
6111 ; GFX6-NEXT: v_mov_b32_e32 v0, s65
6112 ; GFX6-NEXT: v_mov_b32_e32 v2, s47
6113 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:448
6114 ; GFX6-NEXT: s_waitcnt expcnt(0)
6115 ; GFX6-NEXT: v_mov_b32_e32 v0, s64
6116 ; GFX6-NEXT: v_mov_b32_e32 v2, s46
6117 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:432
6118 ; GFX6-NEXT: s_waitcnt expcnt(0)
6119 ; GFX6-NEXT: v_mov_b32_e32 v0, s63
6120 ; GFX6-NEXT: v_mov_b32_e32 v2, s45
6121 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:416
6122 ; GFX6-NEXT: s_waitcnt expcnt(0)
6123 ; GFX6-NEXT: v_mov_b32_e32 v0, s62
6124 ; GFX6-NEXT: v_mov_b32_e32 v2, s44
6125 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:400
6126 ; GFX6-NEXT: s_waitcnt expcnt(0)
6127 ; GFX6-NEXT: v_mov_b32_e32 v0, s61
6128 ; GFX6-NEXT: v_mov_b32_e32 v2, s43
6129 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:384
6130 ; GFX6-NEXT: s_waitcnt expcnt(0)
6131 ; GFX6-NEXT: v_mov_b32_e32 v0, s60
6132 ; GFX6-NEXT: v_mov_b32_e32 v2, s42
6133 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:368
6134 ; GFX6-NEXT: s_waitcnt expcnt(0)
6135 ; GFX6-NEXT: v_mov_b32_e32 v0, s59
6136 ; GFX6-NEXT: v_mov_b32_e32 v2, s41
6137 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:352
6138 ; GFX6-NEXT: s_waitcnt expcnt(0)
6139 ; GFX6-NEXT: v_mov_b32_e32 v0, s58
6140 ; GFX6-NEXT: v_mov_b32_e32 v2, s40
6141 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:336
6142 ; GFX6-NEXT: s_waitcnt expcnt(0)
6143 ; GFX6-NEXT: v_mov_b32_e32 v0, s57
6144 ; GFX6-NEXT: v_mov_b32_e32 v2, s39
6145 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:320
6146 ; GFX6-NEXT: s_waitcnt expcnt(0)
6147 ; GFX6-NEXT: v_mov_b32_e32 v0, s56
6148 ; GFX6-NEXT: v_mov_b32_e32 v2, s38
6149 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:304
6150 ; GFX6-NEXT: s_waitcnt expcnt(0)
6151 ; GFX6-NEXT: v_mov_b32_e32 v0, s55
6152 ; GFX6-NEXT: v_mov_b32_e32 v2, s37
6153 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:288
6154 ; GFX6-NEXT: s_waitcnt expcnt(0)
6155 ; GFX6-NEXT: v_mov_b32_e32 v0, s54
6156 ; GFX6-NEXT: v_mov_b32_e32 v2, s36
6157 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:272
6158 ; GFX6-NEXT: s_waitcnt expcnt(0)
6159 ; GFX6-NEXT: v_mov_b32_e32 v0, s53
6160 ; GFX6-NEXT: v_mov_b32_e32 v2, s34
6161 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
6162 ; GFX6-NEXT: s_waitcnt expcnt(0)
6163 ; GFX6-NEXT: v_mov_b32_e32 v0, s52
6164 ; GFX6-NEXT: v_mov_b32_e32 v2, s31
6165 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
6166 ; GFX6-NEXT: s_waitcnt expcnt(0)
6167 ; GFX6-NEXT: v_mov_b32_e32 v0, s51
6168 ; GFX6-NEXT: v_mov_b32_e32 v2, s29
6169 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:208
6170 ; GFX6-NEXT: s_waitcnt expcnt(0)
6171 ; GFX6-NEXT: v_mov_b32_e32 v0, s35
6172 ; GFX6-NEXT: v_mov_b32_e32 v2, s27
6173 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192
6174 ; GFX6-NEXT: s_waitcnt expcnt(0)
6175 ; GFX6-NEXT: v_mov_b32_e32 v0, s33
6176 ; GFX6-NEXT: v_mov_b32_e32 v2, s25
6177 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
6178 ; GFX6-NEXT: s_waitcnt expcnt(0)
6179 ; GFX6-NEXT: v_mov_b32_e32 v0, s30
6180 ; GFX6-NEXT: v_mov_b32_e32 v2, s23
6181 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
6182 ; GFX6-NEXT: s_waitcnt expcnt(0)
6183 ; GFX6-NEXT: v_mov_b32_e32 v0, s28
6184 ; GFX6-NEXT: v_mov_b32_e32 v2, s21
6185 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
6186 ; GFX6-NEXT: s_waitcnt expcnt(0)
6187 ; GFX6-NEXT: v_mov_b32_e32 v0, s26
6188 ; GFX6-NEXT: v_mov_b32_e32 v2, s19
6189 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
6190 ; GFX6-NEXT: s_waitcnt expcnt(0)
6191 ; GFX6-NEXT: v_mov_b32_e32 v0, s24
6192 ; GFX6-NEXT: v_mov_b32_e32 v2, s17
6193 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
6194 ; GFX6-NEXT: s_waitcnt expcnt(0)
6195 ; GFX6-NEXT: v_mov_b32_e32 v0, s22
6196 ; GFX6-NEXT: v_mov_b32_e32 v2, s15
6197 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
6198 ; GFX6-NEXT: s_waitcnt expcnt(0)
6199 ; GFX6-NEXT: v_mov_b32_e32 v0, s20
6200 ; GFX6-NEXT: v_mov_b32_e32 v2, s13
6201 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
6202 ; GFX6-NEXT: s_waitcnt expcnt(0)
6203 ; GFX6-NEXT: v_mov_b32_e32 v0, s18
6204 ; GFX6-NEXT: v_mov_b32_e32 v2, s11
6205 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
6206 ; GFX6-NEXT: s_waitcnt expcnt(0)
6207 ; GFX6-NEXT: v_mov_b32_e32 v0, s16
6208 ; GFX6-NEXT: v_mov_b32_e32 v2, s8
6209 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
6210 ; GFX6-NEXT: s_waitcnt expcnt(0)
6211 ; GFX6-NEXT: v_mov_b32_e32 v0, s14
6212 ; GFX6-NEXT: v_mov_b32_e32 v2, s5
6213 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
6214 ; GFX6-NEXT: s_waitcnt expcnt(0)
6215 ; GFX6-NEXT: v_mov_b32_e32 v0, s12
6216 ; GFX6-NEXT: v_mov_b32_e32 v2, s4
6217 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
6218 ; GFX6-NEXT: s_waitcnt expcnt(0)
6219 ; GFX6-NEXT: v_mov_b32_e32 v0, s10
6220 ; GFX6-NEXT: v_mov_b32_e32 v2, s9
6221 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:256
6222 ; GFX6-NEXT: s_waitcnt expcnt(0)
6223 ; GFX6-NEXT: v_mov_b32_e32 v0, s7
6224 ; GFX6-NEXT: v_mov_b32_e32 v2, s6
6225 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
6226 ; GFX6-NEXT: s_endpgm
6227 ;
6228 ; GFX8-LABEL: constant_zextload_v64i1_to_v64i64:
6229 ; GFX8: ; %bb.0:
6230 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
6231 ; GFX8-NEXT: v_mov_b32_e32 v28, 0
6232 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
6233 ; GFX8-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
6234 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
6235 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 13, s2
6236 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v1
6237 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 11, s2
6238 ; GFX8-NEXT: v_and_b32_e32 v16, 1, v1
6239 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 9, s2
6240 ; GFX8-NEXT: v_and_b32_e32 v15, 1, v1
6241 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 7, s2
6242 ; GFX8-NEXT: v_and_b32_e32 v13, 1, v1
6243 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 5, s2
6244 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v1
6245 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 3, s2
6246 ; GFX8-NEXT: v_mov_b32_e32 v12, s2
6247 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 14, s2
6248 ; GFX8-NEXT: s_lshr_b32 s31, s3, 24
6249 ; GFX8-NEXT: s_lshr_b32 s24, s2, 24
6250 ; GFX8-NEXT: v_lshrrev_b16_e64 v19, 12, s2
6251 ; GFX8-NEXT: v_lshrrev_b16_e64 v17, 10, s2
6252 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 6, s2
6253 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 4, s2
6254 ; GFX8-NEXT: v_and_b32_e32 v7, 1, v1
6255 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 2, s2
6256 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 1, s2
6257 ; GFX8-NEXT: s_bfe_u32 s20, s2, 0x10018
6258 ; GFX8-NEXT: s_bfe_u32 s21, s3, 0x10018
6259 ; GFX8-NEXT: s_and_b32 s22, s3, 1
6260 ; GFX8-NEXT: s_and_b32 s23, s2, 1
6261 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 15, s2
6262 ; GFX8-NEXT: s_bfe_u32 s25, s2, 0x10011
6263 ; GFX8-NEXT: s_bfe_u32 s26, s2, 0x10010
6264 ; GFX8-NEXT: s_bfe_u32 s27, s2, 0x10012
6265 ; GFX8-NEXT: s_bfe_u32 s28, s2, 0x10013
6266 ; GFX8-NEXT: s_bfe_u32 s29, s2, 0x10014
6267 ; GFX8-NEXT: s_bfe_u32 s30, s2, 0x10015
6268 ; GFX8-NEXT: s_bfe_u32 s33, s2, 0x10016
6269 ; GFX8-NEXT: s_bfe_u32 s2, s2, 0x10017
6270 ; GFX8-NEXT: s_bfe_u32 s34, s3, 0x10011
6271 ; GFX8-NEXT: s_bfe_u32 s35, s3, 0x10010
6272 ; GFX8-NEXT: s_bfe_u32 s36, s3, 0x10012
6273 ; GFX8-NEXT: s_bfe_u32 s37, s3, 0x10013
6274 ; GFX8-NEXT: s_bfe_u32 s38, s3, 0x10016
6275 ; GFX8-NEXT: s_bfe_u32 s39, s3, 0x10017
6276 ; GFX8-NEXT: s_bfe_u32 s40, s3, 0x10015
6277 ; GFX8-NEXT: s_bfe_u32 s41, s3, 0x10014
6278 ; GFX8-NEXT: s_add_u32 s4, s0, 0x1a0
6279 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
6280 ; GFX8-NEXT: s_add_u32 s6, s0, 0x1b0
6281 ; GFX8-NEXT: s_addc_u32 s7, s1, 0
6282 ; GFX8-NEXT: s_add_u32 s8, s0, 0x190
6283 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
6284 ; GFX8-NEXT: s_add_u32 s10, s0, 0x180
6285 ; GFX8-NEXT: s_addc_u32 s11, s1, 0
6286 ; GFX8-NEXT: s_add_u32 s12, s0, 0xb0
6287 ; GFX8-NEXT: s_addc_u32 s13, s1, 0
6288 ; GFX8-NEXT: s_add_u32 s14, s0, 0xa0
6289 ; GFX8-NEXT: s_addc_u32 s15, s1, 0
6290 ; GFX8-NEXT: s_add_u32 s16, s0, 0x90
6291 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
6292 ; GFX8-NEXT: s_add_u32 s18, s0, 0x80
6293 ; GFX8-NEXT: s_addc_u32 s19, s1, 0
6294 ; GFX8-NEXT: v_and_b32_e32 v9, 1, v1
6295 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 13, s3
6296 ; GFX8-NEXT: s_add_u32 s42, s0, 0x70
6297 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v1
6298 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
6299 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6300 ; GFX8-NEXT: v_mov_b32_e32 v23, s42
6301 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
6302 ; GFX8-NEXT: v_mov_b32_e32 v3, v1
6303 ; GFX8-NEXT: v_mov_b32_e32 v5, v1
6304 ; GFX8-NEXT: v_mov_b32_e32 v24, s43
6305 ; GFX8-NEXT: s_add_u32 s42, s0, 0x170
6306 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 14, s3
6307 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[2:5]
6308 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6309 ; GFX8-NEXT: v_mov_b32_e32 v24, s42
6310 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v22
6311 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 15, s3
6312 ; GFX8-NEXT: v_mov_b32_e32 v25, s43
6313 ; GFX8-NEXT: flat_store_dwordx4 v[24:25], v[2:5]
6314 ; GFX8-NEXT: s_add_u32 s42, s0, 0x1f0
6315 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 11, s3
6316 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 6, s31
6317 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v2
6318 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6319 ; GFX8-NEXT: v_mov_b32_e32 v2, s42
6320 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v21
6321 ; GFX8-NEXT: v_lshrrev_b16_e64 v26, 7, s31
6322 ; GFX8-NEXT: v_mov_b32_e32 v25, v1
6323 ; GFX8-NEXT: v_mov_b32_e32 v27, v1
6324 ; GFX8-NEXT: v_mov_b32_e32 v3, s43
6325 ; GFX8-NEXT: s_add_u32 s42, s0, 0xf0
6326 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 6, s24
6327 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[24:27]
6328 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6329 ; GFX8-NEXT: v_mov_b32_e32 v2, s42
6330 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v20
6331 ; GFX8-NEXT: v_lshrrev_b16_e64 v26, 7, s24
6332 ; GFX8-NEXT: v_mov_b32_e32 v25, v1
6333 ; GFX8-NEXT: v_mov_b32_e32 v3, s43
6334 ; GFX8-NEXT: s_add_u32 s42, s0, 0x60
6335 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[24:27]
6336 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6337 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v19
6338 ; GFX8-NEXT: v_and_b32_e32 v26, 0xffff, v18
6339 ; GFX8-NEXT: v_mov_b32_e32 v18, s42
6340 ; GFX8-NEXT: v_mov_b32_e32 v27, 0
6341 ; GFX8-NEXT: v_mov_b32_e32 v19, s43
6342 ; GFX8-NEXT: s_add_u32 s42, s0, 0x50
6343 ; GFX8-NEXT: flat_store_dwordx4 v[18:19], v[24:27]
6344 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6345 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v17
6346 ; GFX8-NEXT: v_and_b32_e32 v26, 0xffff, v16
6347 ; GFX8-NEXT: v_mov_b32_e32 v16, s42
6348 ; GFX8-NEXT: v_mov_b32_e32 v27, 0
6349 ; GFX8-NEXT: v_mov_b32_e32 v17, s43
6350 ; GFX8-NEXT: s_add_u32 s42, s0, 64
6351 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[24:27]
6352 ; GFX8-NEXT: v_mov_b32_e32 v19, 1
6353 ; GFX8-NEXT: v_and_b32_e32 v26, 0xffff, v15
6354 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6355 ; GFX8-NEXT: v_mov_b32_e32 v15, s42
6356 ; GFX8-NEXT: v_and_b32_sdwa v24, v12, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
6357 ; GFX8-NEXT: v_mov_b32_e32 v27, 0
6358 ; GFX8-NEXT: v_mov_b32_e32 v16, s43
6359 ; GFX8-NEXT: s_add_u32 s42, s0, 48
6360 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[24:27]
6361 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6362 ; GFX8-NEXT: v_and_b32_e32 v26, 0xffff, v13
6363 ; GFX8-NEXT: v_mov_b32_e32 v12, s42
6364 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v14
6365 ; GFX8-NEXT: v_mov_b32_e32 v27, 0
6366 ; GFX8-NEXT: v_mov_b32_e32 v13, s43
6367 ; GFX8-NEXT: s_add_u32 s42, s0, 32
6368 ; GFX8-NEXT: flat_store_dwordx4 v[12:13], v[24:27]
6369 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6370 ; GFX8-NEXT: v_and_b32_e32 v24, 1, v11
6371 ; GFX8-NEXT: v_and_b32_e32 v26, 0xffff, v10
6372 ; GFX8-NEXT: v_mov_b32_e32 v10, s42
6373 ; GFX8-NEXT: v_mov_b32_e32 v27, 0
6374 ; GFX8-NEXT: v_mov_b32_e32 v11, s43
6375 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 5, s31
6376 ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[24:27]
6377 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 3, s31
6378 ; GFX8-NEXT: s_add_u32 s42, s0, 16
6379 ; GFX8-NEXT: v_and_b32_e32 v14, 1, v12
6380 ; GFX8-NEXT: v_and_b32_e32 v25, 1, v10
6381 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v8
6382 ; GFX8-NEXT: v_and_b32_e32 v12, 0xffff, v7
6383 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6384 ; GFX8-NEXT: v_mov_b32_e32 v7, s42
6385 ; GFX8-NEXT: v_mov_b32_e32 v13, 0
6386 ; GFX8-NEXT: v_mov_b32_e32 v11, v1
6387 ; GFX8-NEXT: v_mov_b32_e32 v8, s43
6388 ; GFX8-NEXT: flat_store_dwordx4 v[7:8], v[10:13]
6389 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 1, s31
6390 ; GFX8-NEXT: s_add_u32 s42, s0, 0x160
6391 ; GFX8-NEXT: v_lshrrev_b16_e64 v23, 12, s3
6392 ; GFX8-NEXT: v_and_b32_e32 v27, 1, v7
6393 ; GFX8-NEXT: v_and_b32_e32 v12, 0xffff, v6
6394 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6395 ; GFX8-NEXT: v_mov_b32_e32 v6, s42
6396 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v23
6397 ; GFX8-NEXT: v_mov_b32_e32 v13, 0
6398 ; GFX8-NEXT: v_mov_b32_e32 v11, v1
6399 ; GFX8-NEXT: v_mov_b32_e32 v7, s43
6400 ; GFX8-NEXT: flat_store_dwordx4 v[6:7], v[10:13]
6401 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 5, s24
6402 ; GFX8-NEXT: s_add_u32 s42, s0, 0x150
6403 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 10, s3
6404 ; GFX8-NEXT: v_and_b32_e32 v23, 1, v6
6405 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6406 ; GFX8-NEXT: v_mov_b32_e32 v6, s42
6407 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v21
6408 ; GFX8-NEXT: v_and_b32_e32 v12, 0xffff, v4
6409 ; GFX8-NEXT: v_mov_b32_e32 v13, 0
6410 ; GFX8-NEXT: v_mov_b32_e32 v7, s43
6411 ; GFX8-NEXT: flat_store_dwordx4 v[6:7], v[10:13]
6412 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 1, s24
6413 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 9, s3
6414 ; GFX8-NEXT: v_and_b32_e32 v6, 1, v6
6415 ; GFX8-NEXT: s_add_u32 s42, s0, 0x140
6416 ; GFX8-NEXT: v_mov_b32_e32 v0, s3
6417 ; GFX8-NEXT: v_and_b32_e32 v20, 1, v2
6418 ; GFX8-NEXT: v_and_b32_e32 v12, 0xffff, v6
6419 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6420 ; GFX8-NEXT: v_mov_b32_e32 v6, s42
6421 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 7, s3
6422 ; GFX8-NEXT: v_and_b32_sdwa v19, v0, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
6423 ; GFX8-NEXT: v_and_b32_e32 v21, 0xffff, v20
6424 ; GFX8-NEXT: v_mov_b32_e32 v22, 0
6425 ; GFX8-NEXT: v_mov_b32_e32 v20, v1
6426 ; GFX8-NEXT: v_mov_b32_e32 v7, s43
6427 ; GFX8-NEXT: s_add_u32 s42, s0, 0x130
6428 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
6429 ; GFX8-NEXT: v_lshrrev_b16_e64 v18, 6, s3
6430 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 5, s3
6431 ; GFX8-NEXT: flat_store_dwordx4 v[6:7], v[19:22]
6432 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6433 ; GFX8-NEXT: v_mov_b32_e32 v6, s42
6434 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v3
6435 ; GFX8-NEXT: v_and_b32_e32 v18, 1, v18
6436 ; GFX8-NEXT: v_and_b32_e32 v20, 0xffff, v2
6437 ; GFX8-NEXT: v_mov_b32_e32 v21, 0
6438 ; GFX8-NEXT: v_mov_b32_e32 v19, v1
6439 ; GFX8-NEXT: v_mov_b32_e32 v7, s43
6440 ; GFX8-NEXT: s_add_u32 s42, s0, 0x120
6441 ; GFX8-NEXT: v_lshrrev_b16_e64 v17, 4, s3
6442 ; GFX8-NEXT: flat_store_dwordx4 v[6:7], v[18:21]
6443 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6444 ; GFX8-NEXT: v_and_b32_e32 v19, 0xffff, v3
6445 ; GFX8-NEXT: v_mov_b32_e32 v2, s42
6446 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 3, s3
6447 ; GFX8-NEXT: v_and_b32_e32 v17, 1, v17
6448 ; GFX8-NEXT: v_mov_b32_e32 v20, 0
6449 ; GFX8-NEXT: v_mov_b32_e32 v18, v1
6450 ; GFX8-NEXT: v_mov_b32_e32 v3, s43
6451 ; GFX8-NEXT: s_add_u32 s42, s0, 0x110
6452 ; GFX8-NEXT: v_and_b32_e32 v15, 1, v5
6453 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 2, s3
6454 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 3, s24
6455 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[17:20]
6456 ; GFX8-NEXT: s_addc_u32 s43, s1, 0
6457 ; GFX8-NEXT: v_mov_b32_e32 v2, s42
6458 ; GFX8-NEXT: v_lshrrev_b16_e64 v24, 4, s31
6459 ; GFX8-NEXT: v_and_b32_e32 v10, 1, v4
6460 ; GFX8-NEXT: v_and_b32_e32 v16, 1, v16
6461 ; GFX8-NEXT: v_and_b32_e32 v18, 0xffff, v15
6462 ; GFX8-NEXT: v_mov_b32_e32 v19, 0
6463 ; GFX8-NEXT: v_mov_b32_e32 v17, v1
6464 ; GFX8-NEXT: v_mov_b32_e32 v3, s43
6465 ; GFX8-NEXT: v_and_b32_e32 v6, 0xffff, v10
6466 ; GFX8-NEXT: v_and_b32_e32 v10, 0xffff, v23
6467 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[16:19]
6468 ; GFX8-NEXT: v_mov_b32_e32 v0, s41
6469 ; GFX8-NEXT: v_and_b32_e32 v19, 1, v24
6470 ; GFX8-NEXT: v_mov_b32_e32 v24, s5
6471 ; GFX8-NEXT: v_mov_b32_e32 v2, s40
6472 ; GFX8-NEXT: v_mov_b32_e32 v3, v1
6473 ; GFX8-NEXT: v_mov_b32_e32 v23, s4
6474 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6475 ; GFX8-NEXT: v_mov_b32_e32 v24, s7
6476 ; GFX8-NEXT: v_mov_b32_e32 v0, s38
6477 ; GFX8-NEXT: v_mov_b32_e32 v2, s39
6478 ; GFX8-NEXT: v_mov_b32_e32 v23, s6
6479 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6480 ; GFX8-NEXT: v_mov_b32_e32 v24, s9
6481 ; GFX8-NEXT: v_mov_b32_e32 v0, s36
6482 ; GFX8-NEXT: v_mov_b32_e32 v2, s37
6483 ; GFX8-NEXT: v_mov_b32_e32 v23, s8
6484 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6485 ; GFX8-NEXT: v_mov_b32_e32 v24, s11
6486 ; GFX8-NEXT: v_mov_b32_e32 v0, s35
6487 ; GFX8-NEXT: v_mov_b32_e32 v2, s34
6488 ; GFX8-NEXT: v_mov_b32_e32 v23, s10
6489 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6490 ; GFX8-NEXT: v_mov_b32_e32 v24, s13
6491 ; GFX8-NEXT: v_mov_b32_e32 v0, s33
6492 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
6493 ; GFX8-NEXT: v_mov_b32_e32 v23, s12
6494 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6495 ; GFX8-NEXT: v_mov_b32_e32 v24, s15
6496 ; GFX8-NEXT: v_mov_b32_e32 v0, s29
6497 ; GFX8-NEXT: v_mov_b32_e32 v2, s30
6498 ; GFX8-NEXT: v_mov_b32_e32 v23, s14
6499 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6500 ; GFX8-NEXT: v_mov_b32_e32 v24, s17
6501 ; GFX8-NEXT: v_mov_b32_e32 v0, s27
6502 ; GFX8-NEXT: v_mov_b32_e32 v2, s28
6503 ; GFX8-NEXT: v_mov_b32_e32 v23, s16
6504 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6505 ; GFX8-NEXT: v_mov_b32_e32 v24, s19
6506 ; GFX8-NEXT: v_mov_b32_e32 v0, s26
6507 ; GFX8-NEXT: v_mov_b32_e32 v2, s25
6508 ; GFX8-NEXT: v_mov_b32_e32 v23, s18
6509 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 1, s3
6510 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6511 ; GFX8-NEXT: v_mov_b32_e32 v24, s1
6512 ; GFX8-NEXT: s_add_u32 s2, s0, 0x100
6513 ; GFX8-NEXT: v_and_b32_e32 v5, 1, v5
6514 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v9
6515 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
6516 ; GFX8-NEXT: v_mov_b32_e32 v0, s23
6517 ; GFX8-NEXT: v_mov_b32_e32 v23, s0
6518 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
6519 ; GFX8-NEXT: v_and_b32_e32 v21, 0xffff, v14
6520 ; GFX8-NEXT: v_and_b32_e32 v5, 0xffff, v5
6521 ; GFX8-NEXT: v_mov_b32_e32 v14, 0
6522 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6523 ; GFX8-NEXT: v_mov_b32_e32 v24, s3
6524 ; GFX8-NEXT: v_mov_b32_e32 v0, s22
6525 ; GFX8-NEXT: v_mov_b32_e32 v2, v5
6526 ; GFX8-NEXT: v_mov_b32_e32 v3, v14
6527 ; GFX8-NEXT: v_mov_b32_e32 v23, s2
6528 ; GFX8-NEXT: s_add_u32 s2, s0, 0x1e0
6529 ; GFX8-NEXT: flat_store_dwordx4 v[23:24], v[0:3]
6530 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
6531 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
6532 ; GFX8-NEXT: v_mov_b32_e32 v22, 0
6533 ; GFX8-NEXT: v_mov_b32_e32 v20, v1
6534 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
6535 ; GFX8-NEXT: s_add_u32 s2, s0, 0x1d0
6536 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[19:22]
6537 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
6538 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
6539 ; GFX8-NEXT: v_lshrrev_b16_e64 v26, 2, s31
6540 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
6541 ; GFX8-NEXT: s_add_u32 s2, s0, 0x1c0
6542 ; GFX8-NEXT: v_and_b32_e32 v15, 1, v26
6543 ; GFX8-NEXT: v_and_b32_e32 v17, 0xffff, v25
6544 ; GFX8-NEXT: v_mov_b32_e32 v18, 0
6545 ; GFX8-NEXT: v_mov_b32_e32 v16, v1
6546 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
6547 ; GFX8-NEXT: v_and_b32_e32 v27, 0xffff, v27
6548 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[15:18]
6549 ; GFX8-NEXT: v_mov_b32_e32 v0, s21
6550 ; GFX8-NEXT: v_mov_b32_e32 v15, s3
6551 ; GFX8-NEXT: v_mov_b32_e32 v2, v27
6552 ; GFX8-NEXT: v_mov_b32_e32 v3, v28
6553 ; GFX8-NEXT: v_mov_b32_e32 v14, s2
6554 ; GFX8-NEXT: s_add_u32 s2, s0, 0xe0
6555 ; GFX8-NEXT: flat_store_dwordx4 v[14:15], v[0:3]
6556 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
6557 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
6558 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 4, s24
6559 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
6560 ; GFX8-NEXT: s_add_u32 s2, s0, 0xd0
6561 ; GFX8-NEXT: v_and_b32_e32 v8, 1, v8
6562 ; GFX8-NEXT: v_mov_b32_e32 v11, 0
6563 ; GFX8-NEXT: v_mov_b32_e32 v9, v1
6564 ; GFX8-NEXT: s_addc_u32 s3, s1, 0
6565 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 2, s24
6566 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[8:11]
6567 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
6568 ; GFX8-NEXT: s_add_u32 s0, s0, 0xc0
6569 ; GFX8-NEXT: v_and_b32_e32 v4, 1, v4
6570 ; GFX8-NEXT: v_mov_b32_e32 v7, 0
6571 ; GFX8-NEXT: v_mov_b32_e32 v5, v1
6572 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
6573 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
6574 ; GFX8-NEXT: v_mov_b32_e32 v13, 0
6575 ; GFX8-NEXT: flat_store_dwordx4 v[2:3], v[4:7]
6576 ; GFX8-NEXT: v_mov_b32_e32 v0, s20
6577 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
6578 ; GFX8-NEXT: v_mov_b32_e32 v2, v12
6579 ; GFX8-NEXT: v_mov_b32_e32 v3, v13
6580 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
6581 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
6582 ; GFX8-NEXT: s_endpgm
6583 ;
6584 ; EG-LABEL: constant_zextload_v64i1_to_v64i64:
6585 ; EG: ; %bb.0:
6586 ; EG-NEXT: ALU 0, @40, KC0[CB0:0-32], KC1[]
6587 ; EG-NEXT: TEX 0 @38
6588 ; EG-NEXT: ALU 95, @41, KC0[], KC1[]
6589 ; EG-NEXT: ALU 99, @137, KC0[CB0:0-32], KC1[]
6590 ; EG-NEXT: ALU 60, @237, KC0[CB0:0-32], KC1[]
6591 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T82.X, 0
6592 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T81.X, 0
6593 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T80.X, 0
6594 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T79.X, 0
6595 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T78.X, 0
6596 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T77.X, 0
6597 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T76.X, 0
6598 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T27.XYZW, T75.X, 0
6599 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T28.XYZW, T74.X, 0
6600 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T29.XYZW, T73.X, 0
6601 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T30.XYZW, T72.X, 0
6602 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T31.XYZW, T71.X, 0
6603 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T32.XYZW, T70.X, 0
6604 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T33.XYZW, T69.X, 0
6605 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T34.XYZW, T68.X, 0
6606 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T35.XYZW, T67.X, 0
6607 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T66.X, 0
6608 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T37.XYZW, T65.X, 0
6609 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T64.X, 0
6610 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T39.XYZW, T63.X, 0
6611 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T40.XYZW, T62.X, 0
6612 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T41.XYZW, T61.X, 0
6613 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T42.XYZW, T60.X, 0
6614 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T43.XYZW, T59.X, 0
6615 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T44.XYZW, T58.X, 0
6616 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T45.XYZW, T57.X, 0
6617 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T46.XYZW, T56.X, 0
6618 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T47.XYZW, T55.X, 0
6619 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T48.XYZW, T54.X, 0
6620 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T49.XYZW, T53.X, 0
6621 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T50.XYZW, T52.X, 0
6622 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T51.X, 1
6623 ; EG-NEXT: CF_END
6624 ; EG-NEXT: Fetch clause starting at 38:
6625 ; EG-NEXT: VTX_READ_64 T25.XY, T19.X, 0, #1
6626 ; EG-NEXT: ALU clause starting at 40:
6627 ; EG-NEXT: MOV * T19.X, KC0[2].Z,
6628 ; EG-NEXT: ALU clause starting at 41:
6629 ; EG-NEXT: LSHR * T19.Z, T25.Y, literal.x,
6630 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
6631 ; EG-NEXT: BFE_UINT T19.X, T25.Y, literal.x, 1,
6632 ; EG-NEXT: MOV T19.Y, 0.0,
6633 ; EG-NEXT: BFE_UINT * T20.Z, T25.Y, literal.y, 1,
6634 ; EG-NEXT: 30(4.203895e-44), 29(4.063766e-44)
6635 ; EG-NEXT: BFE_UINT T20.X, T25.Y, literal.x, 1,
6636 ; EG-NEXT: MOV T20.Y, 0.0,
6637 ; EG-NEXT: BFE_UINT * T21.Z, T25.Y, literal.y, 1,
6638 ; EG-NEXT: 28(3.923636e-44), 27(3.783506e-44)
6639 ; EG-NEXT: BFE_UINT T21.X, T25.Y, literal.x, 1,
6640 ; EG-NEXT: MOV T21.Y, 0.0,
6641 ; EG-NEXT: BFE_UINT * T22.Z, T25.Y, literal.y, 1,
6642 ; EG-NEXT: 26(3.643376e-44), 25(3.503246e-44)
6643 ; EG-NEXT: BFE_UINT T22.X, T25.Y, literal.x, 1,
6644 ; EG-NEXT: MOV T22.Y, 0.0,
6645 ; EG-NEXT: BFE_UINT * T23.Z, T25.Y, literal.y, 1,
6646 ; EG-NEXT: 24(3.363116e-44), 23(3.222986e-44)
6647 ; EG-NEXT: BFE_UINT T23.X, T25.Y, literal.x, 1,
6648 ; EG-NEXT: MOV T23.Y, 0.0,
6649 ; EG-NEXT: BFE_UINT * T24.Z, T25.Y, literal.y, 1,
6650 ; EG-NEXT: 22(3.082857e-44), 21(2.942727e-44)
6651 ; EG-NEXT: BFE_UINT T24.X, T25.Y, literal.x, 1,
6652 ; EG-NEXT: MOV T24.Y, 0.0,
6653 ; EG-NEXT: BFE_UINT * T26.Z, T25.Y, literal.y, 1,
6654 ; EG-NEXT: 20(2.802597e-44), 19(2.662467e-44)
6655 ; EG-NEXT: BFE_UINT T26.X, T25.Y, literal.x, 1,
6656 ; EG-NEXT: MOV T26.Y, 0.0,
6657 ; EG-NEXT: BFE_UINT * T27.Z, T25.Y, literal.y, 1,
6658 ; EG-NEXT: 18(2.522337e-44), 17(2.382207e-44)
6659 ; EG-NEXT: BFE_UINT T27.X, T25.Y, literal.x, 1,
6660 ; EG-NEXT: MOV T27.Y, 0.0,
6661 ; EG-NEXT: BFE_UINT * T28.Z, T25.Y, literal.y, 1,
6662 ; EG-NEXT: 16(2.242078e-44), 15(2.101948e-44)
6663 ; EG-NEXT: BFE_UINT T28.X, T25.Y, literal.x, 1,
6664 ; EG-NEXT: MOV T28.Y, 0.0,
6665 ; EG-NEXT: BFE_UINT * T29.Z, T25.Y, literal.y, 1,
6666 ; EG-NEXT: 14(1.961818e-44), 13(1.821688e-44)
6667 ; EG-NEXT: BFE_UINT T29.X, T25.Y, literal.x, 1,
6668 ; EG-NEXT: MOV T29.Y, 0.0,
6669 ; EG-NEXT: BFE_UINT * T30.Z, T25.Y, literal.y, 1,
6670 ; EG-NEXT: 12(1.681558e-44), 11(1.541428e-44)
6671 ; EG-NEXT: BFE_UINT T30.X, T25.Y, literal.x, 1,
6672 ; EG-NEXT: MOV T30.Y, 0.0,
6673 ; EG-NEXT: BFE_UINT * T31.Z, T25.Y, literal.y, 1,
6674 ; EG-NEXT: 10(1.401298e-44), 9(1.261169e-44)
6675 ; EG-NEXT: BFE_UINT T31.X, T25.Y, literal.x, 1,
6676 ; EG-NEXT: MOV T31.Y, 0.0,
6677 ; EG-NEXT: BFE_UINT * T32.Z, T25.Y, literal.y, 1,
6678 ; EG-NEXT: 8(1.121039e-44), 7(9.809089e-45)
6679 ; EG-NEXT: BFE_UINT T32.X, T25.Y, literal.x, 1,
6680 ; EG-NEXT: MOV T32.Y, 0.0,
6681 ; EG-NEXT: BFE_UINT * T33.Z, T25.Y, literal.y, 1,
6682 ; EG-NEXT: 6(8.407791e-45), 5(7.006492e-45)
6683 ; EG-NEXT: BFE_UINT T33.X, T25.Y, literal.x, 1,
6684 ; EG-NEXT: MOV T33.Y, 0.0,
6685 ; EG-NEXT: BFE_UINT * T34.Z, T25.Y, literal.y, 1,
6686 ; EG-NEXT: 4(5.605194e-45), 3(4.203895e-45)
6687 ; EG-NEXT: BFE_UINT T34.X, T25.Y, literal.x, 1,
6688 ; EG-NEXT: MOV T34.Y, 0.0,
6689 ; EG-NEXT: BFE_UINT T35.Z, T25.Y, 1, 1,
6690 ; EG-NEXT: AND_INT * T35.X, T25.Y, 1,
6691 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
6692 ; EG-NEXT: MOV T35.Y, 0.0,
6693 ; EG-NEXT: LSHR * T36.Z, T25.X, literal.x,
6694 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
6695 ; EG-NEXT: BFE_UINT T36.X, T25.X, literal.x, 1,
6696 ; EG-NEXT: MOV T36.Y, 0.0,
6697 ; EG-NEXT: BFE_UINT * T37.Z, T25.X, literal.y, 1,
6698 ; EG-NEXT: 30(4.203895e-44), 29(4.063766e-44)
6699 ; EG-NEXT: BFE_UINT T37.X, T25.X, literal.x, 1,
6700 ; EG-NEXT: MOV T37.Y, 0.0,
6701 ; EG-NEXT: BFE_UINT * T38.Z, T25.X, literal.y, 1,
6702 ; EG-NEXT: 28(3.923636e-44), 27(3.783506e-44)
6703 ; EG-NEXT: BFE_UINT T38.X, T25.X, literal.x, 1,
6704 ; EG-NEXT: MOV T38.Y, 0.0,
6705 ; EG-NEXT: BFE_UINT * T39.Z, T25.X, literal.y, 1,
6706 ; EG-NEXT: 26(3.643376e-44), 25(3.503246e-44)
6707 ; EG-NEXT: BFE_UINT T39.X, T25.X, literal.x, 1,
6708 ; EG-NEXT: MOV T39.Y, 0.0,
6709 ; EG-NEXT: BFE_UINT * T40.Z, T25.X, literal.y, 1,
6710 ; EG-NEXT: 24(3.363116e-44), 23(3.222986e-44)
6711 ; EG-NEXT: BFE_UINT T40.X, T25.X, literal.x, 1,
6712 ; EG-NEXT: MOV T40.Y, 0.0,
6713 ; EG-NEXT: BFE_UINT * T41.Z, T25.X, literal.y, 1,
6714 ; EG-NEXT: 22(3.082857e-44), 21(2.942727e-44)
6715 ; EG-NEXT: BFE_UINT T41.X, T25.X, literal.x, 1,
6716 ; EG-NEXT: MOV T41.Y, 0.0,
6717 ; EG-NEXT: BFE_UINT * T42.Z, T25.X, literal.y, 1,
6718 ; EG-NEXT: 20(2.802597e-44), 19(2.662467e-44)
6719 ; EG-NEXT: BFE_UINT T42.X, T25.X, literal.x, 1,
6720 ; EG-NEXT: MOV T42.Y, 0.0,
6721 ; EG-NEXT: BFE_UINT * T43.Z, T25.X, literal.y, 1,
6722 ; EG-NEXT: 18(2.522337e-44), 17(2.382207e-44)
6723 ; EG-NEXT: BFE_UINT * T43.X, T25.X, literal.x, 1,
6724 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
6725 ; EG-NEXT: ALU clause starting at 137:
6726 ; EG-NEXT: MOV T43.Y, 0.0,
6727 ; EG-NEXT: BFE_UINT * T44.Z, T25.X, literal.x, 1,
6728 ; EG-NEXT: 15(2.101948e-44), 0(0.000000e+00)
6729 ; EG-NEXT: BFE_UINT T44.X, T25.X, literal.x, 1,
6730 ; EG-NEXT: MOV T44.Y, 0.0,
6731 ; EG-NEXT: BFE_UINT * T45.Z, T25.X, literal.y, 1,
6732 ; EG-NEXT: 14(1.961818e-44), 13(1.821688e-44)
6733 ; EG-NEXT: BFE_UINT T45.X, T25.X, literal.x, 1,
6734 ; EG-NEXT: MOV T45.Y, 0.0,
6735 ; EG-NEXT: BFE_UINT * T46.Z, T25.X, literal.y, 1,
6736 ; EG-NEXT: 12(1.681558e-44), 11(1.541428e-44)
6737 ; EG-NEXT: BFE_UINT T46.X, T25.X, literal.x, 1,
6738 ; EG-NEXT: MOV T46.Y, 0.0,
6739 ; EG-NEXT: BFE_UINT * T47.Z, T25.X, literal.y, 1,
6740 ; EG-NEXT: 10(1.401298e-44), 9(1.261169e-44)
6741 ; EG-NEXT: BFE_UINT T47.X, T25.X, literal.x, 1,
6742 ; EG-NEXT: MOV T47.Y, 0.0,
6743 ; EG-NEXT: BFE_UINT * T48.Z, T25.X, literal.y, 1,
6744 ; EG-NEXT: 8(1.121039e-44), 7(9.809089e-45)
6745 ; EG-NEXT: BFE_UINT T48.X, T25.X, literal.x, 1,
6746 ; EG-NEXT: MOV T48.Y, 0.0,
6747 ; EG-NEXT: BFE_UINT * T49.Z, T25.X, literal.y, 1,
6748 ; EG-NEXT: 6(8.407791e-45), 5(7.006492e-45)
6749 ; EG-NEXT: BFE_UINT T49.X, T25.X, literal.x, 1,
6750 ; EG-NEXT: MOV T49.Y, 0.0,
6751 ; EG-NEXT: BFE_UINT * T50.Z, T25.X, literal.y, 1,
6752 ; EG-NEXT: 4(5.605194e-45), 3(4.203895e-45)
6753 ; EG-NEXT: BFE_UINT T50.X, T25.X, literal.x, 1,
6754 ; EG-NEXT: MOV T50.Y, 0.0,
6755 ; EG-NEXT: BFE_UINT T25.Z, T25.X, 1, 1,
6756 ; EG-NEXT: AND_INT * T25.X, T25.X, 1,
6757 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
6758 ; EG-NEXT: MOV T25.Y, 0.0,
6759 ; EG-NEXT: MOV T19.W, 0.0,
6760 ; EG-NEXT: MOV * T20.W, 0.0,
6761 ; EG-NEXT: MOV T21.W, 0.0,
6762 ; EG-NEXT: MOV * T22.W, 0.0,
6763 ; EG-NEXT: MOV T23.W, 0.0,
6764 ; EG-NEXT: MOV * T24.W, 0.0,
6765 ; EG-NEXT: MOV T26.W, 0.0,
6766 ; EG-NEXT: MOV * T27.W, 0.0,
6767 ; EG-NEXT: MOV T28.W, 0.0,
6768 ; EG-NEXT: MOV * T29.W, 0.0,
6769 ; EG-NEXT: MOV T30.W, 0.0,
6770 ; EG-NEXT: MOV * T31.W, 0.0,
6771 ; EG-NEXT: MOV T32.W, 0.0,
6772 ; EG-NEXT: MOV * T33.W, 0.0,
6773 ; EG-NEXT: MOV T34.W, 0.0,
6774 ; EG-NEXT: MOV * T35.W, 0.0,
6775 ; EG-NEXT: MOV T36.W, 0.0,
6776 ; EG-NEXT: MOV * T37.W, 0.0,
6777 ; EG-NEXT: MOV T38.W, 0.0,
6778 ; EG-NEXT: MOV * T39.W, 0.0,
6779 ; EG-NEXT: MOV T40.W, 0.0,
6780 ; EG-NEXT: MOV * T41.W, 0.0,
6781 ; EG-NEXT: MOV T42.W, 0.0,
6782 ; EG-NEXT: MOV * T43.W, 0.0,
6783 ; EG-NEXT: MOV T44.W, 0.0,
6784 ; EG-NEXT: MOV * T45.W, 0.0,
6785 ; EG-NEXT: MOV T46.W, 0.0,
6786 ; EG-NEXT: MOV * T47.W, 0.0,
6787 ; EG-NEXT: MOV T48.W, 0.0,
6788 ; EG-NEXT: MOV * T49.W, 0.0,
6789 ; EG-NEXT: MOV T50.W, 0.0,
6790 ; EG-NEXT: MOV * T25.W, 0.0,
6791 ; EG-NEXT: LSHR T51.X, KC0[2].Y, literal.x,
6792 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6793 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
6794 ; EG-NEXT: LSHR T52.X, PV.W, literal.x,
6795 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6796 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
6797 ; EG-NEXT: LSHR T53.X, PV.W, literal.x,
6798 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6799 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
6800 ; EG-NEXT: LSHR T54.X, PV.W, literal.x,
6801 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6802 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
6803 ; EG-NEXT: LSHR T55.X, PV.W, literal.x,
6804 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6805 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
6806 ; EG-NEXT: LSHR T56.X, PV.W, literal.x,
6807 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6808 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
6809 ; EG-NEXT: LSHR T57.X, PV.W, literal.x,
6810 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6811 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
6812 ; EG-NEXT: LSHR T58.X, PV.W, literal.x,
6813 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6814 ; EG-NEXT: 2(2.802597e-45), 128(1.793662e-43)
6815 ; EG-NEXT: LSHR T59.X, PV.W, literal.x,
6816 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6817 ; EG-NEXT: 2(2.802597e-45), 144(2.017870e-43)
6818 ; EG-NEXT: LSHR T60.X, PV.W, literal.x,
6819 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6820 ; EG-NEXT: 2(2.802597e-45), 160(2.242078e-43)
6821 ; EG-NEXT: LSHR T61.X, PV.W, literal.x,
6822 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6823 ; EG-NEXT: 2(2.802597e-45), 176(2.466285e-43)
6824 ; EG-NEXT: LSHR * T62.X, PV.W, literal.x,
6825 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
6826 ; EG-NEXT: ALU clause starting at 237:
6827 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
6828 ; EG-NEXT: 192(2.690493e-43), 0(0.000000e+00)
6829 ; EG-NEXT: LSHR T63.X, PV.W, literal.x,
6830 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6831 ; EG-NEXT: 2(2.802597e-45), 208(2.914701e-43)
6832 ; EG-NEXT: LSHR T64.X, PV.W, literal.x,
6833 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6834 ; EG-NEXT: 2(2.802597e-45), 224(3.138909e-43)
6835 ; EG-NEXT: LSHR T65.X, PV.W, literal.x,
6836 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6837 ; EG-NEXT: 2(2.802597e-45), 240(3.363116e-43)
6838 ; EG-NEXT: LSHR T66.X, PV.W, literal.x,
6839 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6840 ; EG-NEXT: 2(2.802597e-45), 256(3.587324e-43)
6841 ; EG-NEXT: LSHR T67.X, PV.W, literal.x,
6842 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6843 ; EG-NEXT: 2(2.802597e-45), 272(3.811532e-43)
6844 ; EG-NEXT: LSHR T68.X, PV.W, literal.x,
6845 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6846 ; EG-NEXT: 2(2.802597e-45), 288(4.035740e-43)
6847 ; EG-NEXT: LSHR T69.X, PV.W, literal.x,
6848 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6849 ; EG-NEXT: 2(2.802597e-45), 304(4.259947e-43)
6850 ; EG-NEXT: LSHR T70.X, PV.W, literal.x,
6851 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6852 ; EG-NEXT: 2(2.802597e-45), 320(4.484155e-43)
6853 ; EG-NEXT: LSHR T71.X, PV.W, literal.x,
6854 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6855 ; EG-NEXT: 2(2.802597e-45), 336(4.708363e-43)
6856 ; EG-NEXT: LSHR T72.X, PV.W, literal.x,
6857 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6858 ; EG-NEXT: 2(2.802597e-45), 352(4.932571e-43)
6859 ; EG-NEXT: LSHR T73.X, PV.W, literal.x,
6860 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6861 ; EG-NEXT: 2(2.802597e-45), 368(5.156778e-43)
6862 ; EG-NEXT: LSHR T74.X, PV.W, literal.x,
6863 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6864 ; EG-NEXT: 2(2.802597e-45), 384(5.380986e-43)
6865 ; EG-NEXT: LSHR T75.X, PV.W, literal.x,
6866 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6867 ; EG-NEXT: 2(2.802597e-45), 400(5.605194e-43)
6868 ; EG-NEXT: LSHR T76.X, PV.W, literal.x,
6869 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6870 ; EG-NEXT: 2(2.802597e-45), 416(5.829402e-43)
6871 ; EG-NEXT: LSHR T77.X, PV.W, literal.x,
6872 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6873 ; EG-NEXT: 2(2.802597e-45), 432(6.053609e-43)
6874 ; EG-NEXT: LSHR T78.X, PV.W, literal.x,
6875 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6876 ; EG-NEXT: 2(2.802597e-45), 448(6.277817e-43)
6877 ; EG-NEXT: LSHR T79.X, PV.W, literal.x,
6878 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6879 ; EG-NEXT: 2(2.802597e-45), 464(6.502025e-43)
6880 ; EG-NEXT: LSHR T80.X, PV.W, literal.x,
6881 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6882 ; EG-NEXT: 2(2.802597e-45), 480(6.726233e-43)
6883 ; EG-NEXT: LSHR T81.X, PV.W, literal.x,
6884 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
6885 ; EG-NEXT: 2(2.802597e-45), 496(6.950440e-43)
6886 ; EG-NEXT: LSHR * T82.X, PV.W, literal.x,
6887 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
6888 %load = load <64 x i1>, ptr addrspace(4) %in
6889 %ext = zext <64 x i1> %load to <64 x i64>
6890 store <64 x i64> %ext, ptr addrspace(1) %out
6891 ret void
6892 }
6894 define amdgpu_kernel void @constant_sextload_v64i1_to_v64i64(ptr addrspace(1) %out, ptr addrspace(4) nocapture %in) #0 {
6895 ; GFX6-LABEL: constant_sextload_v64i1_to_v64i64:
6896 ; GFX6: ; %bb.0:
6897 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
6898 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
6899 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
6900 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
6901 ; GFX6-NEXT: s_mov_b32 s2, -1
6902 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
6903 ; GFX6-NEXT: s_lshr_b32 s48, s5, 30
6904 ; GFX6-NEXT: s_lshr_b32 s46, s5, 28
6905 ; GFX6-NEXT: s_lshr_b32 s44, s5, 29
6906 ; GFX6-NEXT: s_lshr_b32 s40, s5, 26
6907 ; GFX6-NEXT: s_lshr_b32 s42, s5, 27
6908 ; GFX6-NEXT: s_lshr_b32 s36, s5, 24
6909 ; GFX6-NEXT: s_lshr_b32 s38, s5, 25
6910 ; GFX6-NEXT: s_lshr_b32 s30, s5, 22
6911 ; GFX6-NEXT: s_lshr_b32 s34, s5, 23
6912 ; GFX6-NEXT: s_lshr_b32 s26, s5, 20
6913 ; GFX6-NEXT: s_lshr_b32 s28, s5, 21
6914 ; GFX6-NEXT: s_lshr_b32 s22, s5, 18
6915 ; GFX6-NEXT: s_lshr_b32 s24, s5, 19
6916 ; GFX6-NEXT: s_lshr_b32 s18, s5, 16
6917 ; GFX6-NEXT: s_lshr_b32 s20, s5, 17
6918 ; GFX6-NEXT: s_lshr_b32 s14, s5, 14
6919 ; GFX6-NEXT: s_lshr_b32 s16, s5, 15
6920 ; GFX6-NEXT: s_lshr_b32 s10, s5, 12
6921 ; GFX6-NEXT: s_lshr_b32 s12, s5, 13
6922 ; GFX6-NEXT: s_lshr_b32 s6, s5, 10
6923 ; GFX6-NEXT: s_lshr_b32 s8, s5, 11
6924 ; GFX6-NEXT: s_mov_b32 s50, s5
6925 ; GFX6-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000
6926 ; GFX6-NEXT: s_bfe_i64 s[52:53], s[4:5], 0x10000
6927 ; GFX6-NEXT: v_mov_b32_e32 v0, s50
6928 ; GFX6-NEXT: v_mov_b32_e32 v1, s51
6929 ; GFX6-NEXT: s_lshr_b32 s50, s5, 8
6930 ; GFX6-NEXT: v_mov_b32_e32 v4, s52
6931 ; GFX6-NEXT: v_mov_b32_e32 v5, s53
6932 ; GFX6-NEXT: s_lshr_b32 s52, s5, 9
6933 ; GFX6-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000
6934 ; GFX6-NEXT: s_bfe_i64 s[54:55], s[46:47], 0x10000
6935 ; GFX6-NEXT: v_mov_b32_e32 v6, s48
6936 ; GFX6-NEXT: v_mov_b32_e32 v7, s49
6937 ; GFX6-NEXT: s_lshr_b32 s46, s5, 6
6938 ; GFX6-NEXT: v_mov_b32_e32 v10, s54
6939 ; GFX6-NEXT: v_mov_b32_e32 v11, s55
6940 ; GFX6-NEXT: s_lshr_b32 s48, s5, 7
6941 ; GFX6-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000
6942 ; GFX6-NEXT: s_ashr_i32 s7, s5, 31
6943 ; GFX6-NEXT: v_mov_b32_e32 v12, s44
6944 ; GFX6-NEXT: v_mov_b32_e32 v13, s45
6945 ; GFX6-NEXT: s_lshr_b32 s44, s5, 4
6946 ; GFX6-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000
6947 ; GFX6-NEXT: s_bfe_i64 s[54:55], s[42:43], 0x10000
6948 ; GFX6-NEXT: v_mov_b32_e32 v14, s40
6949 ; GFX6-NEXT: v_mov_b32_e32 v15, s41
6950 ; GFX6-NEXT: s_lshr_b32 s42, s5, 5
6951 ; GFX6-NEXT: v_mov_b32_e32 v16, s54
6952 ; GFX6-NEXT: v_mov_b32_e32 v17, s55
6953 ; GFX6-NEXT: s_lshr_b32 s40, s5, 2
6954 ; GFX6-NEXT: v_mov_b32_e32 v8, s7
6955 ; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000
6956 ; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000
6957 ; GFX6-NEXT: v_mov_b32_e32 v9, s7
6958 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:496
6959 ; GFX6-NEXT: s_waitcnt expcnt(0)
6960 ; GFX6-NEXT: v_mov_b32_e32 v6, s36
6961 ; GFX6-NEXT: v_mov_b32_e32 v7, s37
6962 ; GFX6-NEXT: s_lshr_b32 s36, s5, 3
6963 ; GFX6-NEXT: v_mov_b32_e32 v8, s38
6964 ; GFX6-NEXT: v_mov_b32_e32 v9, s39
6965 ; GFX6-NEXT: s_lshr_b32 s38, s5, 1
6966 ; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
6967 ; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000
6968 ; GFX6-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:480
6969 ; GFX6-NEXT: s_waitcnt expcnt(0)
6970 ; GFX6-NEXT: v_mov_b32_e32 v10, s30
6971 ; GFX6-NEXT: v_mov_b32_e32 v11, s31
6972 ; GFX6-NEXT: s_lshr_b32 s30, s4, 30
6973 ; GFX6-NEXT: v_mov_b32_e32 v12, s34
6974 ; GFX6-NEXT: v_mov_b32_e32 v13, s35
6975 ; GFX6-NEXT: s_lshr_b32 s34, s4, 31
6976 ; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
6977 ; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
6978 ; GFX6-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:464
6979 ; GFX6-NEXT: s_waitcnt expcnt(0)
6980 ; GFX6-NEXT: v_mov_b32_e32 v14, s26
6981 ; GFX6-NEXT: v_mov_b32_e32 v15, s27
6982 ; GFX6-NEXT: s_lshr_b32 s26, s4, 28
6983 ; GFX6-NEXT: v_mov_b32_e32 v16, s28
6984 ; GFX6-NEXT: v_mov_b32_e32 v17, s29
6985 ; GFX6-NEXT: s_lshr_b32 s28, s4, 29
6986 ; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
6987 ; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
6988 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:448
6989 ; GFX6-NEXT: s_waitcnt expcnt(0)
6990 ; GFX6-NEXT: v_mov_b32_e32 v6, s22
6991 ; GFX6-NEXT: v_mov_b32_e32 v7, s23
6992 ; GFX6-NEXT: s_lshr_b32 s22, s4, 26
6993 ; GFX6-NEXT: v_mov_b32_e32 v8, s24
6994 ; GFX6-NEXT: v_mov_b32_e32 v9, s25
6995 ; GFX6-NEXT: s_lshr_b32 s24, s4, 27
6996 ; GFX6-NEXT: s_bfe_i64 s[54:55], s[20:21], 0x10000
6997 ; GFX6-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
6998 ; GFX6-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:432
6999 ; GFX6-NEXT: s_waitcnt expcnt(0)
7000 ; GFX6-NEXT: v_mov_b32_e32 v10, s18
7001 ; GFX6-NEXT: v_mov_b32_e32 v11, s19
7002 ; GFX6-NEXT: s_lshr_b32 s20, s4, 24
7003 ; GFX6-NEXT: v_mov_b32_e32 v12, s54
7004 ; GFX6-NEXT: v_mov_b32_e32 v13, s55
7005 ; GFX6-NEXT: s_lshr_b32 s18, s4, 25
7006 ; GFX6-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
7007 ; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
7008 ; GFX6-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:416
7009 ; GFX6-NEXT: s_waitcnt expcnt(0)
7010 ; GFX6-NEXT: v_mov_b32_e32 v14, s14
7011 ; GFX6-NEXT: v_mov_b32_e32 v15, s15
7012 ; GFX6-NEXT: s_lshr_b32 s14, s4, 22
7013 ; GFX6-NEXT: v_mov_b32_e32 v16, s16
7014 ; GFX6-NEXT: v_mov_b32_e32 v17, s17
7015 ; GFX6-NEXT: s_lshr_b32 s16, s4, 23
7016 ; GFX6-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
7017 ; GFX6-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
7018 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:400
7019 ; GFX6-NEXT: s_waitcnt expcnt(0)
7020 ; GFX6-NEXT: v_mov_b32_e32 v6, s10
7021 ; GFX6-NEXT: v_mov_b32_e32 v7, s11
7022 ; GFX6-NEXT: s_lshr_b32 s10, s4, 20
7023 ; GFX6-NEXT: v_mov_b32_e32 v8, s12
7024 ; GFX6-NEXT: v_mov_b32_e32 v9, s13
7025 ; GFX6-NEXT: s_lshr_b32 s12, s4, 21
7026 ; GFX6-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
7027 ; GFX6-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
7028 ; GFX6-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:384
7029 ; GFX6-NEXT: s_waitcnt expcnt(0)
7030 ; GFX6-NEXT: v_mov_b32_e32 v10, s6
7031 ; GFX6-NEXT: v_mov_b32_e32 v11, s7
7032 ; GFX6-NEXT: s_lshr_b32 s6, s4, 18
7033 ; GFX6-NEXT: v_mov_b32_e32 v12, s8
7034 ; GFX6-NEXT: v_mov_b32_e32 v13, s9
7035 ; GFX6-NEXT: s_lshr_b32 s8, s4, 19
7036 ; GFX6-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000
7037 ; GFX6-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000
7038 ; GFX6-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:368
7039 ; GFX6-NEXT: s_waitcnt expcnt(0)
7040 ; GFX6-NEXT: v_mov_b32_e32 v14, s50
7041 ; GFX6-NEXT: v_mov_b32_e32 v15, s51
7042 ; GFX6-NEXT: s_lshr_b32 s50, s4, 16
7043 ; GFX6-NEXT: v_mov_b32_e32 v16, s52
7044 ; GFX6-NEXT: v_mov_b32_e32 v17, s53
7045 ; GFX6-NEXT: s_lshr_b32 s52, s4, 17
7046 ; GFX6-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000
7047 ; GFX6-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000
7048 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:352
7049 ; GFX6-NEXT: s_waitcnt expcnt(0)
7050 ; GFX6-NEXT: v_mov_b32_e32 v6, s46
7051 ; GFX6-NEXT: v_mov_b32_e32 v7, s47
7052 ; GFX6-NEXT: s_lshr_b32 s46, s4, 14
7053 ; GFX6-NEXT: v_mov_b32_e32 v8, s48
7054 ; GFX6-NEXT: v_mov_b32_e32 v9, s49
7055 ; GFX6-NEXT: s_lshr_b32 s48, s4, 15
7056 ; GFX6-NEXT: s_bfe_i64 s[54:55], s[42:43], 0x10000
7057 ; GFX6-NEXT: s_bfe_i64 s[42:43], s[44:45], 0x10000
7058 ; GFX6-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:336
7059 ; GFX6-NEXT: s_waitcnt expcnt(0)
7060 ; GFX6-NEXT: v_mov_b32_e32 v10, s42
7061 ; GFX6-NEXT: v_mov_b32_e32 v11, s43
7062 ; GFX6-NEXT: s_lshr_b32 s42, s4, 12
7063 ; GFX6-NEXT: v_mov_b32_e32 v12, s54
7064 ; GFX6-NEXT: v_mov_b32_e32 v13, s55
7065 ; GFX6-NEXT: s_lshr_b32 s44, s4, 13
7066 ; GFX6-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000
7067 ; GFX6-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:320
7068 ; GFX6-NEXT: s_waitcnt expcnt(0)
7069 ; GFX6-NEXT: v_mov_b32_e32 v14, s40
7070 ; GFX6-NEXT: v_mov_b32_e32 v15, s41
7071 ; GFX6-NEXT: s_lshr_b32 s40, s4, 10
7072 ; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000
7073 ; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000
7074 ; GFX6-NEXT: v_mov_b32_e32 v16, s36
7075 ; GFX6-NEXT: v_mov_b32_e32 v17, s37
7076 ; GFX6-NEXT: s_lshr_b32 s36, s4, 11
7077 ; GFX6-NEXT: v_mov_b32_e32 v2, s38
7078 ; GFX6-NEXT: v_mov_b32_e32 v3, s39
7079 ; GFX6-NEXT: s_lshr_b32 s38, s4, 8
7080 ; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000
7081 ; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
7082 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:304
7083 ; GFX6-NEXT: s_waitcnt expcnt(0)
7084 ; GFX6-NEXT: v_mov_b32_e32 v6, s30
7085 ; GFX6-NEXT: v_mov_b32_e32 v7, s31
7086 ; GFX6-NEXT: s_lshr_b32 s30, s4, 9
7087 ; GFX6-NEXT: v_mov_b32_e32 v8, s34
7088 ; GFX6-NEXT: v_mov_b32_e32 v9, s35
7089 ; GFX6-NEXT: s_lshr_b32 s34, s4, 6
7090 ; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
7091 ; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
7092 ; GFX6-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:288
7093 ; GFX6-NEXT: s_waitcnt expcnt(0)
7094 ; GFX6-NEXT: v_mov_b32_e32 v10, s26
7095 ; GFX6-NEXT: v_mov_b32_e32 v11, s27
7096 ; GFX6-NEXT: s_lshr_b32 s26, s4, 7
7097 ; GFX6-NEXT: v_mov_b32_e32 v12, s28
7098 ; GFX6-NEXT: v_mov_b32_e32 v13, s29
7099 ; GFX6-NEXT: s_lshr_b32 s28, s4, 4
7100 ; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
7101 ; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
7102 ; GFX6-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:272
7103 ; GFX6-NEXT: s_waitcnt expcnt(0)
7104 ; GFX6-NEXT: v_mov_b32_e32 v14, s22
7105 ; GFX6-NEXT: v_mov_b32_e32 v15, s23
7106 ; GFX6-NEXT: s_lshr_b32 s22, s4, 5
7107 ; GFX6-NEXT: v_mov_b32_e32 v16, s24
7108 ; GFX6-NEXT: v_mov_b32_e32 v17, s25
7109 ; GFX6-NEXT: s_lshr_b32 s24, s4, 2
7110 ; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
7111 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:256
7112 ; GFX6-NEXT: s_waitcnt expcnt(0)
7113 ; GFX6-NEXT: v_mov_b32_e32 v0, s20
7114 ; GFX6-NEXT: v_mov_b32_e32 v1, s21
7115 ; GFX6-NEXT: s_lshr_b32 s20, s4, 3
7116 ; GFX6-NEXT: s_lshr_b32 s4, s4, 1
7117 ; GFX6-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x10000
7118 ; GFX6-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
7119 ; GFX6-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
7120 ; GFX6-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
7121 ; GFX6-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
7122 ; GFX6-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
7123 ; GFX6-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000
7124 ; GFX6-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
7125 ; GFX6-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000
7126 ; GFX6-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000
7127 ; GFX6-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000
7128 ; GFX6-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000
7129 ; GFX6-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000
7130 ; GFX6-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000
7131 ; GFX6-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000
7132 ; GFX6-NEXT: s_bfe_i64 s[52:53], s[52:53], 0x10000
7133 ; GFX6-NEXT: s_bfe_i64 s[50:51], s[50:51], 0x10000
7134 ; GFX6-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x10000
7135 ; GFX6-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x10000
7136 ; GFX6-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
7137 ; GFX6-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x10000
7138 ; GFX6-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
7139 ; GFX6-NEXT: s_bfe_i64 s[14:15], s[14:15], 0x10000
7140 ; GFX6-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
7141 ; GFX6-NEXT: buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:240
7142 ; GFX6-NEXT: buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:224
7143 ; GFX6-NEXT: buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:208
7144 ; GFX6-NEXT: v_mov_b32_e32 v2, s18
7145 ; GFX6-NEXT: v_mov_b32_e32 v3, s19
7146 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192
7147 ; GFX6-NEXT: s_waitcnt expcnt(0)
7148 ; GFX6-NEXT: v_mov_b32_e32 v0, s14
7149 ; GFX6-NEXT: v_mov_b32_e32 v1, s15
7150 ; GFX6-NEXT: v_mov_b32_e32 v2, s16
7151 ; GFX6-NEXT: v_mov_b32_e32 v3, s17
7152 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
7153 ; GFX6-NEXT: s_waitcnt expcnt(0)
7154 ; GFX6-NEXT: v_mov_b32_e32 v0, s10
7155 ; GFX6-NEXT: v_mov_b32_e32 v1, s11
7156 ; GFX6-NEXT: v_mov_b32_e32 v2, s12
7157 ; GFX6-NEXT: v_mov_b32_e32 v3, s13
7158 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
7159 ; GFX6-NEXT: s_waitcnt expcnt(0)
7160 ; GFX6-NEXT: v_mov_b32_e32 v0, s6
7161 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
7162 ; GFX6-NEXT: v_mov_b32_e32 v2, s8
7163 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
7164 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
7165 ; GFX6-NEXT: s_waitcnt expcnt(0)
7166 ; GFX6-NEXT: v_mov_b32_e32 v0, s50
7167 ; GFX6-NEXT: v_mov_b32_e32 v1, s51
7168 ; GFX6-NEXT: v_mov_b32_e32 v2, s52
7169 ; GFX6-NEXT: v_mov_b32_e32 v3, s53
7170 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
7171 ; GFX6-NEXT: s_waitcnt expcnt(0)
7172 ; GFX6-NEXT: v_mov_b32_e32 v0, s46
7173 ; GFX6-NEXT: v_mov_b32_e32 v1, s47
7174 ; GFX6-NEXT: v_mov_b32_e32 v2, s48
7175 ; GFX6-NEXT: v_mov_b32_e32 v3, s49
7176 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
7177 ; GFX6-NEXT: s_waitcnt expcnt(0)
7178 ; GFX6-NEXT: v_mov_b32_e32 v0, s42
7179 ; GFX6-NEXT: v_mov_b32_e32 v1, s43
7180 ; GFX6-NEXT: v_mov_b32_e32 v2, s44
7181 ; GFX6-NEXT: v_mov_b32_e32 v3, s45
7182 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
7183 ; GFX6-NEXT: s_waitcnt expcnt(0)
7184 ; GFX6-NEXT: v_mov_b32_e32 v0, s40
7185 ; GFX6-NEXT: v_mov_b32_e32 v1, s41
7186 ; GFX6-NEXT: v_mov_b32_e32 v2, s36
7187 ; GFX6-NEXT: v_mov_b32_e32 v3, s37
7188 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
7189 ; GFX6-NEXT: s_waitcnt expcnt(0)
7190 ; GFX6-NEXT: v_mov_b32_e32 v0, s38
7191 ; GFX6-NEXT: v_mov_b32_e32 v1, s39
7192 ; GFX6-NEXT: v_mov_b32_e32 v2, s30
7193 ; GFX6-NEXT: v_mov_b32_e32 v3, s31
7194 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
7195 ; GFX6-NEXT: s_waitcnt expcnt(0)
7196 ; GFX6-NEXT: v_mov_b32_e32 v0, s34
7197 ; GFX6-NEXT: v_mov_b32_e32 v1, s35
7198 ; GFX6-NEXT: v_mov_b32_e32 v2, s26
7199 ; GFX6-NEXT: v_mov_b32_e32 v3, s27
7200 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
7201 ; GFX6-NEXT: s_waitcnt expcnt(0)
7202 ; GFX6-NEXT: v_mov_b32_e32 v0, s28
7203 ; GFX6-NEXT: v_mov_b32_e32 v1, s29
7204 ; GFX6-NEXT: v_mov_b32_e32 v2, s22
7205 ; GFX6-NEXT: v_mov_b32_e32 v3, s23
7206 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
7207 ; GFX6-NEXT: s_waitcnt expcnt(0)
7208 ; GFX6-NEXT: v_mov_b32_e32 v0, s24
7209 ; GFX6-NEXT: v_mov_b32_e32 v1, s25
7210 ; GFX6-NEXT: v_mov_b32_e32 v2, s20
7211 ; GFX6-NEXT: v_mov_b32_e32 v3, s21
7212 ; GFX6-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
7213 ; GFX6-NEXT: v_mov_b32_e32 v6, s4
7214 ; GFX6-NEXT: v_mov_b32_e32 v7, s5
7215 ; GFX6-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0
7216 ; GFX6-NEXT: s_endpgm
7217 ;
7218 ; GFX8-LABEL: constant_sextload_v64i1_to_v64i64:
7219 ; GFX8: ; %bb.0:
7220 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
7221 ; GFX8-NEXT: s_mov_b32 s13, 0
7222 ; GFX8-NEXT: s_mov_b32 s11, s13
7223 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
7224 ; GFX8-NEXT: s_load_dwordx2 s[8:9], s[2:3], 0x0
7225 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
7226 ; GFX8-NEXT: s_lshr_b32 s16, s9, 22
7227 ; GFX8-NEXT: s_lshr_b32 s18, s9, 23
7228 ; GFX8-NEXT: s_lshr_b32 s20, s9, 20
7229 ; GFX8-NEXT: s_lshr_b32 s22, s9, 21
7230 ; GFX8-NEXT: s_lshr_b32 s24, s9, 18
7231 ; GFX8-NEXT: s_lshr_b32 s26, s9, 19
7232 ; GFX8-NEXT: s_lshr_b32 s28, s9, 16
7233 ; GFX8-NEXT: s_lshr_b32 s30, s9, 17
7234 ; GFX8-NEXT: s_lshr_b32 s34, s8, 22
7235 ; GFX8-NEXT: s_lshr_b32 s36, s8, 23
7236 ; GFX8-NEXT: s_lshr_b32 s38, s8, 20
7237 ; GFX8-NEXT: s_lshr_b32 s40, s8, 21
7238 ; GFX8-NEXT: s_lshr_b32 s42, s8, 18
7239 ; GFX8-NEXT: s_lshr_b32 s44, s8, 19
7240 ; GFX8-NEXT: s_lshr_b32 s46, s8, 16
7241 ; GFX8-NEXT: s_lshr_b32 s48, s8, 17
7242 ; GFX8-NEXT: s_mov_b32 s12, s9
7243 ; GFX8-NEXT: s_lshr_b32 s10, s9, 24
7244 ; GFX8-NEXT: s_lshr_b32 s6, s8, 24
7245 ; GFX8-NEXT: s_bfe_i64 s[2:3], s[6:7], 0x10000
7246 ; GFX8-NEXT: s_bfe_i64 s[4:5], s[10:11], 0x10000
7247 ; GFX8-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x10000
7248 ; GFX8-NEXT: s_bfe_i64 s[14:15], s[8:9], 0x10000
7249 ; GFX8-NEXT: s_bfe_i64 s[48:49], s[48:49], 0x10000
7250 ; GFX8-NEXT: s_bfe_i64 s[46:47], s[46:47], 0x10000
7251 ; GFX8-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x10000
7252 ; GFX8-NEXT: s_bfe_i64 s[42:43], s[42:43], 0x10000
7253 ; GFX8-NEXT: s_bfe_i64 s[40:41], s[40:41], 0x10000
7254 ; GFX8-NEXT: s_bfe_i64 s[38:39], s[38:39], 0x10000
7255 ; GFX8-NEXT: s_bfe_i64 s[36:37], s[36:37], 0x10000
7256 ; GFX8-NEXT: s_bfe_i64 s[34:35], s[34:35], 0x10000
7257 ; GFX8-NEXT: s_bfe_i64 s[30:31], s[30:31], 0x10000
7258 ; GFX8-NEXT: s_bfe_i64 s[28:29], s[28:29], 0x10000
7259 ; GFX8-NEXT: s_bfe_i64 s[26:27], s[26:27], 0x10000
7260 ; GFX8-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x10000
7261 ; GFX8-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x10000
7262 ; GFX8-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x10000
7263 ; GFX8-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x10000
7264 ; GFX8-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x10000
7265 ; GFX8-NEXT: v_mov_b32_e32 v11, s16
7266 ; GFX8-NEXT: s_add_u32 s16, s0, 0x1b0
7267 ; GFX8-NEXT: v_mov_b32_e32 v12, s17
7268 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7269 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7270 ; GFX8-NEXT: v_mov_b32_e32 v13, s18
7271 ; GFX8-NEXT: v_mov_b32_e32 v14, s19
7272 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7273 ; GFX8-NEXT: s_add_u32 s16, s0, 0x1a0
7274 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7275 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7276 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7277 ; GFX8-NEXT: v_mov_b32_e32 v11, s20
7278 ; GFX8-NEXT: v_mov_b32_e32 v12, s21
7279 ; GFX8-NEXT: v_mov_b32_e32 v13, s22
7280 ; GFX8-NEXT: v_mov_b32_e32 v14, s23
7281 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7282 ; GFX8-NEXT: s_add_u32 s16, s0, 0x190
7283 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7284 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7285 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7286 ; GFX8-NEXT: v_mov_b32_e32 v11, s24
7287 ; GFX8-NEXT: v_mov_b32_e32 v12, s25
7288 ; GFX8-NEXT: v_mov_b32_e32 v13, s26
7289 ; GFX8-NEXT: v_mov_b32_e32 v14, s27
7290 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7291 ; GFX8-NEXT: s_add_u32 s16, s0, 0x180
7292 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7293 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7294 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7295 ; GFX8-NEXT: v_mov_b32_e32 v11, s28
7296 ; GFX8-NEXT: v_mov_b32_e32 v12, s29
7297 ; GFX8-NEXT: v_mov_b32_e32 v13, s30
7298 ; GFX8-NEXT: v_mov_b32_e32 v14, s31
7299 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7300 ; GFX8-NEXT: s_add_u32 s16, s0, 0xb0
7301 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7302 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7303 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7304 ; GFX8-NEXT: v_mov_b32_e32 v11, s34
7305 ; GFX8-NEXT: v_mov_b32_e32 v12, s35
7306 ; GFX8-NEXT: v_mov_b32_e32 v13, s36
7307 ; GFX8-NEXT: v_mov_b32_e32 v14, s37
7308 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7309 ; GFX8-NEXT: s_add_u32 s16, s0, 0xa0
7310 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7311 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7312 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7313 ; GFX8-NEXT: v_mov_b32_e32 v11, s38
7314 ; GFX8-NEXT: v_mov_b32_e32 v12, s39
7315 ; GFX8-NEXT: v_mov_b32_e32 v13, s40
7316 ; GFX8-NEXT: v_mov_b32_e32 v14, s41
7317 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7318 ; GFX8-NEXT: s_add_u32 s16, s0, 0x90
7319 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7320 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7321 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7322 ; GFX8-NEXT: v_mov_b32_e32 v11, s42
7323 ; GFX8-NEXT: v_mov_b32_e32 v12, s43
7324 ; GFX8-NEXT: v_mov_b32_e32 v13, s44
7325 ; GFX8-NEXT: v_mov_b32_e32 v14, s45
7326 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7327 ; GFX8-NEXT: s_add_u32 s16, s0, 0x80
7328 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7329 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7330 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7331 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 14, s8
7332 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 15, s8
7333 ; GFX8-NEXT: v_mov_b32_e32 v11, s46
7334 ; GFX8-NEXT: v_mov_b32_e32 v12, s47
7335 ; GFX8-NEXT: v_mov_b32_e32 v13, s48
7336 ; GFX8-NEXT: v_mov_b32_e32 v14, s49
7337 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7338 ; GFX8-NEXT: s_add_u32 s16, s0, 0x70
7339 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[11:14]
7340 ; GFX8-NEXT: v_bfe_i32 v9, v9, 0, 1
7341 ; GFX8-NEXT: v_bfe_i32 v11, v10, 0, 1
7342 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7343 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7344 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 12, s8
7345 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 13, s8
7346 ; GFX8-NEXT: v_ashrrev_i32_e32 v12, 31, v11
7347 ; GFX8-NEXT: v_ashrrev_i32_e32 v10, 31, v9
7348 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7349 ; GFX8-NEXT: s_add_u32 s16, s0, 0x60
7350 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[9:12]
7351 ; GFX8-NEXT: v_bfe_i32 v7, v7, 0, 1
7352 ; GFX8-NEXT: v_bfe_i32 v9, v8, 0, 1
7353 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7354 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7355 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 10, s8
7356 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 11, s8
7357 ; GFX8-NEXT: v_ashrrev_i32_e32 v10, 31, v9
7358 ; GFX8-NEXT: v_ashrrev_i32_e32 v8, 31, v7
7359 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7360 ; GFX8-NEXT: s_add_u32 s16, s0, 0x50
7361 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[7:10]
7362 ; GFX8-NEXT: v_bfe_i32 v5, v5, 0, 1
7363 ; GFX8-NEXT: v_bfe_i32 v7, v6, 0, 1
7364 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7365 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7366 ; GFX8-NEXT: v_lshrrev_b16_e64 v3, 8, s8
7367 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 9, s8
7368 ; GFX8-NEXT: v_ashrrev_i32_e32 v8, 31, v7
7369 ; GFX8-NEXT: v_ashrrev_i32_e32 v6, 31, v5
7370 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7371 ; GFX8-NEXT: s_add_u32 s16, s0, 64
7372 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[5:8]
7373 ; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 1
7374 ; GFX8-NEXT: v_bfe_i32 v5, v4, 0, 1
7375 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7376 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7377 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 6, s8
7378 ; GFX8-NEXT: v_lshrrev_b16_e64 v2, 7, s8
7379 ; GFX8-NEXT: v_ashrrev_i32_e32 v6, 31, v5
7380 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
7381 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7382 ; GFX8-NEXT: s_add_u32 s16, s0, 48
7383 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[3:6]
7384 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 1
7385 ; GFX8-NEXT: v_bfe_i32 v3, v2, 0, 1
7386 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7387 ; GFX8-NEXT: v_mov_b32_e32 v15, s16
7388 ; GFX8-NEXT: v_ashrrev_i32_e32 v4, 31, v3
7389 ; GFX8-NEXT: v_ashrrev_i32_e32 v2, 31, v1
7390 ; GFX8-NEXT: v_mov_b32_e32 v16, s17
7391 ; GFX8-NEXT: s_add_u32 s16, s0, 32
7392 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 4, s8
7393 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 5, s8
7394 ; GFX8-NEXT: flat_store_dwordx4 v[15:16], v[1:4]
7395 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7396 ; GFX8-NEXT: v_mov_b32_e32 v16, s16
7397 ; GFX8-NEXT: v_bfe_i32 v2, v13, 0, 1
7398 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 1
7399 ; GFX8-NEXT: v_mov_b32_e32 v17, s17
7400 ; GFX8-NEXT: s_add_u32 s16, s0, 16
7401 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 2, s8
7402 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 3, s8
7403 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7404 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7405 ; GFX8-NEXT: s_addc_u32 s17, s1, 0
7406 ; GFX8-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
7407 ; GFX8-NEXT: v_mov_b32_e32 v18, s17
7408 ; GFX8-NEXT: v_bfe_i32 v2, v11, 0, 1
7409 ; GFX8-NEXT: v_bfe_i32 v0, v14, 0, 1
7410 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 1, s8
7411 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7412 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7413 ; GFX8-NEXT: v_mov_b32_e32 v17, s16
7414 ; GFX8-NEXT: flat_store_dwordx4 v[17:18], v[0:3]
7415 ; GFX8-NEXT: v_mov_b32_e32 v18, s1
7416 ; GFX8-NEXT: v_bfe_i32 v2, v12, 0, 1
7417 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 14, s9
7418 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 15, s9
7419 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7420 ; GFX8-NEXT: v_mov_b32_e32 v0, s14
7421 ; GFX8-NEXT: v_mov_b32_e32 v1, s15
7422 ; GFX8-NEXT: v_mov_b32_e32 v17, s0
7423 ; GFX8-NEXT: s_add_u32 s14, s0, 0x170
7424 ; GFX8-NEXT: flat_store_dwordx4 v[17:18], v[0:3]
7425 ; GFX8-NEXT: s_addc_u32 s15, s1, 0
7426 ; GFX8-NEXT: v_bfe_i32 v2, v10, 0, 1
7427 ; GFX8-NEXT: v_bfe_i32 v0, v9, 0, 1
7428 ; GFX8-NEXT: v_mov_b32_e32 v9, s14
7429 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 12, s9
7430 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 13, s9
7431 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7432 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7433 ; GFX8-NEXT: v_mov_b32_e32 v10, s15
7434 ; GFX8-NEXT: s_add_u32 s8, s0, 0x160
7435 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 10, s9
7436 ; GFX8-NEXT: v_lshrrev_b16_e64 v6, 11, s9
7437 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 8, s9
7438 ; GFX8-NEXT: v_lshrrev_b16_e64 v15, 9, s9
7439 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 6, s9
7440 ; GFX8-NEXT: v_lshrrev_b16_e64 v16, 7, s9
7441 ; GFX8-NEXT: v_lshrrev_b16_e64 v11, 4, s9
7442 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 5, s9
7443 ; GFX8-NEXT: v_lshrrev_b16_e64 v14, 2, s9
7444 ; GFX8-NEXT: flat_store_dwordx4 v[9:10], v[0:3]
7445 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 3, s9
7446 ; GFX8-NEXT: v_lshrrev_b16_e64 v10, 1, s9
7447 ; GFX8-NEXT: v_bfe_i32 v2, v8, 0, 1
7448 ; GFX8-NEXT: v_bfe_i32 v0, v7, 0, 1
7449 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7450 ; GFX8-NEXT: v_mov_b32_e32 v7, s8
7451 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7452 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7453 ; GFX8-NEXT: v_mov_b32_e32 v8, s9
7454 ; GFX8-NEXT: s_add_u32 s8, s0, 0x150
7455 ; GFX8-NEXT: flat_store_dwordx4 v[7:8], v[0:3]
7456 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7457 ; GFX8-NEXT: v_bfe_i32 v2, v6, 0, 1
7458 ; GFX8-NEXT: v_bfe_i32 v0, v5, 0, 1
7459 ; GFX8-NEXT: v_mov_b32_e32 v5, s8
7460 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7461 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7462 ; GFX8-NEXT: v_mov_b32_e32 v6, s9
7463 ; GFX8-NEXT: s_add_u32 s8, s0, 0x140
7464 ; GFX8-NEXT: flat_store_dwordx4 v[5:6], v[0:3]
7465 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7466 ; GFX8-NEXT: v_bfe_i32 v2, v15, 0, 1
7467 ; GFX8-NEXT: v_bfe_i32 v0, v4, 0, 1
7468 ; GFX8-NEXT: v_mov_b32_e32 v4, s8
7469 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7470 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7471 ; GFX8-NEXT: v_mov_b32_e32 v5, s9
7472 ; GFX8-NEXT: s_add_u32 s8, s0, 0x130
7473 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
7474 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7475 ; GFX8-NEXT: v_bfe_i32 v2, v16, 0, 1
7476 ; GFX8-NEXT: v_bfe_i32 v0, v13, 0, 1
7477 ; GFX8-NEXT: v_mov_b32_e32 v4, s8
7478 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7479 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7480 ; GFX8-NEXT: v_mov_b32_e32 v5, s9
7481 ; GFX8-NEXT: s_add_u32 s8, s0, 0x120
7482 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
7483 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7484 ; GFX8-NEXT: v_bfe_i32 v2, v12, 0, 1
7485 ; GFX8-NEXT: v_bfe_i32 v0, v11, 0, 1
7486 ; GFX8-NEXT: v_mov_b32_e32 v4, s8
7487 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7488 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7489 ; GFX8-NEXT: v_mov_b32_e32 v5, s9
7490 ; GFX8-NEXT: s_add_u32 s8, s0, 0x110
7491 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
7492 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7493 ; GFX8-NEXT: v_bfe_i32 v2, v9, 0, 1
7494 ; GFX8-NEXT: v_bfe_i32 v0, v14, 0, 1
7495 ; GFX8-NEXT: v_mov_b32_e32 v4, s8
7496 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7497 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7498 ; GFX8-NEXT: v_mov_b32_e32 v5, s9
7499 ; GFX8-NEXT: s_add_u32 s8, s0, 0x100
7500 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
7501 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7502 ; GFX8-NEXT: v_bfe_i32 v2, v10, 0, 1
7503 ; GFX8-NEXT: v_mov_b32_e32 v4, s8
7504 ; GFX8-NEXT: v_lshrrev_b16_e64 v7, 6, s10
7505 ; GFX8-NEXT: v_lshrrev_b16_e64 v8, 7, s10
7506 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7507 ; GFX8-NEXT: v_mov_b32_e32 v0, s12
7508 ; GFX8-NEXT: v_mov_b32_e32 v1, s13
7509 ; GFX8-NEXT: v_mov_b32_e32 v5, s9
7510 ; GFX8-NEXT: s_add_u32 s8, s0, 0x1f0
7511 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
7512 ; GFX8-NEXT: s_addc_u32 s9, s1, 0
7513 ; GFX8-NEXT: v_bfe_i32 v2, v8, 0, 1
7514 ; GFX8-NEXT: v_bfe_i32 v0, v7, 0, 1
7515 ; GFX8-NEXT: v_mov_b32_e32 v6, s8
7516 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7517 ; GFX8-NEXT: v_ashrrev_i32_e32 v1, 31, v0
7518 ; GFX8-NEXT: v_mov_b32_e32 v7, s9
7519 ; GFX8-NEXT: v_lshrrev_b16_e64 v17, 4, s10
7520 ; GFX8-NEXT: v_lshrrev_b16_e64 v18, 5, s10
7521 ; GFX8-NEXT: v_lshrrev_b16_e64 v13, 6, s6
7522 ; GFX8-NEXT: v_lshrrev_b16_e64 v12, 7, s6
7523 ; GFX8-NEXT: v_lshrrev_b16_e64 v15, 4, s6
7524 ; GFX8-NEXT: v_lshrrev_b16_e64 v9, 5, s6
7525 ; GFX8-NEXT: v_lshrrev_b16_e64 v4, 2, s6
7526 ; GFX8-NEXT: v_lshrrev_b16_e64 v5, 3, s6
7527 ; GFX8-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
7528 ; GFX8-NEXT: v_bfe_i32 v18, v18, 0, 1
7529 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 1, s6
7530 ; GFX8-NEXT: s_add_u32 s6, s0, 0x1e0
7531 ; GFX8-NEXT: v_bfe_i32 v2, v0, 0, 1
7532 ; GFX8-NEXT: v_bfe_i32 v16, v17, 0, 1
7533 ; GFX8-NEXT: s_addc_u32 s7, s1, 0
7534 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
7535 ; GFX8-NEXT: v_lshrrev_b16_e64 v20, 2, s10
7536 ; GFX8-NEXT: v_lshrrev_b16_e64 v21, 3, s10
7537 ; GFX8-NEXT: v_lshrrev_b16_e64 v22, 1, s10
7538 ; GFX8-NEXT: v_ashrrev_i32_e32 v19, 31, v18
7539 ; GFX8-NEXT: v_ashrrev_i32_e32 v17, 31, v16
7540 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
7541 ; GFX8-NEXT: s_add_u32 s6, s0, 0x1d0
7542 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
7543 ; GFX8-NEXT: v_bfe_i32 v20, v20, 0, 1
7544 ; GFX8-NEXT: v_bfe_i32 v18, v22, 0, 1
7545 ; GFX8-NEXT: v_bfe_i32 v22, v21, 0, 1
7546 ; GFX8-NEXT: s_addc_u32 s7, s1, 0
7547 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
7548 ; GFX8-NEXT: v_ashrrev_i32_e32 v23, 31, v22
7549 ; GFX8-NEXT: v_ashrrev_i32_e32 v21, 31, v20
7550 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
7551 ; GFX8-NEXT: v_mov_b32_e32 v16, s4
7552 ; GFX8-NEXT: s_add_u32 s4, s0, 0x1c0
7553 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[20:23]
7554 ; GFX8-NEXT: v_mov_b32_e32 v17, s5
7555 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
7556 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
7557 ; GFX8-NEXT: v_ashrrev_i32_e32 v19, 31, v18
7558 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
7559 ; GFX8-NEXT: s_add_u32 s4, s0, 0xf0
7560 ; GFX8-NEXT: v_bfe_i32 v14, v12, 0, 1
7561 ; GFX8-NEXT: v_bfe_i32 v12, v13, 0, 1
7562 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
7563 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
7564 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
7565 ; GFX8-NEXT: v_bfe_i32 v8, v15, 0, 1
7566 ; GFX8-NEXT: v_ashrrev_i32_e32 v15, 31, v14
7567 ; GFX8-NEXT: v_ashrrev_i32_e32 v13, 31, v12
7568 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
7569 ; GFX8-NEXT: s_add_u32 s4, s0, 0xe0
7570 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[12:15]
7571 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
7572 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
7573 ; GFX8-NEXT: v_bfe_i32 v10, v9, 0, 1
7574 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
7575 ; GFX8-NEXT: s_add_u32 s4, s0, 0xd0
7576 ; GFX8-NEXT: v_ashrrev_i32_e32 v11, 31, v10
7577 ; GFX8-NEXT: v_ashrrev_i32_e32 v9, 31, v8
7578 ; GFX8-NEXT: s_addc_u32 s5, s1, 0
7579 ; GFX8-NEXT: v_bfe_i32 v6, v5, 0, 1
7580 ; GFX8-NEXT: v_bfe_i32 v4, v4, 0, 1
7581 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
7582 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
7583 ; GFX8-NEXT: s_add_u32 s0, s0, 0xc0
7584 ; GFX8-NEXT: v_ashrrev_i32_e32 v7, 31, v6
7585 ; GFX8-NEXT: v_ashrrev_i32_e32 v5, 31, v4
7586 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
7587 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
7588 ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
7589 ; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v2
7590 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
7591 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
7592 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
7593 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
7594 ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
7595 ; GFX8-NEXT: s_endpgm
7596 ;
7597 ; EG-LABEL: constant_sextload_v64i1_to_v64i64:
7598 ; EG: ; %bb.0:
7599 ; EG-NEXT: ALU 22, @40, KC0[CB0:0-32], KC1[]
7600 ; EG-NEXT: TEX 0 @38
7601 ; EG-NEXT: ALU 89, @63, KC0[CB0:0-32], KC1[]
7602 ; EG-NEXT: ALU 99, @153, KC0[], KC1[]
7603 ; EG-NEXT: ALU 107, @253, KC0[CB0:0-32], KC1[]
7604 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T50.XYZW, T82.X, 0
7605 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T80.XYZW, T81.X, 0
7606 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T51.XYZW, T73.X, 0
7607 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T79.XYZW, T48.X, 0
7608 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T52.XYZW, T47.X, 0
7609 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T78.XYZW, T46.X, 0
7610 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T53.XYZW, T45.X, 0
7611 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T77.XYZW, T44.X, 0
7612 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T54.XYZW, T43.X, 0
7613 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T76.XYZW, T42.X, 0
7614 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T55.XYZW, T41.X, 0
7615 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T75.XYZW, T39.X, 0
7616 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T56.XYZW, T38.X, 0
7617 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T74.XYZW, T37.X, 0
7618 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T57.XYZW, T36.X, 0
7619 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T66.XYZW, T35.X, 0
7620 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T58.XYZW, T34.X, 0
7621 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T72.XYZW, T33.X, 0
7622 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T59.XYZW, T32.X, 0
7623 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T71.XYZW, T31.X, 0
7624 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T60.XYZW, T30.X, 0
7625 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T70.XYZW, T29.X, 0
7626 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T61.XYZW, T28.X, 0
7627 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T69.XYZW, T27.X, 0
7628 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T62.XYZW, T26.X, 0
7629 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T68.XYZW, T25.X, 0
7630 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T63.XYZW, T24.X, 0
7631 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T40.XYZW, T23.X, 0
7632 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T64.XYZW, T22.X, 0
7633 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T67.XYZW, T21.X, 0
7634 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T65.XYZW, T20.X, 0
7635 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T49.XYZW, T19.X, 1
7636 ; EG-NEXT: CF_END
7637 ; EG-NEXT: Fetch clause starting at 38:
7638 ; EG-NEXT: VTX_READ_64 T40.XY, T26.X, 0, #1
7639 ; EG-NEXT: ALU clause starting at 40:
7640 ; EG-NEXT: LSHR T19.X, KC0[2].Y, literal.x,
7641 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7642 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
7643 ; EG-NEXT: LSHR T20.X, PV.W, literal.x,
7644 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7645 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
7646 ; EG-NEXT: LSHR T21.X, PV.W, literal.x,
7647 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7648 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
7649 ; EG-NEXT: LSHR T22.X, PV.W, literal.x,
7650 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7651 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
7652 ; EG-NEXT: LSHR T23.X, PV.W, literal.x,
7653 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7654 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
7655 ; EG-NEXT: LSHR T24.X, PV.W, literal.x,
7656 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7657 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
7658 ; EG-NEXT: LSHR T25.X, PV.W, literal.x,
7659 ; EG-NEXT: MOV * T26.X, KC0[2].Z,
7660 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
7661 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
7662 ; EG-NEXT: 112(1.569454e-43), 0(0.000000e+00)
7663 ; EG-NEXT: ALU clause starting at 63:
7664 ; EG-NEXT: LSHR T26.X, T0.W, literal.x,
7665 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7666 ; EG-NEXT: 2(2.802597e-45), 128(1.793662e-43)
7667 ; EG-NEXT: LSHR T27.X, PV.W, literal.x,
7668 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7669 ; EG-NEXT: 2(2.802597e-45), 144(2.017870e-43)
7670 ; EG-NEXT: LSHR T28.X, PV.W, literal.x,
7671 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7672 ; EG-NEXT: 2(2.802597e-45), 160(2.242078e-43)
7673 ; EG-NEXT: LSHR T29.X, PV.W, literal.x,
7674 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7675 ; EG-NEXT: 2(2.802597e-45), 176(2.466285e-43)
7676 ; EG-NEXT: LSHR T30.X, PV.W, literal.x,
7677 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7678 ; EG-NEXT: 2(2.802597e-45), 192(2.690493e-43)
7679 ; EG-NEXT: LSHR T31.X, PV.W, literal.x,
7680 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7681 ; EG-NEXT: 2(2.802597e-45), 208(2.914701e-43)
7682 ; EG-NEXT: LSHR T32.X, PV.W, literal.x,
7683 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7684 ; EG-NEXT: 2(2.802597e-45), 224(3.138909e-43)
7685 ; EG-NEXT: LSHR T33.X, PV.W, literal.x,
7686 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7687 ; EG-NEXT: 2(2.802597e-45), 240(3.363116e-43)
7688 ; EG-NEXT: LSHR T34.X, PV.W, literal.x,
7689 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7690 ; EG-NEXT: 2(2.802597e-45), 256(3.587324e-43)
7691 ; EG-NEXT: LSHR T35.X, PV.W, literal.x,
7692 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7693 ; EG-NEXT: 2(2.802597e-45), 272(3.811532e-43)
7694 ; EG-NEXT: LSHR T36.X, PV.W, literal.x,
7695 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7696 ; EG-NEXT: 2(2.802597e-45), 288(4.035740e-43)
7697 ; EG-NEXT: LSHR T37.X, PV.W, literal.x,
7698 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7699 ; EG-NEXT: 2(2.802597e-45), 304(4.259947e-43)
7700 ; EG-NEXT: LSHR T38.X, PV.W, literal.x,
7701 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7702 ; EG-NEXT: 2(2.802597e-45), 320(4.484155e-43)
7703 ; EG-NEXT: LSHR T39.X, PV.W, literal.x,
7704 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7705 ; EG-NEXT: 2(2.802597e-45), 336(4.708363e-43)
7706 ; EG-NEXT: LSHR T41.X, PV.W, literal.x,
7707 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
7708 ; EG-NEXT: 2(2.802597e-45), 352(4.932571e-43)
7709 ; EG-NEXT: LSHR T42.X, PV.W, literal.x,
7710 ; EG-NEXT: LSHR T0.Z, T40.Y, literal.y,
7711 ; EG-NEXT: LSHR T0.W, T40.Y, literal.z,
7712 ; EG-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.w,
7713 ; EG-NEXT: 2(2.802597e-45), 28(3.923636e-44)
7714 ; EG-NEXT: 29(4.063766e-44), 368(5.156778e-43)
7715 ; EG-NEXT: LSHR T43.X, PS, literal.x,
7716 ; EG-NEXT: LSHR T0.Y, T40.Y, literal.y,
7717 ; EG-NEXT: LSHR T1.Z, T40.Y, literal.z,
7718 ; EG-NEXT: LSHR * T1.W, T40.Y, literal.w,
7719 ; EG-NEXT: 2(2.802597e-45), 24(3.363116e-44)
7720 ; EG-NEXT: 25(3.503246e-44), 20(2.802597e-44)
7721 ; EG-NEXT: ADD_INT * T2.W, KC0[2].Y, literal.x,
7722 ; EG-NEXT: 384(5.380986e-43), 0(0.000000e+00)
7723 ; EG-NEXT: LSHR T44.X, PV.W, literal.x,
7724 ; EG-NEXT: LSHR T1.Y, T40.Y, literal.y,
7725 ; EG-NEXT: LSHR T2.Z, T40.Y, literal.z,
7726 ; EG-NEXT: LSHR * T2.W, T40.Y, literal.w,
7727 ; EG-NEXT: 2(2.802597e-45), 21(2.942727e-44)
7728 ; EG-NEXT: 16(2.242078e-44), 17(2.382207e-44)
7729 ; EG-NEXT: ADD_INT * T3.W, KC0[2].Y, literal.x,
7730 ; EG-NEXT: 400(5.605194e-43), 0(0.000000e+00)
7731 ; EG-NEXT: LSHR T45.X, PV.W, literal.x,
7732 ; EG-NEXT: LSHR T2.Y, T40.Y, literal.y,
7733 ; EG-NEXT: LSHR T3.Z, T40.Y, literal.z,
7734 ; EG-NEXT: LSHR * T3.W, T40.Y, literal.w,
7735 ; EG-NEXT: 2(2.802597e-45), 12(1.681558e-44)
7736 ; EG-NEXT: 13(1.821688e-44), 8(1.121039e-44)
7737 ; EG-NEXT: ADD_INT * T4.W, KC0[2].Y, literal.x,
7738 ; EG-NEXT: 416(5.829402e-43), 0(0.000000e+00)
7739 ; EG-NEXT: LSHR T46.X, PV.W, literal.x,
7740 ; EG-NEXT: LSHR T3.Y, T40.Y, literal.y,
7741 ; EG-NEXT: LSHR T4.Z, T40.Y, literal.z,
7742 ; EG-NEXT: LSHR * T4.W, T40.Y, literal.w,
7743 ; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)
7744 ; EG-NEXT: 4(5.605194e-45), 5(7.006492e-45)
7745 ; EG-NEXT: ADD_INT * T5.W, KC0[2].Y, literal.x,
7746 ; EG-NEXT: 432(6.053609e-43), 0(0.000000e+00)
7747 ; EG-NEXT: LSHR T47.X, PV.W, literal.x,
7748 ; EG-NEXT: ADD_INT T4.Y, KC0[2].Y, literal.y,
7749 ; EG-NEXT: LSHR T5.Z, T40.Y, 1,
7750 ; EG-NEXT: LSHR T5.W, T40.X, literal.z,
7751 ; EG-NEXT: ADD_INT * T6.W, KC0[2].Y, literal.w,
7752 ; EG-NEXT: 2(2.802597e-45), 464(6.502025e-43)
7753 ; EG-NEXT: 28(3.923636e-44), 448(6.277817e-43)
7754 ; EG-NEXT: ALU clause starting at 153:
7755 ; EG-NEXT: LSHR T48.X, T6.W, literal.x,
7756 ; EG-NEXT: LSHR T5.Y, T40.X, literal.y,
7757 ; EG-NEXT: LSHR T6.Z, T40.X, literal.z,
7758 ; EG-NEXT: LSHR * T6.W, T40.X, literal.w,
7759 ; EG-NEXT: 2(2.802597e-45), 29(4.063766e-44)
7760 ; EG-NEXT: 24(3.363116e-44), 25(3.503246e-44)
7761 ; EG-NEXT: LSHR * T7.W, T40.X, literal.x,
7762 ; EG-NEXT: 20(2.802597e-44), 0(0.000000e+00)
7763 ; EG-NEXT: BFE_INT T49.X, T40.X, 0.0, 1,
7764 ; EG-NEXT: LSHR T6.Y, T40.X, literal.x,
7765 ; EG-NEXT: ASHR T50.Z, T40.Y, literal.y,
7766 ; EG-NEXT: LSHR T8.W, T40.Y, literal.z,
7767 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.w,
7768 ; EG-NEXT: 21(2.942727e-44), 31(4.344025e-44)
7769 ; EG-NEXT: 27(3.783506e-44), 30(4.203895e-44)
7770 ; EG-NEXT: BFE_INT T50.X, PS, 0.0, 1,
7771 ; EG-NEXT: LSHR T7.Y, T40.X, literal.x,
7772 ; EG-NEXT: BFE_INT T51.Z, PV.W, 0.0, 1,
7773 ; EG-NEXT: LSHR T8.W, T40.Y, literal.y,
7774 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.z,
7775 ; EG-NEXT: 16(2.242078e-44), 23(3.222986e-44)
7776 ; EG-NEXT: 26(3.643376e-44), 0(0.000000e+00)
7777 ; EG-NEXT: BFE_INT T51.X, PS, 0.0, 1,
7778 ; EG-NEXT: MOV T50.Y, PV.X,
7779 ; EG-NEXT: BFE_INT T52.Z, PV.W, 0.0, 1,
7780 ; EG-NEXT: LSHR T8.W, T40.Y, literal.x,
7781 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.y,
7782 ; EG-NEXT: 19(2.662467e-44), 22(3.082857e-44)
7783 ; EG-NEXT: BFE_INT T52.X, PS, 0.0, 1,
7784 ; EG-NEXT: MOV T51.Y, PV.X,
7785 ; EG-NEXT: BFE_INT T53.Z, PV.W, 0.0, 1,
7786 ; EG-NEXT: LSHR T8.W, T40.Y, literal.x,
7787 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.y,
7788 ; EG-NEXT: 15(2.101948e-44), 18(2.522337e-44)
7789 ; EG-NEXT: BFE_INT T53.X, PS, 0.0, 1,
7790 ; EG-NEXT: MOV T52.Y, PV.X,
7791 ; EG-NEXT: BFE_INT T54.Z, PV.W, 0.0, 1,
7792 ; EG-NEXT: LSHR T8.W, T40.Y, literal.x,
7793 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.y,
7794 ; EG-NEXT: 11(1.541428e-44), 14(1.961818e-44)
7795 ; EG-NEXT: BFE_INT T54.X, PS, 0.0, 1,
7796 ; EG-NEXT: MOV T53.Y, PV.X,
7797 ; EG-NEXT: BFE_INT T55.Z, PV.W, 0.0, 1,
7798 ; EG-NEXT: LSHR T8.W, T40.Y, literal.x,
7799 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.y,
7800 ; EG-NEXT: 7(9.809089e-45), 10(1.401298e-44)
7801 ; EG-NEXT: BFE_INT T55.X, PS, 0.0, 1,
7802 ; EG-NEXT: MOV T54.Y, PV.X,
7803 ; EG-NEXT: BFE_INT T56.Z, PV.W, 0.0, 1,
7804 ; EG-NEXT: LSHR T8.W, T40.Y, literal.x,
7805 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.y,
7806 ; EG-NEXT: 3(4.203895e-45), 6(8.407791e-45)
7807 ; EG-NEXT: BFE_INT T56.X, PS, 0.0, 1,
7808 ; EG-NEXT: MOV T55.Y, PV.X,
7809 ; EG-NEXT: BFE_INT T57.Z, PV.W, 0.0, 1,
7810 ; EG-NEXT: LSHR T8.W, T40.X, literal.x,
7811 ; EG-NEXT: LSHR * T9.W, T40.Y, literal.y,
7812 ; EG-NEXT: 17(2.382207e-44), 2(2.802597e-45)
7813 ; EG-NEXT: BFE_INT T57.X, PS, 0.0, 1,
7814 ; EG-NEXT: MOV T56.Y, PV.X,
7815 ; EG-NEXT: ASHR T58.Z, T40.X, literal.x,
7816 ; EG-NEXT: LSHR T9.W, T40.X, literal.y,
7817 ; EG-NEXT: LSHR * T10.W, T40.X, literal.z,
7818 ; EG-NEXT: 31(4.344025e-44), 27(3.783506e-44)
7819 ; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)
7820 ; EG-NEXT: BFE_INT T58.X, PS, 0.0, 1,
7821 ; EG-NEXT: MOV T57.Y, PV.X,
7822 ; EG-NEXT: BFE_INT T59.Z, PV.W, 0.0, 1,
7823 ; EG-NEXT: LSHR T9.W, T40.X, literal.x,
7824 ; EG-NEXT: LSHR * T10.W, T40.X, literal.y,
7825 ; EG-NEXT: 23(3.222986e-44), 26(3.643376e-44)
7826 ; EG-NEXT: BFE_INT T59.X, PS, 0.0, 1,
7827 ; EG-NEXT: MOV T58.Y, PV.X,
7828 ; EG-NEXT: BFE_INT T60.Z, PV.W, 0.0, 1,
7829 ; EG-NEXT: LSHR T9.W, T40.X, literal.x,
7830 ; EG-NEXT: LSHR * T10.W, T40.X, literal.y,
7831 ; EG-NEXT: 19(2.662467e-44), 22(3.082857e-44)
7832 ; EG-NEXT: BFE_INT T60.X, PS, 0.0, 1,
7833 ; EG-NEXT: MOV T59.Y, PV.X,
7834 ; EG-NEXT: BFE_INT T61.Z, PV.W, 0.0, 1,
7835 ; EG-NEXT: LSHR T9.W, T40.X, literal.x,
7836 ; EG-NEXT: LSHR * T10.W, T40.X, literal.y,
7837 ; EG-NEXT: 15(2.101948e-44), 18(2.522337e-44)
7838 ; EG-NEXT: BFE_INT T61.X, PS, 0.0, 1,
7839 ; EG-NEXT: MOV T60.Y, PV.X,
7840 ; EG-NEXT: BFE_INT T62.Z, PV.W, 0.0, 1,
7841 ; EG-NEXT: LSHR T9.W, T40.X, literal.x,
7842 ; EG-NEXT: LSHR * T10.W, T40.X, literal.y,
7843 ; EG-NEXT: 11(1.541428e-44), 14(1.961818e-44)
7844 ; EG-NEXT: BFE_INT T62.X, PS, 0.0, 1,
7845 ; EG-NEXT: MOV T61.Y, PV.X,
7846 ; EG-NEXT: BFE_INT T63.Z, PV.W, 0.0, 1,
7847 ; EG-NEXT: LSHR T9.W, T40.X, literal.x,
7848 ; EG-NEXT: LSHR * T10.W, T40.X, literal.y,
7849 ; EG-NEXT: 7(9.809089e-45), 10(1.401298e-44)
7850 ; EG-NEXT: BFE_INT T63.X, PS, 0.0, 1,
7851 ; EG-NEXT: MOV T62.Y, PV.X,
7852 ; EG-NEXT: BFE_INT T64.Z, PV.W, 0.0, 1,
7853 ; EG-NEXT: LSHR * T9.W, T40.X, literal.x,
7854 ; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)
7855 ; EG-NEXT: ALU clause starting at 253:
7856 ; EG-NEXT: LSHR * T10.W, T40.X, literal.x,
7857 ; EG-NEXT: 6(8.407791e-45), 0(0.000000e+00)
7858 ; EG-NEXT: BFE_INT T64.X, PV.W, 0.0, 1,
7859 ; EG-NEXT: MOV T63.Y, T63.X,
7860 ; EG-NEXT: BFE_INT T65.Z, T9.W, 0.0, 1,
7861 ; EG-NEXT: LSHR T9.W, T40.X, 1, BS:VEC_120/SCL_212
7862 ; EG-NEXT: LSHR * T10.W, T40.X, literal.x,
7863 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
7864 ; EG-NEXT: BFE_INT T65.X, PS, 0.0, 1,
7865 ; EG-NEXT: MOV T64.Y, PV.X,
7866 ; EG-NEXT: BFE_INT T49.Z, PV.W, 0.0, 1,
7867 ; EG-NEXT: LSHR T9.W, T40.X, literal.x,
7868 ; EG-NEXT: LSHR * T10.W, T40.X, literal.y,
7869 ; EG-NEXT: 12(1.681558e-44), 5(7.006492e-45)
7870 ; EG-NEXT: BFE_INT T66.X, T40.Y, 0.0, 1,
7871 ; EG-NEXT: MOV T65.Y, PV.X,
7872 ; EG-NEXT: BFE_INT T67.Z, PS, 0.0, 1,
7873 ; EG-NEXT: LSHR T10.W, T40.X, literal.x,
7874 ; EG-NEXT: LSHR * T11.W, T40.X, literal.y,
7875 ; EG-NEXT: 9(1.261169e-44), 4(5.605194e-45)
7876 ; EG-NEXT: BFE_INT T67.X, PS, 0.0, 1,
7877 ; EG-NEXT: MOV T49.Y, T49.X,
7878 ; EG-NEXT: BFE_INT T40.Z, PV.W, 0.0, 1,
7879 ; EG-NEXT: LSHR T10.W, T40.X, literal.x, BS:VEC_120/SCL_212
7880 ; EG-NEXT: LSHR * T11.W, T40.X, literal.y,
7881 ; EG-NEXT: 13(1.821688e-44), 8(1.121039e-44)
7882 ; EG-NEXT: BFE_INT T40.X, PS, 0.0, 1,
7883 ; EG-NEXT: MOV T67.Y, PV.X,
7884 ; EG-NEXT: BFE_INT T68.Z, PV.W, 0.0, 1,
7885 ; EG-NEXT: MOV T49.W, T49.Z,
7886 ; EG-NEXT: MOV * T65.W, T65.Z,
7887 ; EG-NEXT: BFE_INT T68.X, T9.W, 0.0, 1,
7888 ; EG-NEXT: MOV T40.Y, PV.X,
7889 ; EG-NEXT: BFE_INT T69.Z, T8.W, 0.0, 1, BS:VEC_120/SCL_212
7890 ; EG-NEXT: MOV T67.W, T67.Z,
7891 ; EG-NEXT: MOV * T64.W, T64.Z,
7892 ; EG-NEXT: BFE_INT T69.X, T7.Y, 0.0, 1,
7893 ; EG-NEXT: MOV T68.Y, PV.X,
7894 ; EG-NEXT: BFE_INT T70.Z, T6.Y, 0.0, 1, BS:VEC_120/SCL_212
7895 ; EG-NEXT: MOV T40.W, T40.Z,
7896 ; EG-NEXT: MOV * T63.W, T63.Z,
7897 ; EG-NEXT: BFE_INT T70.X, T7.W, 0.0, 1,
7898 ; EG-NEXT: MOV T69.Y, PV.X,
7899 ; EG-NEXT: BFE_INT T71.Z, T6.W, 0.0, 1, BS:VEC_120/SCL_212
7900 ; EG-NEXT: MOV T68.W, T68.Z,
7901 ; EG-NEXT: MOV * T62.W, T62.Z,
7902 ; EG-NEXT: BFE_INT T71.X, T6.Z, 0.0, 1,
7903 ; EG-NEXT: MOV T70.Y, PV.X,
7904 ; EG-NEXT: BFE_INT T72.Z, T5.Y, 0.0, 1,
7905 ; EG-NEXT: MOV T69.W, T69.Z, BS:VEC_120/SCL_212
7906 ; EG-NEXT: MOV * T61.W, T61.Z,
7907 ; EG-NEXT: BFE_INT T72.X, T5.W, 0.0, 1,
7908 ; EG-NEXT: MOV T71.Y, PV.X,
7909 ; EG-NEXT: BFE_INT T66.Z, T5.Z, 0.0, 1,
7910 ; EG-NEXT: MOV T70.W, T70.Z, BS:VEC_120/SCL_212
7911 ; EG-NEXT: MOV * T60.W, T60.Z,
7912 ; EG-NEXT: LSHR T73.X, T4.Y, literal.x,
7913 ; EG-NEXT: MOV T72.Y, PV.X,
7914 ; EG-NEXT: BFE_INT T74.Z, T4.W, 0.0, 1,
7915 ; EG-NEXT: MOV T71.W, T71.Z,
7916 ; EG-NEXT: MOV * T59.W, T59.Z,
7917 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
7918 ; EG-NEXT: BFE_INT T74.X, T4.Z, 0.0, 1,
7919 ; EG-NEXT: MOV T66.Y, T66.X,
7920 ; EG-NEXT: BFE_INT T75.Z, T3.Y, 0.0, 1,
7921 ; EG-NEXT: MOV T72.W, T72.Z, BS:VEC_120/SCL_212
7922 ; EG-NEXT: MOV * T58.W, T58.Z,
7923 ; EG-NEXT: BFE_INT T75.X, T3.W, 0.0, 1,
7924 ; EG-NEXT: MOV T74.Y, PV.X,
7925 ; EG-NEXT: BFE_INT T76.Z, T3.Z, 0.0, 1,
7926 ; EG-NEXT: MOV T66.W, T66.Z, BS:VEC_120/SCL_212
7927 ; EG-NEXT: MOV * T57.W, T57.Z,
7928 ; EG-NEXT: BFE_INT T76.X, T2.Y, 0.0, 1,
7929 ; EG-NEXT: MOV T75.Y, PV.X,
7930 ; EG-NEXT: BFE_INT T77.Z, T2.W, 0.0, 1,
7931 ; EG-NEXT: MOV T74.W, T74.Z,
7932 ; EG-NEXT: MOV * T56.W, T56.Z,
7933 ; EG-NEXT: BFE_INT T77.X, T2.Z, 0.0, 1,
7934 ; EG-NEXT: MOV T76.Y, PV.X,
7935 ; EG-NEXT: BFE_INT T78.Z, T1.Y, 0.0, 1,
7936 ; EG-NEXT: MOV T75.W, T75.Z, BS:VEC_120/SCL_212
7937 ; EG-NEXT: MOV * T55.W, T55.Z,
7938 ; EG-NEXT: BFE_INT T78.X, T1.W, 0.0, 1,
7939 ; EG-NEXT: MOV T77.Y, PV.X,
7940 ; EG-NEXT: BFE_INT T79.Z, T1.Z, 0.0, 1,
7941 ; EG-NEXT: MOV T76.W, T76.Z, BS:VEC_120/SCL_212
7942 ; EG-NEXT: MOV * T54.W, T54.Z,
7943 ; EG-NEXT: BFE_INT T79.X, T0.Y, 0.0, 1,
7944 ; EG-NEXT: MOV T78.Y, PV.X,
7945 ; EG-NEXT: BFE_INT T80.Z, T0.W, 0.0, 1,
7946 ; EG-NEXT: MOV T77.W, T77.Z,
7947 ; EG-NEXT: MOV * T53.W, T53.Z,
7948 ; EG-NEXT: BFE_INT T80.X, T0.Z, 0.0, 1,
7949 ; EG-NEXT: MOV T79.Y, PV.X,
7950 ; EG-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.x,
7951 ; EG-NEXT: MOV T78.W, T78.Z, BS:VEC_120/SCL_212
7952 ; EG-NEXT: MOV * T52.W, T52.Z,
7953 ; EG-NEXT: 480(6.726233e-43), 0(0.000000e+00)
7954 ; EG-NEXT: LSHR T81.X, PV.Z, literal.x,
7955 ; EG-NEXT: MOV T80.Y, PV.X,
7956 ; EG-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.y,
7957 ; EG-NEXT: MOV T79.W, T79.Z,
7958 ; EG-NEXT: MOV * T51.W, T51.Z,
7959 ; EG-NEXT: 2(2.802597e-45), 496(6.950440e-43)
7960 ; EG-NEXT: LSHR T82.X, PV.Z, literal.x,
7961 ; EG-NEXT: MOV T80.W, T80.Z,
7962 ; EG-NEXT: MOV * T50.W, T50.Z,
7963 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
7964 %load = load <64 x i1>, ptr addrspace(4) %in
7965 %ext = sext <64 x i1> %load to <64 x i64>
7966 store <64 x i64> %ext, ptr addrspace(1) %out
7967 ret void
7968 }
7970 attributes #0 = { nounwind }