| blob | d59660751cc1878fdd330c57273b4cb6f9f6883e |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx600 | FileCheck %s --check-prefix=GCN
3 ; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global | FileCheck %s --check-prefix=TONGA
4 ; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global | FileCheck %s --check-prefix=GFX9
5 ; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG
7 ; The code generated by sdiv is long and complex and may frequently change.
8 ; The goal of this test is to make sure the ISel doesn't fail.
9 ;
10 ; This program was previously failing to compile when one of the selectcc
11 ; opcodes generated by the sdiv lowering was being legalized and optimized to:
12 ; selectcc Remainder -1, 0, -1, SETGT
13 ; This was fixed by adding an additional pattern in R600Instructions.td to
14 ; match this pattern with a CNDGE_INT.
16 define amdgpu_kernel void @sdiv_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
17 ; GCN-LABEL: sdiv_i32:
18 ; GCN: ; %bb.0:
19 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
20 ; GCN-NEXT: s_mov_b32 s3, 0xf000
21 ; GCN-NEXT: s_mov_b32 s2, -1
22 ; GCN-NEXT: s_mov_b32 s10, s2
23 ; GCN-NEXT: s_mov_b32 s11, s3
24 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
25 ; GCN-NEXT: s_mov_b32 s8, s6
26 ; GCN-NEXT: s_mov_b32 s9, s7
27 ; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
28 ; GCN-NEXT: s_mov_b32 s0, s4
29 ; GCN-NEXT: s_mov_b32 s1, s5
30 ; GCN-NEXT: s_waitcnt vmcnt(0)
31 ; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v1
32 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v2
33 ; GCN-NEXT: v_xor_b32_e32 v1, v1, v2
34 ; GCN-NEXT: v_cvt_f32_u32_e32 v3, v1
35 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v1
36 ; GCN-NEXT: v_ashrrev_i32_e32 v5, 31, v0
37 ; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v3
38 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v5
39 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v5
40 ; GCN-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3
41 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
42 ; GCN-NEXT: v_xor_b32_e32 v2, v5, v2
43 ; GCN-NEXT: v_mul_lo_u32 v4, v4, v3
44 ; GCN-NEXT: v_mul_hi_u32 v4, v3, v4
45 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v4
46 ; GCN-NEXT: v_mul_hi_u32 v3, v0, v3
47 ; GCN-NEXT: v_mul_lo_u32 v4, v3, v1
48 ; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v3
49 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v4
50 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, v0, v1
51 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1
52 ; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
53 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
54 ; GCN-NEXT: v_add_i32_e32 v4, vcc, 1, v3
55 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1
56 ; GCN-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc
57 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v2
58 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
59 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
60 ; GCN-NEXT: s_endpgm
61 ;
62 ; TONGA-LABEL: sdiv_i32:
63 ; TONGA: ; %bb.0:
64 ; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
65 ; TONGA-NEXT: s_mov_b32 s3, 0xf000
66 ; TONGA-NEXT: s_mov_b32 s2, -1
67 ; TONGA-NEXT: s_mov_b32 s10, s2
68 ; TONGA-NEXT: s_mov_b32 s11, s3
69 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
70 ; TONGA-NEXT: s_mov_b32 s8, s6
71 ; TONGA-NEXT: s_mov_b32 s9, s7
72 ; TONGA-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
73 ; TONGA-NEXT: s_mov_b32 s0, s4
74 ; TONGA-NEXT: s_mov_b32 s1, s5
75 ; TONGA-NEXT: s_waitcnt vmcnt(0)
76 ; TONGA-NEXT: v_ashrrev_i32_e32 v2, 31, v1
77 ; TONGA-NEXT: v_add_u32_e32 v1, vcc, v1, v2
78 ; TONGA-NEXT: v_xor_b32_e32 v1, v1, v2
79 ; TONGA-NEXT: v_cvt_f32_u32_e32 v3, v1
80 ; TONGA-NEXT: v_sub_u32_e32 v4, vcc, 0, v1
81 ; TONGA-NEXT: v_ashrrev_i32_e32 v5, 31, v0
82 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v3, v3
83 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v5
84 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v5
85 ; TONGA-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3
86 ; TONGA-NEXT: v_cvt_u32_f32_e32 v3, v3
87 ; TONGA-NEXT: v_xor_b32_e32 v2, v5, v2
88 ; TONGA-NEXT: v_mul_lo_u32 v4, v4, v3
89 ; TONGA-NEXT: v_mul_hi_u32 v4, v3, v4
90 ; TONGA-NEXT: v_add_u32_e32 v3, vcc, v3, v4
91 ; TONGA-NEXT: v_mul_hi_u32 v3, v0, v3
92 ; TONGA-NEXT: v_mul_lo_u32 v4, v3, v1
93 ; TONGA-NEXT: v_add_u32_e32 v5, vcc, 1, v3
94 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v4
95 ; TONGA-NEXT: v_sub_u32_e32 v4, vcc, v0, v1
96 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1
97 ; TONGA-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
98 ; TONGA-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
99 ; TONGA-NEXT: v_add_u32_e32 v4, vcc, 1, v3
100 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1
101 ; TONGA-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc
102 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v2
103 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v2
104 ; TONGA-NEXT: buffer_store_dword v0, off, s[0:3], 0
105 ; TONGA-NEXT: s_endpgm
106 ;
107 ; GFX9-LABEL: sdiv_i32:
108 ; GFX9: ; %bb.0:
109 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
110 ; GFX9-NEXT: s_mov_b32 s3, 0xf000
111 ; GFX9-NEXT: s_mov_b32 s2, -1
112 ; GFX9-NEXT: s_mov_b32 s10, s2
113 ; GFX9-NEXT: s_mov_b32 s11, s3
114 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
115 ; GFX9-NEXT: s_mov_b32 s8, s6
116 ; GFX9-NEXT: s_mov_b32 s9, s7
117 ; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
118 ; GFX9-NEXT: s_mov_b32 s1, s5
119 ; GFX9-NEXT: s_waitcnt vmcnt(0)
120 ; GFX9-NEXT: v_readfirstlane_b32 s0, v1
121 ; GFX9-NEXT: s_ashr_i32 s6, s0, 31
122 ; GFX9-NEXT: s_add_i32 s0, s0, s6
123 ; GFX9-NEXT: s_xor_b32 s7, s0, s6
124 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s7
125 ; GFX9-NEXT: s_mov_b32 s0, s4
126 ; GFX9-NEXT: v_readfirstlane_b32 s4, v0
127 ; GFX9-NEXT: s_ashr_i32 s5, s4, 31
128 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v1, v1
129 ; GFX9-NEXT: s_add_i32 s4, s4, s5
130 ; GFX9-NEXT: s_xor_b32 s6, s5, s6
131 ; GFX9-NEXT: s_xor_b32 s4, s4, s5
132 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v1
133 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
134 ; GFX9-NEXT: s_sub_i32 s5, 0, s7
135 ; GFX9-NEXT: v_readfirstlane_b32 s8, v0
136 ; GFX9-NEXT: s_mul_i32 s5, s5, s8
137 ; GFX9-NEXT: s_mul_hi_u32 s5, s8, s5
138 ; GFX9-NEXT: s_add_i32 s8, s8, s5
139 ; GFX9-NEXT: s_mul_hi_u32 s5, s4, s8
140 ; GFX9-NEXT: s_mul_i32 s8, s5, s7
141 ; GFX9-NEXT: s_sub_i32 s4, s4, s8
142 ; GFX9-NEXT: s_add_i32 s9, s5, 1
143 ; GFX9-NEXT: s_sub_i32 s8, s4, s7
144 ; GFX9-NEXT: s_cmp_ge_u32 s4, s7
145 ; GFX9-NEXT: s_cselect_b32 s5, s9, s5
146 ; GFX9-NEXT: s_cselect_b32 s4, s8, s4
147 ; GFX9-NEXT: s_add_i32 s8, s5, 1
148 ; GFX9-NEXT: s_cmp_ge_u32 s4, s7
149 ; GFX9-NEXT: s_cselect_b32 s4, s8, s5
150 ; GFX9-NEXT: s_xor_b32 s4, s4, s6
151 ; GFX9-NEXT: s_sub_i32 s4, s4, s6
152 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
153 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0
154 ; GFX9-NEXT: s_endpgm
155 ;
156 ; EG-LABEL: sdiv_i32:
157 ; EG: ; %bb.0:
158 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
159 ; EG-NEXT: TEX 0 @6
160 ; EG-NEXT: ALU 26, @9, KC0[CB0:0-32], KC1[]
161 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
162 ; EG-NEXT: CF_END
163 ; EG-NEXT: PAD
164 ; EG-NEXT: Fetch clause starting at 6:
165 ; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #1
166 ; EG-NEXT: ALU clause starting at 8:
167 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
168 ; EG-NEXT: ALU clause starting at 9:
169 ; EG-NEXT: SETGT_INT * T0.W, 0.0, T0.Y,
170 ; EG-NEXT: ADD_INT * T1.W, T0.Y, PV.W,
171 ; EG-NEXT: XOR_INT * T1.W, PV.W, T0.W,
172 ; EG-NEXT: SUB_INT T2.W, 0.0, PV.W,
173 ; EG-NEXT: RECIP_UINT * T0.Y, PV.W,
174 ; EG-NEXT: SETGT_INT T3.W, 0.0, T0.X,
175 ; EG-NEXT: MULLO_INT * T0.Z, PV.W, PS,
176 ; EG-NEXT: ADD_INT T2.W, T0.X, PV.W,
177 ; EG-NEXT: MULHI * T0.X, T0.Y, PS,
178 ; EG-NEXT: ADD_INT T4.W, T0.Y, PS,
179 ; EG-NEXT: XOR_INT * T2.W, PV.W, T3.W,
180 ; EG-NEXT: MULHI * T0.X, PS, PV.W,
181 ; EG-NEXT: MULLO_INT * T0.Y, PS, T1.W,
182 ; EG-NEXT: SUB_INT * T2.W, T2.W, PS,
183 ; EG-NEXT: ADD_INT T0.Z, T0.X, 1,
184 ; EG-NEXT: SETGE_UINT T4.W, PV.W, T1.W,
185 ; EG-NEXT: SUB_INT * T5.W, PV.W, T1.W,
186 ; EG-NEXT: CNDE_INT T2.W, PV.W, T2.W, PS,
187 ; EG-NEXT: CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
188 ; EG-NEXT: ADD_INT T5.W, PS, 1,
189 ; EG-NEXT: SETGE_UINT * T1.W, PV.W, T1.W,
190 ; EG-NEXT: CNDE_INT T1.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
191 ; EG-NEXT: XOR_INT * T0.W, T3.W, T0.W,
192 ; EG-NEXT: XOR_INT * T1.W, PV.W, PS,
193 ; EG-NEXT: SUB_INT T0.X, PV.W, T0.W,
194 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
195 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
196 %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1
197 %num = load i32, ptr addrspace(1) %in
198 %den = load i32, ptr addrspace(1) %den_ptr
199 %result = sdiv i32 %num, %den
200 store i32 %result, ptr addrspace(1) %out
201 ret void
202 }
204 define amdgpu_kernel void @sdiv_i32_4(ptr addrspace(1) %out, ptr addrspace(1) %in) {
205 ; GCN-LABEL: sdiv_i32_4:
206 ; GCN: ; %bb.0:
207 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
208 ; GCN-NEXT: s_mov_b32 s7, 0xf000
209 ; GCN-NEXT: s_mov_b32 s6, -1
210 ; GCN-NEXT: s_mov_b32 s10, s6
211 ; GCN-NEXT: s_mov_b32 s11, s7
212 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
213 ; GCN-NEXT: s_mov_b32 s8, s2
214 ; GCN-NEXT: s_mov_b32 s9, s3
215 ; GCN-NEXT: buffer_load_dword v0, off, s[8:11], 0
216 ; GCN-NEXT: s_mov_b32 s4, s0
217 ; GCN-NEXT: s_mov_b32 s5, s1
218 ; GCN-NEXT: s_waitcnt vmcnt(0)
219 ; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
220 ; GCN-NEXT: v_lshrrev_b32_e32 v1, 30, v1
221 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0
222 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0
223 ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
224 ; GCN-NEXT: s_endpgm
225 ;
226 ; TONGA-LABEL: sdiv_i32_4:
227 ; TONGA: ; %bb.0:
228 ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
229 ; TONGA-NEXT: s_mov_b32 s7, 0xf000
230 ; TONGA-NEXT: s_mov_b32 s6, -1
231 ; TONGA-NEXT: s_mov_b32 s10, s6
232 ; TONGA-NEXT: s_mov_b32 s11, s7
233 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
234 ; TONGA-NEXT: s_mov_b32 s8, s2
235 ; TONGA-NEXT: s_mov_b32 s9, s3
236 ; TONGA-NEXT: buffer_load_dword v0, off, s[8:11], 0
237 ; TONGA-NEXT: s_mov_b32 s4, s0
238 ; TONGA-NEXT: s_mov_b32 s5, s1
239 ; TONGA-NEXT: s_waitcnt vmcnt(0)
240 ; TONGA-NEXT: v_ashrrev_i32_e32 v1, 31, v0
241 ; TONGA-NEXT: v_lshrrev_b32_e32 v1, 30, v1
242 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v1, v0
243 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 2, v0
244 ; TONGA-NEXT: buffer_store_dword v0, off, s[4:7], 0
245 ; TONGA-NEXT: s_endpgm
246 ;
247 ; GFX9-LABEL: sdiv_i32_4:
248 ; GFX9: ; %bb.0:
249 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
250 ; GFX9-NEXT: s_mov_b32 s7, 0xf000
251 ; GFX9-NEXT: s_mov_b32 s6, -1
252 ; GFX9-NEXT: s_mov_b32 s10, s6
253 ; GFX9-NEXT: s_mov_b32 s11, s7
254 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
255 ; GFX9-NEXT: s_mov_b32 s8, s2
256 ; GFX9-NEXT: s_mov_b32 s9, s3
257 ; GFX9-NEXT: buffer_load_dword v0, off, s[8:11], 0
258 ; GFX9-NEXT: s_mov_b32 s4, s0
259 ; GFX9-NEXT: s_mov_b32 s5, s1
260 ; GFX9-NEXT: s_waitcnt vmcnt(0)
261 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
262 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 30, v1
263 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
264 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 2, v0
265 ; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0
266 ; GFX9-NEXT: s_endpgm
267 ;
268 ; EG-LABEL: sdiv_i32_4:
269 ; EG: ; %bb.0:
270 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
271 ; EG-NEXT: TEX 0 @6
272 ; EG-NEXT: ALU 7, @9, KC0[CB0:0-32], KC1[]
273 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
274 ; EG-NEXT: CF_END
275 ; EG-NEXT: PAD
276 ; EG-NEXT: Fetch clause starting at 6:
277 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
278 ; EG-NEXT: ALU clause starting at 8:
279 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
280 ; EG-NEXT: ALU clause starting at 9:
281 ; EG-NEXT: ASHR * T0.W, T0.X, literal.x,
282 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
283 ; EG-NEXT: LSHR * T0.W, PV.W, literal.x,
284 ; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)
285 ; EG-NEXT: ADD_INT * T0.W, T0.X, PV.W,
286 ; EG-NEXT: ASHR T0.X, PV.W, literal.x,
287 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
288 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
289 %num = load i32, ptr addrspace(1) %in
290 %result = sdiv i32 %num, 4
291 store i32 %result, ptr addrspace(1) %out
292 ret void
293 }
295 ; Multiply by a weird constant to make sure setIntDivIsCheap is
296 ; working.
298 define amdgpu_kernel void @slow_sdiv_i32_3435(ptr addrspace(1) %out, ptr addrspace(1) %in) {
299 ; GCN-LABEL: slow_sdiv_i32_3435:
300 ; GCN: ; %bb.0:
301 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
302 ; GCN-NEXT: s_mov_b32 s7, 0xf000
303 ; GCN-NEXT: s_mov_b32 s6, -1
304 ; GCN-NEXT: s_mov_b32 s10, s6
305 ; GCN-NEXT: s_mov_b32 s11, s7
306 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
307 ; GCN-NEXT: s_mov_b32 s8, s2
308 ; GCN-NEXT: s_mov_b32 s9, s3
309 ; GCN-NEXT: buffer_load_dword v0, off, s[8:11], 0
310 ; GCN-NEXT: s_mov_b32 s2, 0x98a1930b
311 ; GCN-NEXT: s_mov_b32 s4, s0
312 ; GCN-NEXT: s_mov_b32 s5, s1
313 ; GCN-NEXT: s_waitcnt vmcnt(0)
314 ; GCN-NEXT: v_mul_hi_i32 v1, v0, s2
315 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0
316 ; GCN-NEXT: v_lshrrev_b32_e32 v1, 31, v0
317 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 11, v0
318 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
319 ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
320 ; GCN-NEXT: s_endpgm
321 ;
322 ; TONGA-LABEL: slow_sdiv_i32_3435:
323 ; TONGA: ; %bb.0:
324 ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
325 ; TONGA-NEXT: s_mov_b32 s7, 0xf000
326 ; TONGA-NEXT: s_mov_b32 s6, -1
327 ; TONGA-NEXT: s_mov_b32 s10, s6
328 ; TONGA-NEXT: s_mov_b32 s11, s7
329 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
330 ; TONGA-NEXT: s_mov_b32 s8, s2
331 ; TONGA-NEXT: s_mov_b32 s9, s3
332 ; TONGA-NEXT: buffer_load_dword v0, off, s[8:11], 0
333 ; TONGA-NEXT: s_mov_b32 s2, 0x98a1930b
334 ; TONGA-NEXT: s_mov_b32 s4, s0
335 ; TONGA-NEXT: s_mov_b32 s5, s1
336 ; TONGA-NEXT: s_waitcnt vmcnt(0)
337 ; TONGA-NEXT: v_mul_hi_i32 v1, v0, s2
338 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v1, v0
339 ; TONGA-NEXT: v_lshrrev_b32_e32 v1, 31, v0
340 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 11, v0
341 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v1
342 ; TONGA-NEXT: buffer_store_dword v0, off, s[4:7], 0
343 ; TONGA-NEXT: s_endpgm
344 ;
345 ; GFX9-LABEL: slow_sdiv_i32_3435:
346 ; GFX9: ; %bb.0:
347 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
348 ; GFX9-NEXT: s_mov_b32 s7, 0xf000
349 ; GFX9-NEXT: s_mov_b32 s6, -1
350 ; GFX9-NEXT: s_mov_b32 s10, s6
351 ; GFX9-NEXT: s_mov_b32 s11, s7
352 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
353 ; GFX9-NEXT: s_mov_b32 s8, s2
354 ; GFX9-NEXT: s_mov_b32 s9, s3
355 ; GFX9-NEXT: buffer_load_dword v0, off, s[8:11], 0
356 ; GFX9-NEXT: s_mov_b32 s2, 0x98a1930b
357 ; GFX9-NEXT: s_mov_b32 s4, s0
358 ; GFX9-NEXT: s_mov_b32 s5, s1
359 ; GFX9-NEXT: s_waitcnt vmcnt(0)
360 ; GFX9-NEXT: v_mul_hi_i32 v1, v0, s2
361 ; GFX9-NEXT: v_add_u32_e32 v0, v1, v0
362 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 31, v0
363 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 11, v0
364 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
365 ; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0
366 ; GFX9-NEXT: s_endpgm
367 ;
368 ; EG-LABEL: slow_sdiv_i32_3435:
369 ; EG: ; %bb.0:
370 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
371 ; EG-NEXT: TEX 0 @6
372 ; EG-NEXT: ALU 8, @9, KC0[CB0:0-32], KC1[]
373 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
374 ; EG-NEXT: CF_END
375 ; EG-NEXT: PAD
376 ; EG-NEXT: Fetch clause starting at 6:
377 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
378 ; EG-NEXT: ALU clause starting at 8:
379 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
380 ; EG-NEXT: ALU clause starting at 9:
381 ; EG-NEXT: MULHI_INT * T0.Y, T0.X, literal.x,
382 ; EG-NEXT: -1734241525(-4.176600e-24), 0(0.000000e+00)
383 ; EG-NEXT: ADD_INT * T0.W, PS, T0.X,
384 ; EG-NEXT: ASHR T1.W, PV.W, literal.x,
385 ; EG-NEXT: LSHR * T0.W, PV.W, literal.y,
386 ; EG-NEXT: 11(1.541428e-44), 31(4.344025e-44)
387 ; EG-NEXT: ADD_INT T0.X, PV.W, PS,
388 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
389 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
390 %num = load i32, ptr addrspace(1) %in
391 %result = sdiv i32 %num, 3435
392 store i32 %result, ptr addrspace(1) %out
393 ret void
394 }
396 define amdgpu_kernel void @sdiv_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
397 ; GCN-LABEL: sdiv_v2i32:
398 ; GCN: ; %bb.0:
399 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
400 ; GCN-NEXT: s_mov_b32 s7, 0xf000
401 ; GCN-NEXT: s_mov_b32 s6, -1
402 ; GCN-NEXT: s_mov_b32 s10, s6
403 ; GCN-NEXT: s_mov_b32 s11, s7
404 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
405 ; GCN-NEXT: s_mov_b32 s8, s2
406 ; GCN-NEXT: s_mov_b32 s9, s3
407 ; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
408 ; GCN-NEXT: s_mov_b32 s4, s0
409 ; GCN-NEXT: s_mov_b32 s5, s1
410 ; GCN-NEXT: s_waitcnt vmcnt(0)
411 ; GCN-NEXT: v_ashrrev_i32_e32 v5, 31, v2
412 ; GCN-NEXT: v_ashrrev_i32_e32 v7, 31, v3
413 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v5
414 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7
415 ; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v0
416 ; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v1
417 ; GCN-NEXT: v_xor_b32_e32 v2, v2, v5
418 ; GCN-NEXT: v_xor_b32_e32 v3, v3, v7
419 ; GCN-NEXT: v_xor_b32_e32 v8, v4, v5
420 ; GCN-NEXT: v_xor_b32_e32 v9, v6, v7
421 ; GCN-NEXT: v_cvt_f32_u32_e32 v5, v2
422 ; GCN-NEXT: v_cvt_f32_u32_e32 v7, v3
423 ; GCN-NEXT: v_sub_i32_e32 v10, vcc, 0, v2
424 ; GCN-NEXT: v_rcp_iflag_f32_e32 v5, v5
425 ; GCN-NEXT: v_rcp_iflag_f32_e32 v7, v7
426 ; GCN-NEXT: v_sub_i32_e32 v11, vcc, 0, v3
427 ; GCN-NEXT: v_mul_f32_e32 v5, 0x4f7ffffe, v5
428 ; GCN-NEXT: v_mul_f32_e32 v7, 0x4f7ffffe, v7
429 ; GCN-NEXT: v_cvt_u32_f32_e32 v5, v5
430 ; GCN-NEXT: v_cvt_u32_f32_e32 v7, v7
431 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
432 ; GCN-NEXT: v_mul_lo_u32 v10, v10, v5
433 ; GCN-NEXT: v_mul_lo_u32 v11, v11, v7
434 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v6
435 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v4
436 ; GCN-NEXT: v_mul_hi_u32 v4, v5, v10
437 ; GCN-NEXT: v_xor_b32_e32 v1, v1, v6
438 ; GCN-NEXT: v_mul_hi_u32 v6, v7, v11
439 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v5, v4
440 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v7, v6
441 ; GCN-NEXT: v_mul_hi_u32 v4, v0, v4
442 ; GCN-NEXT: v_mul_hi_u32 v5, v1, v5
443 ; GCN-NEXT: v_mul_lo_u32 v6, v4, v2
444 ; GCN-NEXT: v_mul_lo_u32 v10, v5, v3
445 ; GCN-NEXT: v_add_i32_e32 v7, vcc, 1, v4
446 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v6
447 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v10
448 ; GCN-NEXT: v_add_i32_e32 v11, vcc, 1, v5
449 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v2
450 ; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v3
451 ; GCN-NEXT: v_sub_i32_e32 v6, vcc, v0, v2
452 ; GCN-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[0:1]
453 ; GCN-NEXT: v_sub_i32_e32 v7, vcc, v1, v3
454 ; GCN-NEXT: v_cndmask_b32_e64 v5, v5, v11, s[2:3]
455 ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[0:1]
456 ; GCN-NEXT: v_add_i32_e32 v6, vcc, 1, v4
457 ; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[2:3]
458 ; GCN-NEXT: v_add_i32_e32 v7, vcc, 1, v5
459 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2
460 ; GCN-NEXT: v_cndmask_b32_e32 v0, v4, v6, vcc
461 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3
462 ; GCN-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc
463 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v8
464 ; GCN-NEXT: v_xor_b32_e32 v1, v1, v9
465 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v8
466 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v9
467 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
468 ; GCN-NEXT: s_endpgm
469 ;
470 ; TONGA-LABEL: sdiv_v2i32:
471 ; TONGA: ; %bb.0:
472 ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
473 ; TONGA-NEXT: s_mov_b32 s7, 0xf000
474 ; TONGA-NEXT: s_mov_b32 s6, -1
475 ; TONGA-NEXT: s_mov_b32 s10, s6
476 ; TONGA-NEXT: s_mov_b32 s11, s7
477 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
478 ; TONGA-NEXT: s_mov_b32 s8, s2
479 ; TONGA-NEXT: s_mov_b32 s9, s3
480 ; TONGA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
481 ; TONGA-NEXT: s_mov_b32 s4, s0
482 ; TONGA-NEXT: s_mov_b32 s5, s1
483 ; TONGA-NEXT: s_waitcnt vmcnt(0)
484 ; TONGA-NEXT: v_ashrrev_i32_e32 v5, 31, v2
485 ; TONGA-NEXT: v_ashrrev_i32_e32 v7, 31, v3
486 ; TONGA-NEXT: v_add_u32_e32 v2, vcc, v2, v5
487 ; TONGA-NEXT: v_add_u32_e32 v3, vcc, v3, v7
488 ; TONGA-NEXT: v_ashrrev_i32_e32 v4, 31, v0
489 ; TONGA-NEXT: v_ashrrev_i32_e32 v6, 31, v1
490 ; TONGA-NEXT: v_xor_b32_e32 v2, v2, v5
491 ; TONGA-NEXT: v_xor_b32_e32 v3, v3, v7
492 ; TONGA-NEXT: v_xor_b32_e32 v8, v4, v5
493 ; TONGA-NEXT: v_xor_b32_e32 v9, v6, v7
494 ; TONGA-NEXT: v_cvt_f32_u32_e32 v5, v2
495 ; TONGA-NEXT: v_cvt_f32_u32_e32 v7, v3
496 ; TONGA-NEXT: v_sub_u32_e32 v10, vcc, 0, v2
497 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v5, v5
498 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v7, v7
499 ; TONGA-NEXT: v_sub_u32_e32 v11, vcc, 0, v3
500 ; TONGA-NEXT: v_mul_f32_e32 v5, 0x4f7ffffe, v5
501 ; TONGA-NEXT: v_mul_f32_e32 v7, 0x4f7ffffe, v7
502 ; TONGA-NEXT: v_cvt_u32_f32_e32 v5, v5
503 ; TONGA-NEXT: v_cvt_u32_f32_e32 v7, v7
504 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v4
505 ; TONGA-NEXT: v_mul_lo_u32 v10, v10, v5
506 ; TONGA-NEXT: v_mul_lo_u32 v11, v11, v7
507 ; TONGA-NEXT: v_add_u32_e32 v1, vcc, v1, v6
508 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v4
509 ; TONGA-NEXT: v_mul_hi_u32 v4, v5, v10
510 ; TONGA-NEXT: v_xor_b32_e32 v1, v1, v6
511 ; TONGA-NEXT: v_mul_hi_u32 v6, v7, v11
512 ; TONGA-NEXT: v_add_u32_e32 v4, vcc, v5, v4
513 ; TONGA-NEXT: v_add_u32_e32 v5, vcc, v7, v6
514 ; TONGA-NEXT: v_mul_hi_u32 v4, v0, v4
515 ; TONGA-NEXT: v_mul_hi_u32 v5, v1, v5
516 ; TONGA-NEXT: v_mul_lo_u32 v6, v4, v2
517 ; TONGA-NEXT: v_mul_lo_u32 v10, v5, v3
518 ; TONGA-NEXT: v_add_u32_e32 v7, vcc, 1, v4
519 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v6
520 ; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v1, v10
521 ; TONGA-NEXT: v_add_u32_e32 v11, vcc, 1, v5
522 ; TONGA-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v2
523 ; TONGA-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v3
524 ; TONGA-NEXT: v_sub_u32_e32 v6, vcc, v0, v2
525 ; TONGA-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[0:1]
526 ; TONGA-NEXT: v_sub_u32_e32 v7, vcc, v1, v3
527 ; TONGA-NEXT: v_cndmask_b32_e64 v5, v5, v11, s[2:3]
528 ; TONGA-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[0:1]
529 ; TONGA-NEXT: v_add_u32_e32 v6, vcc, 1, v4
530 ; TONGA-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[2:3]
531 ; TONGA-NEXT: v_add_u32_e32 v7, vcc, 1, v5
532 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2
533 ; TONGA-NEXT: v_cndmask_b32_e32 v0, v4, v6, vcc
534 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3
535 ; TONGA-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc
536 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v8
537 ; TONGA-NEXT: v_xor_b32_e32 v1, v1, v9
538 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v8
539 ; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v1, v9
540 ; TONGA-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
541 ; TONGA-NEXT: s_endpgm
542 ;
543 ; GFX9-LABEL: sdiv_v2i32:
544 ; GFX9: ; %bb.0:
545 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
546 ; GFX9-NEXT: s_mov_b32 s3, 0xf000
547 ; GFX9-NEXT: s_mov_b32 s2, -1
548 ; GFX9-NEXT: s_mov_b32 s10, s2
549 ; GFX9-NEXT: s_mov_b32 s11, s3
550 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
551 ; GFX9-NEXT: s_mov_b32 s8, s6
552 ; GFX9-NEXT: s_mov_b32 s9, s7
553 ; GFX9-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
554 ; GFX9-NEXT: s_waitcnt vmcnt(0)
555 ; GFX9-NEXT: v_readfirstlane_b32 s0, v2
556 ; GFX9-NEXT: s_ashr_i32 s1, s0, 31
557 ; GFX9-NEXT: s_add_i32 s0, s0, s1
558 ; GFX9-NEXT: s_xor_b32 s6, s0, s1
559 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s6
560 ; GFX9-NEXT: v_readfirstlane_b32 s7, v0
561 ; GFX9-NEXT: s_ashr_i32 s8, s7, 31
562 ; GFX9-NEXT: s_add_i32 s7, s7, s8
563 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v2
564 ; GFX9-NEXT: s_xor_b32 s9, s8, s1
565 ; GFX9-NEXT: s_xor_b32 s1, s7, s8
566 ; GFX9-NEXT: s_sub_i32 s7, 0, s6
567 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v2
568 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
569 ; GFX9-NEXT: s_mov_b32 s0, s4
570 ; GFX9-NEXT: v_readfirstlane_b32 s4, v3
571 ; GFX9-NEXT: v_readfirstlane_b32 s8, v0
572 ; GFX9-NEXT: s_mul_i32 s7, s7, s8
573 ; GFX9-NEXT: s_mul_hi_u32 s7, s8, s7
574 ; GFX9-NEXT: s_add_i32 s8, s8, s7
575 ; GFX9-NEXT: s_mul_hi_u32 s7, s1, s8
576 ; GFX9-NEXT: s_mul_i32 s8, s7, s6
577 ; GFX9-NEXT: s_sub_i32 s1, s1, s8
578 ; GFX9-NEXT: s_add_i32 s10, s7, 1
579 ; GFX9-NEXT: s_sub_i32 s8, s1, s6
580 ; GFX9-NEXT: s_cmp_ge_u32 s1, s6
581 ; GFX9-NEXT: s_cselect_b32 s7, s10, s7
582 ; GFX9-NEXT: s_cselect_b32 s1, s8, s1
583 ; GFX9-NEXT: s_add_i32 s8, s7, 1
584 ; GFX9-NEXT: s_cmp_ge_u32 s1, s6
585 ; GFX9-NEXT: s_cselect_b32 s6, s8, s7
586 ; GFX9-NEXT: s_ashr_i32 s7, s4, 31
587 ; GFX9-NEXT: s_add_i32 s4, s4, s7
588 ; GFX9-NEXT: s_xor_b32 s4, s4, s7
589 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s4
590 ; GFX9-NEXT: s_mov_b32 s1, s5
591 ; GFX9-NEXT: v_readfirstlane_b32 s5, v1
592 ; GFX9-NEXT: s_ashr_i32 s8, s5, 31
593 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
594 ; GFX9-NEXT: s_xor_b32 s6, s6, s9
595 ; GFX9-NEXT: s_add_i32 s5, s5, s8
596 ; GFX9-NEXT: s_xor_b32 s7, s8, s7
597 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
598 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
599 ; GFX9-NEXT: s_sub_i32 s6, s6, s9
600 ; GFX9-NEXT: s_xor_b32 s5, s5, s8
601 ; GFX9-NEXT: s_sub_i32 s8, 0, s4
602 ; GFX9-NEXT: v_readfirstlane_b32 s9, v0
603 ; GFX9-NEXT: s_mul_i32 s8, s8, s9
604 ; GFX9-NEXT: s_mul_hi_u32 s8, s9, s8
605 ; GFX9-NEXT: s_add_i32 s9, s9, s8
606 ; GFX9-NEXT: s_mul_hi_u32 s8, s5, s9
607 ; GFX9-NEXT: s_mul_i32 s9, s8, s4
608 ; GFX9-NEXT: s_sub_i32 s5, s5, s9
609 ; GFX9-NEXT: s_add_i32 s10, s8, 1
610 ; GFX9-NEXT: s_sub_i32 s9, s5, s4
611 ; GFX9-NEXT: s_cmp_ge_u32 s5, s4
612 ; GFX9-NEXT: s_cselect_b32 s8, s10, s8
613 ; GFX9-NEXT: s_cselect_b32 s5, s9, s5
614 ; GFX9-NEXT: s_add_i32 s9, s8, 1
615 ; GFX9-NEXT: s_cmp_ge_u32 s5, s4
616 ; GFX9-NEXT: s_cselect_b32 s4, s9, s8
617 ; GFX9-NEXT: s_xor_b32 s4, s4, s7
618 ; GFX9-NEXT: s_sub_i32 s4, s4, s7
619 ; GFX9-NEXT: v_mov_b32_e32 v0, s6
620 ; GFX9-NEXT: v_mov_b32_e32 v1, s4
621 ; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
622 ; GFX9-NEXT: s_endpgm
623 ;
624 ; EG-LABEL: sdiv_v2i32:
625 ; EG: ; %bb.0:
626 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
627 ; EG-NEXT: TEX 0 @6
628 ; EG-NEXT: ALU 51, @9, KC0[CB0:0-32], KC1[]
629 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
630 ; EG-NEXT: CF_END
631 ; EG-NEXT: PAD
632 ; EG-NEXT: Fetch clause starting at 6:
633 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
634 ; EG-NEXT: ALU clause starting at 8:
635 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
636 ; EG-NEXT: ALU clause starting at 9:
637 ; EG-NEXT: SETGT_INT * T1.W, 0.0, T0.W,
638 ; EG-NEXT: ADD_INT T0.W, T0.W, PV.W,
639 ; EG-NEXT: SETGT_INT * T2.W, 0.0, T0.Z,
640 ; EG-NEXT: XOR_INT * T0.W, PV.W, T1.W,
641 ; EG-NEXT: SUB_INT T1.Z, 0.0, PV.W,
642 ; EG-NEXT: ADD_INT T3.W, T0.Z, T2.W,
643 ; EG-NEXT: RECIP_UINT * T0.Z, PV.W,
644 ; EG-NEXT: XOR_INT T3.W, PV.W, T2.W,
645 ; EG-NEXT: MULLO_INT * T1.X, PV.Z, PS,
646 ; EG-NEXT: SUB_INT T4.W, 0.0, PV.W,
647 ; EG-NEXT: RECIP_UINT * T1.Y, PV.W,
648 ; EG-NEXT: SETGT_INT T5.W, 0.0, T0.X,
649 ; EG-NEXT: MULLO_INT * T1.Z, PV.W, PS,
650 ; EG-NEXT: SETGT_INT T2.Z, 0.0, T0.Y,
651 ; EG-NEXT: ADD_INT T4.W, T0.X, PV.W,
652 ; EG-NEXT: MULHI * T0.X, T1.Y, PS,
653 ; EG-NEXT: ADD_INT T1.Y, T1.Y, PS,
654 ; EG-NEXT: XOR_INT T1.Z, PV.W, T5.W,
655 ; EG-NEXT: ADD_INT T4.W, T0.Y, PV.Z, BS:VEC_120/SCL_212
656 ; EG-NEXT: MULHI * T0.X, T0.Z, T1.X,
657 ; EG-NEXT: ADD_INT T0.Z, T0.Z, PS,
658 ; EG-NEXT: XOR_INT T4.W, PV.W, T2.Z,
659 ; EG-NEXT: MULHI * T0.X, PV.Z, PV.Y,
660 ; EG-NEXT: MULHI * T0.Y, PV.W, PV.Z,
661 ; EG-NEXT: MULLO_INT * T0.Z, PS, T0.W,
662 ; EG-NEXT: SUB_INT T4.W, T4.W, PS,
663 ; EG-NEXT: MULLO_INT * T0.Z, T0.X, T3.W,
664 ; EG-NEXT: SUB_INT T1.Y, T1.Z, PS,
665 ; EG-NEXT: ADD_INT T0.Z, T0.Y, 1,
666 ; EG-NEXT: SETGE_UINT T6.W, PV.W, T0.W,
667 ; EG-NEXT: SUB_INT * T7.W, PV.W, T0.W,
668 ; EG-NEXT: CNDE_INT T1.X, PV.W, T4.W, PS, BS:VEC_021/SCL_122
669 ; EG-NEXT: CNDE_INT T0.Y, PV.W, T0.Y, PV.Z,
670 ; EG-NEXT: ADD_INT T0.Z, T0.X, 1,
671 ; EG-NEXT: SETGE_UINT T4.W, PV.Y, T3.W,
672 ; EG-NEXT: SUB_INT * T6.W, PV.Y, T3.W,
673 ; EG-NEXT: CNDE_INT T1.Y, PV.W, T1.Y, PS,
674 ; EG-NEXT: CNDE_INT T0.Z, PV.W, T0.X, PV.Z,
675 ; EG-NEXT: ADD_INT T4.W, PV.Y, 1,
676 ; EG-NEXT: SETGE_UINT * T0.W, PV.X, T0.W,
677 ; EG-NEXT: CNDE_INT T0.Y, PS, T0.Y, PV.W,
678 ; EG-NEXT: XOR_INT T1.Z, T2.Z, T1.W, BS:VEC_021/SCL_122
679 ; EG-NEXT: ADD_INT T0.W, PV.Z, 1,
680 ; EG-NEXT: SETGE_UINT * T1.W, PV.Y, T3.W,
681 ; EG-NEXT: CNDE_INT T0.Z, PS, T0.Z, PV.W,
682 ; EG-NEXT: XOR_INT T0.W, T5.W, T2.W,
683 ; EG-NEXT: XOR_INT * T1.W, PV.Y, PV.Z,
684 ; EG-NEXT: SUB_INT T0.Y, PS, T1.Z,
685 ; EG-NEXT: XOR_INT * T1.W, PV.Z, PV.W,
686 ; EG-NEXT: SUB_INT T0.X, PV.W, T0.W,
687 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
688 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
689 %den_ptr = getelementptr <2 x i32>, ptr addrspace(1) %in, i32 1
690 %num = load <2 x i32>, ptr addrspace(1) %in
691 %den = load <2 x i32>, ptr addrspace(1) %den_ptr
692 %result = sdiv <2 x i32> %num, %den
693 store <2 x i32> %result, ptr addrspace(1) %out
694 ret void
695 }
697 define amdgpu_kernel void @sdiv_v2i32_4(ptr addrspace(1) %out, ptr addrspace(1) %in) {
698 ; GCN-LABEL: sdiv_v2i32_4:
699 ; GCN: ; %bb.0:
700 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
701 ; GCN-NEXT: s_mov_b32 s7, 0xf000
702 ; GCN-NEXT: s_mov_b32 s6, -1
703 ; GCN-NEXT: s_mov_b32 s10, s6
704 ; GCN-NEXT: s_mov_b32 s11, s7
705 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
706 ; GCN-NEXT: s_mov_b32 s8, s2
707 ; GCN-NEXT: s_mov_b32 s9, s3
708 ; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
709 ; GCN-NEXT: s_mov_b32 s4, s0
710 ; GCN-NEXT: s_mov_b32 s5, s1
711 ; GCN-NEXT: s_waitcnt vmcnt(0)
712 ; GCN-NEXT: v_ashrrev_i32_e32 v2, 31, v0
713 ; GCN-NEXT: v_ashrrev_i32_e32 v3, 31, v1
714 ; GCN-NEXT: v_lshrrev_b32_e32 v2, 30, v2
715 ; GCN-NEXT: v_lshrrev_b32_e32 v3, 30, v3
716 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v2, v0
717 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v3, v1
718 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0
719 ; GCN-NEXT: v_ashrrev_i32_e32 v1, 2, v1
720 ; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
721 ; GCN-NEXT: s_endpgm
722 ;
723 ; TONGA-LABEL: sdiv_v2i32_4:
724 ; TONGA: ; %bb.0:
725 ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
726 ; TONGA-NEXT: s_mov_b32 s7, 0xf000
727 ; TONGA-NEXT: s_mov_b32 s6, -1
728 ; TONGA-NEXT: s_mov_b32 s10, s6
729 ; TONGA-NEXT: s_mov_b32 s11, s7
730 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
731 ; TONGA-NEXT: s_mov_b32 s8, s2
732 ; TONGA-NEXT: s_mov_b32 s9, s3
733 ; TONGA-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
734 ; TONGA-NEXT: s_mov_b32 s4, s0
735 ; TONGA-NEXT: s_mov_b32 s5, s1
736 ; TONGA-NEXT: s_waitcnt vmcnt(0)
737 ; TONGA-NEXT: v_ashrrev_i32_e32 v2, 31, v0
738 ; TONGA-NEXT: v_ashrrev_i32_e32 v3, 31, v1
739 ; TONGA-NEXT: v_lshrrev_b32_e32 v2, 30, v2
740 ; TONGA-NEXT: v_lshrrev_b32_e32 v3, 30, v3
741 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v2, v0
742 ; TONGA-NEXT: v_add_u32_e32 v1, vcc, v3, v1
743 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 2, v0
744 ; TONGA-NEXT: v_ashrrev_i32_e32 v1, 2, v1
745 ; TONGA-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
746 ; TONGA-NEXT: s_endpgm
747 ;
748 ; GFX9-LABEL: sdiv_v2i32_4:
749 ; GFX9: ; %bb.0:
750 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
751 ; GFX9-NEXT: s_mov_b32 s7, 0xf000
752 ; GFX9-NEXT: s_mov_b32 s6, -1
753 ; GFX9-NEXT: s_mov_b32 s10, s6
754 ; GFX9-NEXT: s_mov_b32 s11, s7
755 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
756 ; GFX9-NEXT: s_mov_b32 s8, s2
757 ; GFX9-NEXT: s_mov_b32 s9, s3
758 ; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
759 ; GFX9-NEXT: s_mov_b32 s4, s0
760 ; GFX9-NEXT: s_mov_b32 s5, s1
761 ; GFX9-NEXT: s_waitcnt vmcnt(0)
762 ; GFX9-NEXT: v_ashrrev_i32_e32 v2, 31, v0
763 ; GFX9-NEXT: v_ashrrev_i32_e32 v3, 31, v1
764 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 30, v2
765 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 30, v3
766 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v2
767 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v3
768 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 2, v0
769 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 2, v1
770 ; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
771 ; GFX9-NEXT: s_endpgm
772 ;
773 ; EG-LABEL: sdiv_v2i32_4:
774 ; EG: ; %bb.0:
775 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
776 ; EG-NEXT: TEX 0 @6
777 ; EG-NEXT: ALU 13, @9, KC0[CB0:0-32], KC1[]
778 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
779 ; EG-NEXT: CF_END
780 ; EG-NEXT: PAD
781 ; EG-NEXT: Fetch clause starting at 6:
782 ; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #1
783 ; EG-NEXT: ALU clause starting at 8:
784 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
785 ; EG-NEXT: ALU clause starting at 9:
786 ; EG-NEXT: ASHR * T0.W, T0.Y, literal.x,
787 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
788 ; EG-NEXT: LSHR T0.W, PV.W, literal.x,
789 ; EG-NEXT: ASHR * T1.W, T0.X, literal.y,
790 ; EG-NEXT: 30(4.203895e-44), 31(4.344025e-44)
791 ; EG-NEXT: LSHR T1.W, PS, literal.x,
792 ; EG-NEXT: ADD_INT * T0.W, T0.Y, PV.W,
793 ; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)
794 ; EG-NEXT: ASHR T0.Y, PS, literal.x,
795 ; EG-NEXT: ADD_INT * T0.W, T0.X, PV.W,
796 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
797 ; EG-NEXT: ASHR T0.X, PV.W, literal.x,
798 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
799 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
800 %num = load <2 x i32>, ptr addrspace(1) %in
801 %result = sdiv <2 x i32> %num, <i32 4, i32 4>
802 store <2 x i32> %result, ptr addrspace(1) %out
803 ret void
804 }
806 define amdgpu_kernel void @sdiv_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {
807 ; GCN-LABEL: sdiv_v4i32:
808 ; GCN: ; %bb.0:
809 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
810 ; GCN-NEXT: s_mov_b32 s11, 0xf000
811 ; GCN-NEXT: s_mov_b32 s10, -1
812 ; GCN-NEXT: s_mov_b32 s6, s10
813 ; GCN-NEXT: s_mov_b32 s7, s11
814 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
815 ; GCN-NEXT: s_mov_b32 s4, s2
816 ; GCN-NEXT: s_mov_b32 s5, s3
817 ; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
818 ; GCN-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
819 ; GCN-NEXT: s_mov_b32 s8, s0
820 ; GCN-NEXT: s_mov_b32 s9, s1
821 ; GCN-NEXT: s_waitcnt vmcnt(1)
822 ; GCN-NEXT: v_ashrrev_i32_e32 v8, 31, v0
823 ; GCN-NEXT: s_waitcnt vmcnt(0)
824 ; GCN-NEXT: v_ashrrev_i32_e32 v9, 31, v4
825 ; GCN-NEXT: v_ashrrev_i32_e32 v11, 31, v5
826 ; GCN-NEXT: v_ashrrev_i32_e32 v10, 31, v1
827 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v4, v9
828 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v11
829 ; GCN-NEXT: v_ashrrev_i32_e32 v13, 31, v6
830 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v8
831 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v10
832 ; GCN-NEXT: v_xor_b32_e32 v4, v4, v9
833 ; GCN-NEXT: v_xor_b32_e32 v5, v5, v11
834 ; GCN-NEXT: v_ashrrev_i32_e32 v12, 31, v2
835 ; GCN-NEXT: v_xor_b32_e32 v15, v8, v9
836 ; GCN-NEXT: v_xor_b32_e32 v16, v10, v11
837 ; GCN-NEXT: v_add_i32_e32 v6, vcc, v6, v13
838 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v8
839 ; GCN-NEXT: v_xor_b32_e32 v1, v1, v10
840 ; GCN-NEXT: v_cvt_f32_u32_e32 v8, v4
841 ; GCN-NEXT: v_cvt_f32_u32_e32 v10, v5
842 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v12
843 ; GCN-NEXT: v_xor_b32_e32 v6, v6, v13
844 ; GCN-NEXT: v_xor_b32_e32 v17, v12, v13
845 ; GCN-NEXT: v_xor_b32_e32 v2, v2, v12
846 ; GCN-NEXT: v_cvt_f32_u32_e32 v12, v6
847 ; GCN-NEXT: v_rcp_iflag_f32_e32 v8, v8
848 ; GCN-NEXT: v_rcp_iflag_f32_e32 v10, v10
849 ; GCN-NEXT: v_sub_i32_e32 v9, vcc, 0, v4
850 ; GCN-NEXT: v_rcp_iflag_f32_e32 v12, v12
851 ; GCN-NEXT: v_mul_f32_e32 v8, 0x4f7ffffe, v8
852 ; GCN-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10
853 ; GCN-NEXT: v_cvt_u32_f32_e32 v8, v8
854 ; GCN-NEXT: v_cvt_u32_f32_e32 v10, v10
855 ; GCN-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12
856 ; GCN-NEXT: v_cvt_u32_f32_e32 v12, v12
857 ; GCN-NEXT: v_sub_i32_e32 v11, vcc, 0, v5
858 ; GCN-NEXT: v_mul_lo_u32 v9, v9, v8
859 ; GCN-NEXT: v_mul_lo_u32 v11, v11, v10
860 ; GCN-NEXT: v_sub_i32_e32 v13, vcc, 0, v6
861 ; GCN-NEXT: v_mul_lo_u32 v13, v13, v12
862 ; GCN-NEXT: v_mul_hi_u32 v9, v8, v9
863 ; GCN-NEXT: v_mul_hi_u32 v11, v10, v11
864 ; GCN-NEXT: v_ashrrev_i32_e32 v14, 31, v7
865 ; GCN-NEXT: v_add_i32_e32 v7, vcc, v7, v14
866 ; GCN-NEXT: v_mul_hi_u32 v13, v12, v13
867 ; GCN-NEXT: v_xor_b32_e32 v7, v7, v14
868 ; GCN-NEXT: v_cvt_f32_u32_e32 v18, v7
869 ; GCN-NEXT: v_add_i32_e32 v8, vcc, v8, v9
870 ; GCN-NEXT: v_add_i32_e32 v9, vcc, v10, v11
871 ; GCN-NEXT: v_mul_hi_u32 v8, v0, v8
872 ; GCN-NEXT: v_mul_hi_u32 v9, v1, v9
873 ; GCN-NEXT: v_add_i32_e32 v10, vcc, v12, v13
874 ; GCN-NEXT: v_mul_hi_u32 v10, v2, v10
875 ; GCN-NEXT: v_rcp_iflag_f32_e32 v18, v18
876 ; GCN-NEXT: v_mul_lo_u32 v11, v8, v4
877 ; GCN-NEXT: v_mul_lo_u32 v13, v9, v5
878 ; GCN-NEXT: v_mul_lo_u32 v21, v10, v6
879 ; GCN-NEXT: v_mul_f32_e32 v18, 0x4f7ffffe, v18
880 ; GCN-NEXT: v_cvt_u32_f32_e32 v18, v18
881 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v11
882 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v13
883 ; GCN-NEXT: v_add_i32_e32 v12, vcc, 1, v8
884 ; GCN-NEXT: v_add_i32_e32 v20, vcc, 1, v9
885 ; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v4
886 ; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v5
887 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v21
888 ; GCN-NEXT: v_sub_i32_e32 v11, vcc, v0, v4
889 ; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v12, s[0:1]
890 ; GCN-NEXT: v_sub_i32_e32 v12, vcc, v1, v5
891 ; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v20, s[2:3]
892 ; GCN-NEXT: v_sub_i32_e32 v19, vcc, 0, v7
893 ; GCN-NEXT: v_add_i32_e32 v22, vcc, 1, v10
894 ; GCN-NEXT: v_sub_i32_e32 v13, vcc, v2, v6
895 ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v11, s[0:1]
896 ; GCN-NEXT: v_add_i32_e32 v11, vcc, 1, v8
897 ; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v12, s[2:3]
898 ; GCN-NEXT: v_add_i32_e32 v12, vcc, 1, v9
899 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4
900 ; GCN-NEXT: v_mul_lo_u32 v4, v19, v18
901 ; GCN-NEXT: v_cndmask_b32_e32 v0, v8, v11, vcc
902 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v5
903 ; GCN-NEXT: v_ashrrev_i32_e32 v8, 31, v3
904 ; GCN-NEXT: v_mul_hi_u32 v4, v18, v4
905 ; GCN-NEXT: v_cndmask_b32_e32 v1, v9, v12, vcc
906 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v8
907 ; GCN-NEXT: v_xor_b32_e32 v3, v3, v8
908 ; GCN-NEXT: v_add_i32_e32 v4, vcc, v18, v4
909 ; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v6
910 ; GCN-NEXT: v_mul_hi_u32 v4, v3, v4
911 ; GCN-NEXT: v_cndmask_b32_e64 v10, v10, v22, s[4:5]
912 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v15
913 ; GCN-NEXT: v_xor_b32_e32 v1, v1, v16
914 ; GCN-NEXT: v_cndmask_b32_e64 v2, v2, v13, s[4:5]
915 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v0, v15
916 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, v1, v16
917 ; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v10
918 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6
919 ; GCN-NEXT: v_cndmask_b32_e32 v2, v10, v5, vcc
920 ; GCN-NEXT: v_mul_lo_u32 v5, v4, v7
921 ; GCN-NEXT: v_xor_b32_e32 v2, v2, v17
922 ; GCN-NEXT: v_sub_i32_e32 v2, vcc, v2, v17
923 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, v3, v5
924 ; GCN-NEXT: v_xor_b32_e32 v6, v8, v14
925 ; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v4
926 ; GCN-NEXT: v_sub_i32_e32 v8, vcc, v3, v7
927 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v3, v7
928 ; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc
929 ; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc
930 ; GCN-NEXT: v_add_i32_e32 v5, vcc, 1, v4
931 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v3, v7
932 ; GCN-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
933 ; GCN-NEXT: v_xor_b32_e32 v3, v3, v6
934 ; GCN-NEXT: v_sub_i32_e32 v3, vcc, v3, v6
935 ; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
936 ; GCN-NEXT: s_endpgm
937 ;
938 ; TONGA-LABEL: sdiv_v4i32:
939 ; TONGA: ; %bb.0:
940 ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
941 ; TONGA-NEXT: s_mov_b32 s11, 0xf000
942 ; TONGA-NEXT: s_mov_b32 s10, -1
943 ; TONGA-NEXT: s_mov_b32 s6, s10
944 ; TONGA-NEXT: s_mov_b32 s7, s11
945 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
946 ; TONGA-NEXT: s_mov_b32 s4, s2
947 ; TONGA-NEXT: s_mov_b32 s5, s3
948 ; TONGA-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
949 ; TONGA-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
950 ; TONGA-NEXT: s_mov_b32 s8, s0
951 ; TONGA-NEXT: s_mov_b32 s9, s1
952 ; TONGA-NEXT: s_waitcnt vmcnt(1)
953 ; TONGA-NEXT: v_ashrrev_i32_e32 v8, 31, v0
954 ; TONGA-NEXT: s_waitcnt vmcnt(0)
955 ; TONGA-NEXT: v_ashrrev_i32_e32 v9, 31, v4
956 ; TONGA-NEXT: v_ashrrev_i32_e32 v11, 31, v5
957 ; TONGA-NEXT: v_ashrrev_i32_e32 v10, 31, v1
958 ; TONGA-NEXT: v_add_u32_e32 v4, vcc, v4, v9
959 ; TONGA-NEXT: v_add_u32_e32 v5, vcc, v5, v11
960 ; TONGA-NEXT: v_ashrrev_i32_e32 v13, 31, v6
961 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v8
962 ; TONGA-NEXT: v_add_u32_e32 v1, vcc, v1, v10
963 ; TONGA-NEXT: v_xor_b32_e32 v4, v4, v9
964 ; TONGA-NEXT: v_xor_b32_e32 v5, v5, v11
965 ; TONGA-NEXT: v_ashrrev_i32_e32 v12, 31, v2
966 ; TONGA-NEXT: v_xor_b32_e32 v15, v8, v9
967 ; TONGA-NEXT: v_xor_b32_e32 v16, v10, v11
968 ; TONGA-NEXT: v_add_u32_e32 v6, vcc, v6, v13
969 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v8
970 ; TONGA-NEXT: v_xor_b32_e32 v1, v1, v10
971 ; TONGA-NEXT: v_cvt_f32_u32_e32 v8, v4
972 ; TONGA-NEXT: v_cvt_f32_u32_e32 v10, v5
973 ; TONGA-NEXT: v_add_u32_e32 v2, vcc, v2, v12
974 ; TONGA-NEXT: v_xor_b32_e32 v6, v6, v13
975 ; TONGA-NEXT: v_xor_b32_e32 v17, v12, v13
976 ; TONGA-NEXT: v_xor_b32_e32 v2, v2, v12
977 ; TONGA-NEXT: v_cvt_f32_u32_e32 v12, v6
978 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v8, v8
979 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v10, v10
980 ; TONGA-NEXT: v_sub_u32_e32 v9, vcc, 0, v4
981 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v12, v12
982 ; TONGA-NEXT: v_mul_f32_e32 v8, 0x4f7ffffe, v8
983 ; TONGA-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10
984 ; TONGA-NEXT: v_cvt_u32_f32_e32 v8, v8
985 ; TONGA-NEXT: v_cvt_u32_f32_e32 v10, v10
986 ; TONGA-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12
987 ; TONGA-NEXT: v_cvt_u32_f32_e32 v12, v12
988 ; TONGA-NEXT: v_sub_u32_e32 v11, vcc, 0, v5
989 ; TONGA-NEXT: v_mul_lo_u32 v9, v9, v8
990 ; TONGA-NEXT: v_mul_lo_u32 v11, v11, v10
991 ; TONGA-NEXT: v_sub_u32_e32 v13, vcc, 0, v6
992 ; TONGA-NEXT: v_mul_lo_u32 v13, v13, v12
993 ; TONGA-NEXT: v_mul_hi_u32 v9, v8, v9
994 ; TONGA-NEXT: v_mul_hi_u32 v11, v10, v11
995 ; TONGA-NEXT: v_ashrrev_i32_e32 v14, 31, v7
996 ; TONGA-NEXT: v_add_u32_e32 v7, vcc, v7, v14
997 ; TONGA-NEXT: v_mul_hi_u32 v13, v12, v13
998 ; TONGA-NEXT: v_xor_b32_e32 v7, v7, v14
999 ; TONGA-NEXT: v_cvt_f32_u32_e32 v18, v7
1000 ; TONGA-NEXT: v_add_u32_e32 v8, vcc, v8, v9
1001 ; TONGA-NEXT: v_add_u32_e32 v9, vcc, v10, v11
1002 ; TONGA-NEXT: v_mul_hi_u32 v8, v0, v8
1003 ; TONGA-NEXT: v_mul_hi_u32 v9, v1, v9
1004 ; TONGA-NEXT: v_add_u32_e32 v10, vcc, v12, v13
1005 ; TONGA-NEXT: v_mul_hi_u32 v10, v2, v10
1006 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v18, v18
1007 ; TONGA-NEXT: v_mul_lo_u32 v11, v8, v4
1008 ; TONGA-NEXT: v_mul_lo_u32 v13, v9, v5
1009 ; TONGA-NEXT: v_mul_lo_u32 v21, v10, v6
1010 ; TONGA-NEXT: v_mul_f32_e32 v18, 0x4f7ffffe, v18
1011 ; TONGA-NEXT: v_cvt_u32_f32_e32 v18, v18
1012 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v11
1013 ; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v1, v13
1014 ; TONGA-NEXT: v_add_u32_e32 v12, vcc, 1, v8
1015 ; TONGA-NEXT: v_add_u32_e32 v20, vcc, 1, v9
1016 ; TONGA-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v4
1017 ; TONGA-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v5
1018 ; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v21
1019 ; TONGA-NEXT: v_sub_u32_e32 v11, vcc, v0, v4
1020 ; TONGA-NEXT: v_cndmask_b32_e64 v8, v8, v12, s[0:1]
1021 ; TONGA-NEXT: v_sub_u32_e32 v12, vcc, v1, v5
1022 ; TONGA-NEXT: v_cndmask_b32_e64 v9, v9, v20, s[2:3]
1023 ; TONGA-NEXT: v_sub_u32_e32 v19, vcc, 0, v7
1024 ; TONGA-NEXT: v_add_u32_e32 v22, vcc, 1, v10
1025 ; TONGA-NEXT: v_sub_u32_e32 v13, vcc, v2, v6
1026 ; TONGA-NEXT: v_cndmask_b32_e64 v0, v0, v11, s[0:1]
1027 ; TONGA-NEXT: v_add_u32_e32 v11, vcc, 1, v8
1028 ; TONGA-NEXT: v_cndmask_b32_e64 v1, v1, v12, s[2:3]
1029 ; TONGA-NEXT: v_add_u32_e32 v12, vcc, 1, v9
1030 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4
1031 ; TONGA-NEXT: v_mul_lo_u32 v4, v19, v18
1032 ; TONGA-NEXT: v_cndmask_b32_e32 v0, v8, v11, vcc
1033 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v1, v5
1034 ; TONGA-NEXT: v_ashrrev_i32_e32 v8, 31, v3
1035 ; TONGA-NEXT: v_mul_hi_u32 v4, v18, v4
1036 ; TONGA-NEXT: v_cndmask_b32_e32 v1, v9, v12, vcc
1037 ; TONGA-NEXT: v_add_u32_e32 v3, vcc, v3, v8
1038 ; TONGA-NEXT: v_xor_b32_e32 v3, v3, v8
1039 ; TONGA-NEXT: v_add_u32_e32 v4, vcc, v18, v4
1040 ; TONGA-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v6
1041 ; TONGA-NEXT: v_mul_hi_u32 v4, v3, v4
1042 ; TONGA-NEXT: v_cndmask_b32_e64 v10, v10, v22, s[4:5]
1043 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v15
1044 ; TONGA-NEXT: v_xor_b32_e32 v1, v1, v16
1045 ; TONGA-NEXT: v_cndmask_b32_e64 v2, v2, v13, s[4:5]
1046 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v0, v15
1047 ; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v1, v16
1048 ; TONGA-NEXT: v_add_u32_e32 v5, vcc, 1, v10
1049 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6
1050 ; TONGA-NEXT: v_cndmask_b32_e32 v2, v10, v5, vcc
1051 ; TONGA-NEXT: v_mul_lo_u32 v5, v4, v7
1052 ; TONGA-NEXT: v_xor_b32_e32 v2, v2, v17
1053 ; TONGA-NEXT: v_sub_u32_e32 v2, vcc, v2, v17
1054 ; TONGA-NEXT: v_sub_u32_e32 v3, vcc, v3, v5
1055 ; TONGA-NEXT: v_xor_b32_e32 v6, v8, v14
1056 ; TONGA-NEXT: v_add_u32_e32 v5, vcc, 1, v4
1057 ; TONGA-NEXT: v_sub_u32_e32 v8, vcc, v3, v7
1058 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v3, v7
1059 ; TONGA-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc
1060 ; TONGA-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc
1061 ; TONGA-NEXT: v_add_u32_e32 v5, vcc, 1, v4
1062 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v3, v7
1063 ; TONGA-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
1064 ; TONGA-NEXT: v_xor_b32_e32 v3, v3, v6
1065 ; TONGA-NEXT: v_sub_u32_e32 v3, vcc, v3, v6
1066 ; TONGA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
1067 ; TONGA-NEXT: s_endpgm
1068 ;
1069 ; GFX9-LABEL: sdiv_v4i32:
1070 ; GFX9: ; %bb.0:
1071 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1072 ; GFX9-NEXT: s_mov_b32 s3, 0xf000
1073 ; GFX9-NEXT: s_mov_b32 s2, -1
1074 ; GFX9-NEXT: s_mov_b32 s10, s2
1075 ; GFX9-NEXT: s_mov_b32 s11, s3
1076 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1077 ; GFX9-NEXT: s_mov_b32 s8, s6
1078 ; GFX9-NEXT: s_mov_b32 s9, s7
1079 ; GFX9-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0 offset:16
1080 ; GFX9-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0
1081 ; GFX9-NEXT: s_mov_b32 s0, s4
1082 ; GFX9-NEXT: s_waitcnt vmcnt(1)
1083 ; GFX9-NEXT: v_readfirstlane_b32 s1, v0
1084 ; GFX9-NEXT: s_ashr_i32 s4, s1, 31
1085 ; GFX9-NEXT: s_add_i32 s1, s1, s4
1086 ; GFX9-NEXT: s_xor_b32 s6, s1, s4
1087 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s6
1088 ; GFX9-NEXT: s_waitcnt vmcnt(0)
1089 ; GFX9-NEXT: v_readfirstlane_b32 s8, v4
1090 ; GFX9-NEXT: s_ashr_i32 s9, s8, 31
1091 ; GFX9-NEXT: s_add_i32 s8, s8, s9
1092 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
1093 ; GFX9-NEXT: s_xor_b32 s4, s9, s4
1094 ; GFX9-NEXT: s_xor_b32 s8, s8, s9
1095 ; GFX9-NEXT: s_sub_i32 s9, 0, s6
1096 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
1097 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
1098 ; GFX9-NEXT: v_readfirstlane_b32 s7, v1
1099 ; GFX9-NEXT: s_mov_b32 s1, s5
1100 ; GFX9-NEXT: v_readfirstlane_b32 s5, v3
1101 ; GFX9-NEXT: v_readfirstlane_b32 s10, v0
1102 ; GFX9-NEXT: s_mul_i32 s9, s9, s10
1103 ; GFX9-NEXT: s_mul_hi_u32 s9, s10, s9
1104 ; GFX9-NEXT: s_add_i32 s10, s10, s9
1105 ; GFX9-NEXT: s_mul_hi_u32 s9, s8, s10
1106 ; GFX9-NEXT: s_mul_i32 s10, s9, s6
1107 ; GFX9-NEXT: s_sub_i32 s8, s8, s10
1108 ; GFX9-NEXT: s_add_i32 s11, s9, 1
1109 ; GFX9-NEXT: s_sub_i32 s10, s8, s6
1110 ; GFX9-NEXT: s_cmp_ge_u32 s8, s6
1111 ; GFX9-NEXT: s_cselect_b32 s9, s11, s9
1112 ; GFX9-NEXT: s_cselect_b32 s8, s10, s8
1113 ; GFX9-NEXT: s_add_i32 s10, s9, 1
1114 ; GFX9-NEXT: s_cmp_ge_u32 s8, s6
1115 ; GFX9-NEXT: s_cselect_b32 s6, s10, s9
1116 ; GFX9-NEXT: s_ashr_i32 s8, s7, 31
1117 ; GFX9-NEXT: s_add_i32 s7, s7, s8
1118 ; GFX9-NEXT: s_xor_b32 s7, s7, s8
1119 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s7
1120 ; GFX9-NEXT: v_readfirstlane_b32 s10, v5
1121 ; GFX9-NEXT: s_ashr_i32 s11, s10, 31
1122 ; GFX9-NEXT: s_xor_b32 s6, s6, s4
1123 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
1124 ; GFX9-NEXT: s_add_i32 s10, s10, s11
1125 ; GFX9-NEXT: s_xor_b32 s8, s11, s8
1126 ; GFX9-NEXT: s_sub_i32 s4, s6, s4
1127 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
1128 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
1129 ; GFX9-NEXT: s_xor_b32 s6, s10, s11
1130 ; GFX9-NEXT: s_sub_i32 s10, 0, s7
1131 ; GFX9-NEXT: v_readfirstlane_b32 s9, v2
1132 ; GFX9-NEXT: v_readfirstlane_b32 s11, v0
1133 ; GFX9-NEXT: s_mul_i32 s10, s10, s11
1134 ; GFX9-NEXT: s_mul_hi_u32 s10, s11, s10
1135 ; GFX9-NEXT: s_add_i32 s11, s11, s10
1136 ; GFX9-NEXT: s_mul_hi_u32 s10, s6, s11
1137 ; GFX9-NEXT: s_mul_i32 s11, s10, s7
1138 ; GFX9-NEXT: s_sub_i32 s6, s6, s11
1139 ; GFX9-NEXT: s_add_i32 s12, s10, 1
1140 ; GFX9-NEXT: s_sub_i32 s11, s6, s7
1141 ; GFX9-NEXT: s_cmp_ge_u32 s6, s7
1142 ; GFX9-NEXT: s_cselect_b32 s10, s12, s10
1143 ; GFX9-NEXT: s_cselect_b32 s6, s11, s6
1144 ; GFX9-NEXT: s_add_i32 s11, s10, 1
1145 ; GFX9-NEXT: s_cmp_ge_u32 s6, s7
1146 ; GFX9-NEXT: s_cselect_b32 s6, s11, s10
1147 ; GFX9-NEXT: s_ashr_i32 s7, s9, 31
1148 ; GFX9-NEXT: s_add_i32 s9, s9, s7
1149 ; GFX9-NEXT: s_xor_b32 s9, s9, s7
1150 ; GFX9-NEXT: v_cvt_f32_u32_e32 v0, s9
1151 ; GFX9-NEXT: v_readfirstlane_b32 s11, v6
1152 ; GFX9-NEXT: s_ashr_i32 s12, s11, 31
1153 ; GFX9-NEXT: s_xor_b32 s6, s6, s8
1154 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v0
1155 ; GFX9-NEXT: s_add_i32 s11, s11, s12
1156 ; GFX9-NEXT: s_xor_b32 s7, s12, s7
1157 ; GFX9-NEXT: s_sub_i32 s6, s6, s8
1158 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
1159 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
1160 ; GFX9-NEXT: s_xor_b32 s8, s11, s12
1161 ; GFX9-NEXT: s_sub_i32 s11, 0, s9
1162 ; GFX9-NEXT: v_readfirstlane_b32 s10, v7
1163 ; GFX9-NEXT: v_readfirstlane_b32 s12, v0
1164 ; GFX9-NEXT: s_mul_i32 s11, s11, s12
1165 ; GFX9-NEXT: s_mul_hi_u32 s11, s12, s11
1166 ; GFX9-NEXT: s_add_i32 s12, s12, s11
1167 ; GFX9-NEXT: s_mul_hi_u32 s11, s8, s12
1168 ; GFX9-NEXT: s_mul_i32 s12, s11, s9
1169 ; GFX9-NEXT: s_sub_i32 s8, s8, s12
1170 ; GFX9-NEXT: s_add_i32 s13, s11, 1
1171 ; GFX9-NEXT: s_sub_i32 s12, s8, s9
1172 ; GFX9-NEXT: s_cmp_ge_u32 s8, s9
1173 ; GFX9-NEXT: s_cselect_b32 s11, s13, s11
1174 ; GFX9-NEXT: s_cselect_b32 s8, s12, s8
1175 ; GFX9-NEXT: s_add_i32 s12, s11, 1
1176 ; GFX9-NEXT: s_cmp_ge_u32 s8, s9
1177 ; GFX9-NEXT: s_cselect_b32 s8, s12, s11
1178 ; GFX9-NEXT: s_ashr_i32 s9, s5, 31
1179 ; GFX9-NEXT: s_add_i32 s5, s5, s9
1180 ; GFX9-NEXT: s_xor_b32 s5, s5, s9
1181 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s5
1182 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
1183 ; GFX9-NEXT: v_mov_b32_e32 v1, s6
1184 ; GFX9-NEXT: s_ashr_i32 s4, s10, 31
1185 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v2, v2
1186 ; GFX9-NEXT: s_xor_b32 s6, s8, s7
1187 ; GFX9-NEXT: s_xor_b32 s8, s4, s9
1188 ; GFX9-NEXT: s_sub_i32 s6, s6, s7
1189 ; GFX9-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2
1190 ; GFX9-NEXT: v_cvt_u32_f32_e32 v2, v2
1191 ; GFX9-NEXT: s_sub_i32 s7, 0, s5
1192 ; GFX9-NEXT: s_add_i32 s10, s10, s4
1193 ; GFX9-NEXT: s_xor_b32 s4, s10, s4
1194 ; GFX9-NEXT: v_readfirstlane_b32 s9, v2
1195 ; GFX9-NEXT: s_mul_i32 s7, s7, s9
1196 ; GFX9-NEXT: s_mul_hi_u32 s7, s9, s7
1197 ; GFX9-NEXT: s_add_i32 s9, s9, s7
1198 ; GFX9-NEXT: s_mul_hi_u32 s7, s4, s9
1199 ; GFX9-NEXT: s_mul_i32 s9, s7, s5
1200 ; GFX9-NEXT: s_sub_i32 s4, s4, s9
1201 ; GFX9-NEXT: s_add_i32 s10, s7, 1
1202 ; GFX9-NEXT: s_sub_i32 s9, s4, s5
1203 ; GFX9-NEXT: s_cmp_ge_u32 s4, s5
1204 ; GFX9-NEXT: s_cselect_b32 s7, s10, s7
1205 ; GFX9-NEXT: s_cselect_b32 s4, s9, s4
1206 ; GFX9-NEXT: s_add_i32 s9, s7, 1
1207 ; GFX9-NEXT: s_cmp_ge_u32 s4, s5
1208 ; GFX9-NEXT: s_cselect_b32 s4, s9, s7
1209 ; GFX9-NEXT: s_xor_b32 s4, s4, s8
1210 ; GFX9-NEXT: s_sub_i32 s4, s4, s8
1211 ; GFX9-NEXT: v_mov_b32_e32 v2, s6
1212 ; GFX9-NEXT: v_mov_b32_e32 v3, s4
1213 ; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1214 ; GFX9-NEXT: s_endpgm
1215 ;
1216 ; EG-LABEL: sdiv_v4i32:
1217 ; EG: ; %bb.0:
1218 ; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]
1219 ; EG-NEXT: TEX 1 @6
1220 ; EG-NEXT: ALU 101, @11, KC0[CB0:0-32], KC1[]
1221 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
1222 ; EG-NEXT: CF_END
1223 ; EG-NEXT: PAD
1224 ; EG-NEXT: Fetch clause starting at 6:
1225 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1
1226 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
1227 ; EG-NEXT: ALU clause starting at 10:
1228 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1229 ; EG-NEXT: ALU clause starting at 11:
1230 ; EG-NEXT: SETGT_INT * T2.W, 0.0, T1.W,
1231 ; EG-NEXT: ADD_INT * T1.W, T1.W, PV.W,
1232 ; EG-NEXT: XOR_INT * T1.W, PV.W, T2.W,
1233 ; EG-NEXT: SUB_INT T3.W, 0.0, PV.W,
1234 ; EG-NEXT: RECIP_UINT * T2.X, PV.W,
1235 ; EG-NEXT: SETGT_INT T4.W, 0.0, T0.W,
1236 ; EG-NEXT: MULLO_INT * T2.Y, PV.W, PS,
1237 ; EG-NEXT: SETGT_INT T2.Z, 0.0, T1.Y,
1238 ; EG-NEXT: ADD_INT T0.W, T0.W, PV.W,
1239 ; EG-NEXT: MULHI * T2.Y, T2.X, PS,
1240 ; EG-NEXT: ADD_INT T3.Z, T2.X, PS,
1241 ; EG-NEXT: XOR_INT T0.W, PV.W, T4.W,
1242 ; EG-NEXT: ADD_INT * T3.W, T1.Y, PV.Z,
1243 ; EG-NEXT: XOR_INT T3.W, PS, T2.Z,
1244 ; EG-NEXT: MULHI * T1.Y, PV.W, PV.Z,
1245 ; EG-NEXT: SUB_INT T5.W, 0.0, PV.W,
1246 ; EG-NEXT: RECIP_UINT * T2.X, PV.W,
1247 ; EG-NEXT: SETGT_INT T6.W, 0.0, T0.Y,
1248 ; EG-NEXT: MULLO_INT * T2.Y, PV.W, PS,
1249 ; EG-NEXT: ADD_INT T5.W, T0.Y, PV.W,
1250 ; EG-NEXT: MULHI * T0.Y, T2.X, PS,
1251 ; EG-NEXT: ADD_INT T0.Y, T2.X, PS,
1252 ; EG-NEXT: XOR_INT T3.Z, PV.W, T6.W, BS:VEC_021/SCL_122
1253 ; EG-NEXT: SETGT_INT T5.W, 0.0, T1.Z,
1254 ; EG-NEXT: MULLO_INT * T2.X, T1.Y, T1.W,
1255 ; EG-NEXT: ADD_INT T7.W, T1.Z, PV.W,
1256 ; EG-NEXT: MULHI * T0.Y, PV.Z, PV.Y,
1257 ; EG-NEXT: XOR_INT T7.W, PV.W, T5.W, BS:VEC_021/SCL_122
1258 ; EG-NEXT: MULLO_INT * T1.Z, PS, T3.W,
1259 ; EG-NEXT: SUB_INT T4.Z, 0.0, PV.W,
1260 ; EG-NEXT: SETGT_INT T8.W, 0.0, T1.X,
1261 ; EG-NEXT: RECIP_UINT * T2.Y, PV.W,
1262 ; EG-NEXT: ADD_INT T9.W, T1.X, PV.W,
1263 ; EG-NEXT: MULLO_INT * T1.X, PV.Z, PS,
1264 ; EG-NEXT: SETGT_INT T4.Z, 0.0, T0.Z,
1265 ; EG-NEXT: XOR_INT T9.W, PV.W, T8.W,
1266 ; EG-NEXT: MULHI * T1.X, T2.Y, PS,
1267 ; EG-NEXT: ADD_INT T1.X, T2.Y, PS,
1268 ; EG-NEXT: SUB_INT T2.Y, 0.0, PV.W,
1269 ; EG-NEXT: SUB_INT T1.Z, T3.Z, T1.Z,
1270 ; EG-NEXT: ADD_INT T10.W, T0.Z, PV.Z, BS:VEC_201
1271 ; EG-NEXT: RECIP_UINT * T0.Z, PV.W,
1272 ; EG-NEXT: XOR_INT T3.X, PV.W, T4.Z,
1273 ; EG-NEXT: ADD_INT T3.Y, T0.Y, 1,
1274 ; EG-NEXT: SETGE_UINT T3.Z, PV.Z, T3.W,
1275 ; EG-NEXT: SUB_INT T10.W, PV.Z, T3.W,
1276 ; EG-NEXT: MULLO_INT * T2.Y, PV.Y, PS,
1277 ; EG-NEXT: CNDE_INT T1.Z, PV.Z, T1.Z, PV.W,
1278 ; EG-NEXT: CNDE_INT T10.W, PV.Z, T0.Y, PV.Y,
1279 ; EG-NEXT: MULHI * T0.Y, PV.X, T1.X,
1280 ; EG-NEXT: SETGT_INT T3.Y, 0.0, T0.X,
1281 ; EG-NEXT: ADD_INT T3.Z, PV.W, 1,
1282 ; EG-NEXT: SETGE_UINT T3.W, PV.Z, T3.W, BS:VEC_021/SCL_122
1283 ; EG-NEXT: MULLO_INT * T1.X, PS, T7.W,
1284 ; EG-NEXT: CNDE_INT T4.Y, PV.W, T10.W, PV.Z,
1285 ; EG-NEXT: ADD_INT T1.Z, T0.X, PV.Y,
1286 ; EG-NEXT: SUB_INT T3.W, T3.X, PS, BS:VEC_120/SCL_212
1287 ; EG-NEXT: MULHI * T0.X, T0.Z, T2.Y,
1288 ; EG-NEXT: ADD_INT T1.X, T0.Y, 1,
1289 ; EG-NEXT: SETGE_UINT T2.Y, PV.W, T7.W,
1290 ; EG-NEXT: ADD_INT T0.Z, T0.Z, PS,
1291 ; EG-NEXT: XOR_INT T10.W, PV.Z, T3.Y,
1292 ; EG-NEXT: SUB_INT * T0.W, T0.W, T2.X,
1293 ; EG-NEXT: SUB_INT T0.X, T3.W, T7.W,
1294 ; EG-NEXT: ADD_INT T5.Y, T1.Y, 1,
1295 ; EG-NEXT: SETGE_UINT T1.Z, PS, T1.W, BS:VEC_021/SCL_122
1296 ; EG-NEXT: SUB_INT T11.W, PS, T1.W, BS:VEC_021/SCL_122
1297 ; EG-NEXT: MULHI * T0.Z, PV.W, PV.Z,
1298 ; EG-NEXT: CNDE_INT T2.X, PV.Z, T0.W, PV.W, BS:VEC_021/SCL_122
1299 ; EG-NEXT: CNDE_INT T1.Y, PV.Z, T1.Y, PV.Y,
1300 ; EG-NEXT: CNDE_INT T1.Z, T2.Y, T3.W, PV.X, BS:VEC_201
1301 ; EG-NEXT: CNDE_INT T0.W, T2.Y, T0.Y, T1.X, BS:VEC_201
1302 ; EG-NEXT: MULLO_INT * T0.X, PS, T9.W,
1303 ; EG-NEXT: ADD_INT T1.X, PV.W, 1,
1304 ; EG-NEXT: SETGE_UINT T0.Y, PV.Z, T7.W,
1305 ; EG-NEXT: ADD_INT T1.Z, PV.Y, 1,
1306 ; EG-NEXT: SETGE_UINT T1.W, PV.X, T1.W, BS:VEC_102/SCL_221
1307 ; EG-NEXT: SUB_INT * T3.W, T10.W, PS,
1308 ; EG-NEXT: ADD_INT T0.X, T0.Z, 1,
1309 ; EG-NEXT: SETGE_UINT T2.Y, PS, T9.W, BS:VEC_102/SCL_221
1310 ; EG-NEXT: SUB_INT T3.Z, PS, T9.W, BS:VEC_102/SCL_221
1311 ; EG-NEXT: CNDE_INT T1.W, PV.W, T1.Y, PV.Z,
1312 ; EG-NEXT: XOR_INT * T2.W, T4.W, T2.W,
1313 ; EG-NEXT: XOR_INT T2.X, PV.W, PS,
1314 ; EG-NEXT: CNDE_INT T1.Y, PV.Y, T3.W, PV.Z, BS:VEC_021/SCL_122
1315 ; EG-NEXT: CNDE_INT T0.Z, PV.Y, T0.Z, PV.X,
1316 ; EG-NEXT: CNDE_INT T0.W, T0.Y, T0.W, T1.X, BS:VEC_102/SCL_221
1317 ; EG-NEXT: XOR_INT * T1.W, T4.Z, T5.W,
1318 ; EG-NEXT: XOR_INT T0.X, T6.W, T2.Z,
1319 ; EG-NEXT: XOR_INT T0.Y, PV.W, PS,
1320 ; EG-NEXT: ADD_INT T1.Z, PV.Z, 1,
1321 ; EG-NEXT: SETGE_UINT T0.W, PV.Y, T9.W, BS:VEC_021/SCL_122
1322 ; EG-NEXT: SUB_INT * T2.W, PV.X, T2.W,
1323 ; EG-NEXT: CNDE_INT T1.Y, PV.W, T0.Z, PV.Z,
1324 ; EG-NEXT: SUB_INT T2.Z, PV.Y, T1.W,
1325 ; EG-NEXT: XOR_INT T0.W, T3.Y, T8.W, BS:VEC_021/SCL_122
1326 ; EG-NEXT: XOR_INT * T1.W, T4.Y, PV.X,
1327 ; EG-NEXT: SUB_INT T2.Y, PS, T0.X,
1328 ; EG-NEXT: XOR_INT * T1.W, PV.Y, PV.W,
1329 ; EG-NEXT: SUB_INT T2.X, PV.W, T0.W,
1330 ; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,
1331 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1332 %den_ptr = getelementptr <4 x i32>, ptr addrspace(1) %in, i32 1
1333 %num = load <4 x i32>, ptr addrspace(1) %in
1334 %den = load <4 x i32>, ptr addrspace(1) %den_ptr
1335 %result = sdiv <4 x i32> %num, %den
1336 store <4 x i32> %result, ptr addrspace(1) %out
1337 ret void
1338 }
1340 define amdgpu_kernel void @sdiv_v4i32_4(ptr addrspace(1) %out, ptr addrspace(1) %in) {
1341 ; GCN-LABEL: sdiv_v4i32_4:
1342 ; GCN: ; %bb.0:
1343 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1344 ; GCN-NEXT: s_mov_b32 s7, 0xf000
1345 ; GCN-NEXT: s_mov_b32 s6, -1
1346 ; GCN-NEXT: s_mov_b32 s10, s6
1347 ; GCN-NEXT: s_mov_b32 s11, s7
1348 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1349 ; GCN-NEXT: s_mov_b32 s8, s2
1350 ; GCN-NEXT: s_mov_b32 s9, s3
1351 ; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1352 ; GCN-NEXT: s_mov_b32 s4, s0
1353 ; GCN-NEXT: s_mov_b32 s5, s1
1354 ; GCN-NEXT: s_waitcnt vmcnt(0)
1355 ; GCN-NEXT: v_ashrrev_i32_e32 v4, 31, v0
1356 ; GCN-NEXT: v_ashrrev_i32_e32 v5, 31, v1
1357 ; GCN-NEXT: v_ashrrev_i32_e32 v6, 31, v2
1358 ; GCN-NEXT: v_ashrrev_i32_e32 v7, 31, v3
1359 ; GCN-NEXT: v_lshrrev_b32_e32 v4, 30, v4
1360 ; GCN-NEXT: v_lshrrev_b32_e32 v5, 30, v5
1361 ; GCN-NEXT: v_lshrrev_b32_e32 v6, 30, v6
1362 ; GCN-NEXT: v_lshrrev_b32_e32 v7, 30, v7
1363 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v4, v0
1364 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v5, v1
1365 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v6, v2
1366 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v7, v3
1367 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 2, v0
1368 ; GCN-NEXT: v_ashrrev_i32_e32 v1, 2, v1
1369 ; GCN-NEXT: v_ashrrev_i32_e32 v2, 2, v2
1370 ; GCN-NEXT: v_ashrrev_i32_e32 v3, 2, v3
1371 ; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1372 ; GCN-NEXT: s_endpgm
1373 ;
1374 ; TONGA-LABEL: sdiv_v4i32_4:
1375 ; TONGA: ; %bb.0:
1376 ; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1377 ; TONGA-NEXT: s_mov_b32 s3, 0xf000
1378 ; TONGA-NEXT: s_mov_b32 s2, -1
1379 ; TONGA-NEXT: s_mov_b32 s10, s2
1380 ; TONGA-NEXT: s_mov_b32 s11, s3
1381 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
1382 ; TONGA-NEXT: s_mov_b32 s8, s6
1383 ; TONGA-NEXT: s_mov_b32 s9, s7
1384 ; TONGA-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1385 ; TONGA-NEXT: s_mov_b32 s0, s4
1386 ; TONGA-NEXT: s_mov_b32 s1, s5
1387 ; TONGA-NEXT: s_waitcnt vmcnt(0)
1388 ; TONGA-NEXT: v_ashrrev_i32_e32 v4, 31, v0
1389 ; TONGA-NEXT: v_ashrrev_i32_e32 v5, 31, v1
1390 ; TONGA-NEXT: v_ashrrev_i32_e32 v6, 31, v2
1391 ; TONGA-NEXT: v_ashrrev_i32_e32 v7, 31, v3
1392 ; TONGA-NEXT: v_lshrrev_b32_e32 v4, 30, v4
1393 ; TONGA-NEXT: v_lshrrev_b32_e32 v5, 30, v5
1394 ; TONGA-NEXT: v_lshrrev_b32_e32 v6, 30, v6
1395 ; TONGA-NEXT: v_lshrrev_b32_e32 v7, 30, v7
1396 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v4, v0
1397 ; TONGA-NEXT: v_add_u32_e32 v1, vcc, v5, v1
1398 ; TONGA-NEXT: v_add_u32_e32 v2, vcc, v6, v2
1399 ; TONGA-NEXT: v_add_u32_e32 v3, vcc, v7, v3
1400 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 2, v0
1401 ; TONGA-NEXT: v_ashrrev_i32_e32 v1, 2, v1
1402 ; TONGA-NEXT: v_ashrrev_i32_e32 v2, 2, v2
1403 ; TONGA-NEXT: v_ashrrev_i32_e32 v3, 2, v3
1404 ; TONGA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1405 ; TONGA-NEXT: s_endpgm
1406 ;
1407 ; GFX9-LABEL: sdiv_v4i32_4:
1408 ; GFX9: ; %bb.0:
1409 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1410 ; GFX9-NEXT: s_mov_b32 s7, 0xf000
1411 ; GFX9-NEXT: s_mov_b32 s6, -1
1412 ; GFX9-NEXT: s_mov_b32 s10, s6
1413 ; GFX9-NEXT: s_mov_b32 s11, s7
1414 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1415 ; GFX9-NEXT: s_mov_b32 s8, s2
1416 ; GFX9-NEXT: s_mov_b32 s9, s3
1417 ; GFX9-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1418 ; GFX9-NEXT: s_mov_b32 s4, s0
1419 ; GFX9-NEXT: s_mov_b32 s5, s1
1420 ; GFX9-NEXT: s_waitcnt vmcnt(0)
1421 ; GFX9-NEXT: v_ashrrev_i32_e32 v4, 31, v0
1422 ; GFX9-NEXT: v_ashrrev_i32_e32 v5, 31, v1
1423 ; GFX9-NEXT: v_ashrrev_i32_e32 v6, 31, v2
1424 ; GFX9-NEXT: v_ashrrev_i32_e32 v7, 31, v3
1425 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 30, v4
1426 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 30, v5
1427 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 30, v6
1428 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 30, v7
1429 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v4
1430 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v5
1431 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v6
1432 ; GFX9-NEXT: v_add_u32_e32 v3, v3, v7
1433 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 2, v0
1434 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 2, v1
1435 ; GFX9-NEXT: v_ashrrev_i32_e32 v2, 2, v2
1436 ; GFX9-NEXT: v_ashrrev_i32_e32 v3, 2, v3
1437 ; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1438 ; GFX9-NEXT: s_endpgm
1439 ;
1440 ; EG-LABEL: sdiv_v4i32_4:
1441 ; EG: ; %bb.0:
1442 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1443 ; EG-NEXT: TEX 0 @6
1444 ; EG-NEXT: ALU 24, @9, KC0[CB0:0-32], KC1[]
1445 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
1446 ; EG-NEXT: CF_END
1447 ; EG-NEXT: PAD
1448 ; EG-NEXT: Fetch clause starting at 6:
1449 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
1450 ; EG-NEXT: ALU clause starting at 8:
1451 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1452 ; EG-NEXT: ALU clause starting at 9:
1453 ; EG-NEXT: ASHR T1.W, T0.W, literal.x,
1454 ; EG-NEXT: ASHR * T2.W, T0.Z, literal.x,
1455 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
1456 ; EG-NEXT: LSHR * T1.W, PV.W, literal.x,
1457 ; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)
1458 ; EG-NEXT: ADD_INT T1.Z, T0.W, PV.W,
1459 ; EG-NEXT: LSHR T0.W, T2.W, literal.x, BS:VEC_120/SCL_212
1460 ; EG-NEXT: ASHR * T1.W, T0.Y, literal.y,
1461 ; EG-NEXT: 30(4.203895e-44), 31(4.344025e-44)
1462 ; EG-NEXT: LSHR T1.Y, PS, literal.x,
1463 ; EG-NEXT: ASHR T2.Z, T0.X, literal.y,
1464 ; EG-NEXT: ADD_INT T0.W, T0.Z, PV.W,
1465 ; EG-NEXT: ASHR * T1.W, PV.Z, literal.z,
1466 ; EG-NEXT: 30(4.203895e-44), 31(4.344025e-44)
1467 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1468 ; EG-NEXT: ASHR T1.Z, PV.W, literal.x,
1469 ; EG-NEXT: LSHR T0.W, PV.Z, literal.y,
1470 ; EG-NEXT: ADD_INT * T2.W, T0.Y, PV.Y,
1471 ; EG-NEXT: 2(2.802597e-45), 30(4.203895e-44)
1472 ; EG-NEXT: ASHR T1.Y, PS, literal.x,
1473 ; EG-NEXT: ADD_INT * T0.W, T0.X, PV.W,
1474 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1475 ; EG-NEXT: ASHR T1.X, PV.W, literal.x,
1476 ; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,
1477 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1478 %num = load <4 x i32>, ptr addrspace(1) %in
1479 %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
1480 store <4 x i32> %result, ptr addrspace(1) %out
1481 ret void
1482 }
1484 define amdgpu_kernel void @v_sdiv_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) {
1485 ; GCN-LABEL: v_sdiv_i8:
1486 ; GCN: ; %bb.0:
1487 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1488 ; GCN-NEXT: s_mov_b32 s7, 0xf000
1489 ; GCN-NEXT: s_mov_b32 s6, -1
1490 ; GCN-NEXT: s_mov_b32 s10, s6
1491 ; GCN-NEXT: s_mov_b32 s11, s7
1492 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1493 ; GCN-NEXT: s_mov_b32 s8, s2
1494 ; GCN-NEXT: s_mov_b32 s9, s3
1495 ; GCN-NEXT: buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1496 ; GCN-NEXT: buffer_load_sbyte v1, off, s[8:11], 0
1497 ; GCN-NEXT: s_mov_b32 s4, s0
1498 ; GCN-NEXT: s_mov_b32 s5, s1
1499 ; GCN-NEXT: s_waitcnt vmcnt(1)
1500 ; GCN-NEXT: v_cvt_f32_i32_e32 v2, v0
1501 ; GCN-NEXT: s_waitcnt vmcnt(0)
1502 ; GCN-NEXT: v_cvt_f32_i32_e32 v3, v1
1503 ; GCN-NEXT: v_xor_b32_e32 v0, v1, v0
1504 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1505 ; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v2
1506 ; GCN-NEXT: v_or_b32_e32 v0, 1, v0
1507 ; GCN-NEXT: v_mul_f32_e32 v1, v3, v4
1508 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
1509 ; GCN-NEXT: v_mad_f32 v3, -v1, v2, v3
1510 ; GCN-NEXT: v_cvt_i32_f32_e32 v1, v1
1511 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1512 ; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1513 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
1514 ; GCN-NEXT: v_bfe_i32 v0, v0, 0, 8
1515 ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
1516 ; GCN-NEXT: s_endpgm
1517 ;
1518 ; TONGA-LABEL: v_sdiv_i8:
1519 ; TONGA: ; %bb.0:
1520 ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1521 ; TONGA-NEXT: s_mov_b32 s7, 0xf000
1522 ; TONGA-NEXT: s_mov_b32 s6, -1
1523 ; TONGA-NEXT: s_mov_b32 s10, s6
1524 ; TONGA-NEXT: s_mov_b32 s11, s7
1525 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
1526 ; TONGA-NEXT: s_mov_b32 s8, s2
1527 ; TONGA-NEXT: s_mov_b32 s9, s3
1528 ; TONGA-NEXT: buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1529 ; TONGA-NEXT: buffer_load_sbyte v1, off, s[8:11], 0
1530 ; TONGA-NEXT: s_mov_b32 s4, s0
1531 ; TONGA-NEXT: s_mov_b32 s5, s1
1532 ; TONGA-NEXT: s_waitcnt vmcnt(1)
1533 ; TONGA-NEXT: v_cvt_f32_i32_e32 v2, v0
1534 ; TONGA-NEXT: s_waitcnt vmcnt(0)
1535 ; TONGA-NEXT: v_cvt_f32_i32_e32 v3, v1
1536 ; TONGA-NEXT: v_xor_b32_e32 v0, v1, v0
1537 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1538 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v4, v2
1539 ; TONGA-NEXT: v_or_b32_e32 v0, 1, v0
1540 ; TONGA-NEXT: v_mul_f32_e32 v1, v3, v4
1541 ; TONGA-NEXT: v_trunc_f32_e32 v1, v1
1542 ; TONGA-NEXT: v_mad_f32 v3, -v1, v2, v3
1543 ; TONGA-NEXT: v_cvt_i32_f32_e32 v1, v1
1544 ; TONGA-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1545 ; TONGA-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1546 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v1
1547 ; TONGA-NEXT: v_bfe_i32 v0, v0, 0, 8
1548 ; TONGA-NEXT: buffer_store_dword v0, off, s[4:7], 0
1549 ; TONGA-NEXT: s_endpgm
1550 ;
1551 ; GFX9-LABEL: v_sdiv_i8:
1552 ; GFX9: ; %bb.0:
1553 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1554 ; GFX9-NEXT: s_mov_b32 s7, 0xf000
1555 ; GFX9-NEXT: s_mov_b32 s6, -1
1556 ; GFX9-NEXT: s_mov_b32 s10, s6
1557 ; GFX9-NEXT: s_mov_b32 s11, s7
1558 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1559 ; GFX9-NEXT: s_mov_b32 s8, s2
1560 ; GFX9-NEXT: s_mov_b32 s9, s3
1561 ; GFX9-NEXT: buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1562 ; GFX9-NEXT: buffer_load_sbyte v1, off, s[8:11], 0
1563 ; GFX9-NEXT: s_mov_b32 s4, s0
1564 ; GFX9-NEXT: s_mov_b32 s5, s1
1565 ; GFX9-NEXT: s_waitcnt vmcnt(1)
1566 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, v0
1567 ; GFX9-NEXT: s_waitcnt vmcnt(0)
1568 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, v1
1569 ; GFX9-NEXT: v_xor_b32_e32 v0, v1, v0
1570 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1571 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v2
1572 ; GFX9-NEXT: v_or_b32_e32 v0, 1, v0
1573 ; GFX9-NEXT: v_mul_f32_e32 v1, v3, v4
1574 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
1575 ; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v1
1576 ; GFX9-NEXT: v_mad_f32 v1, -v1, v2, v3
1577 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v2|
1578 ; GFX9-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1579 ; GFX9-NEXT: v_add_u32_e32 v0, v4, v0
1580 ; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 8
1581 ; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0
1582 ; GFX9-NEXT: s_endpgm
1583 ;
1584 ; EG-LABEL: v_sdiv_i8:
1585 ; EG: ; %bb.0:
1586 ; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]
1587 ; EG-NEXT: TEX 1 @6
1588 ; EG-NEXT: ALU 21, @11, KC0[CB0:0-32], KC1[]
1589 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1590 ; EG-NEXT: CF_END
1591 ; EG-NEXT: PAD
1592 ; EG-NEXT: Fetch clause starting at 6:
1593 ; EG-NEXT: VTX_READ_8 T1.X, T0.X, 1, #1
1594 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #1
1595 ; EG-NEXT: ALU clause starting at 10:
1596 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1597 ; EG-NEXT: ALU clause starting at 11:
1598 ; EG-NEXT: BFE_INT * T0.W, T1.X, 0.0, literal.x,
1599 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
1600 ; EG-NEXT: INT_TO_FLT * T0.Y, PV.W,
1601 ; EG-NEXT: BFE_INT T1.W, T0.X, 0.0, literal.x,
1602 ; EG-NEXT: RECIP_IEEE * T0.X, PS,
1603 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
1604 ; EG-NEXT: INT_TO_FLT * T0.Z, PV.W,
1605 ; EG-NEXT: MUL_IEEE * T2.W, PS, T0.X,
1606 ; EG-NEXT: TRUNC T2.W, PV.W,
1607 ; EG-NEXT: XOR_INT * T0.W, T1.W, T0.W,
1608 ; EG-NEXT: ASHR T0.W, PS, literal.x,
1609 ; EG-NEXT: MULADD_IEEE * T1.W, -PV.W, T0.Y, T0.Z,
1610 ; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)
1611 ; EG-NEXT: TRUNC T0.Z, T2.W,
1612 ; EG-NEXT: SETGE T1.W, |PS|, |T0.Y|,
1613 ; EG-NEXT: OR_INT * T0.W, PV.W, 1,
1614 ; EG-NEXT: CNDE T0.W, PV.W, 0.0, PS,
1615 ; EG-NEXT: FLT_TO_INT * T1.W, PV.Z,
1616 ; EG-NEXT: ADD_INT * T0.W, PS, PV.W,
1617 ; EG-NEXT: BFE_INT T0.X, PV.W, 0.0, literal.x,
1618 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,
1619 ; EG-NEXT: 8(1.121039e-44), 2(2.802597e-45)
1620 %den_ptr = getelementptr i8, ptr addrspace(1) %in, i8 1
1621 %num = load i8, ptr addrspace(1) %in
1622 %den = load i8, ptr addrspace(1) %den_ptr
1623 %result = sdiv i8 %num, %den
1624 %result.ext = sext i8 %result to i32
1625 store i32 %result.ext, ptr addrspace(1) %out
1626 ret void
1627 }
1629 define amdgpu_kernel void @v_sdiv_i23(ptr addrspace(1) %out, ptr addrspace(1) %in) {
1630 ; GCN-LABEL: v_sdiv_i23:
1631 ; GCN: ; %bb.0:
1632 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1633 ; GCN-NEXT: s_mov_b32 s7, 0xf000
1634 ; GCN-NEXT: s_mov_b32 s6, -1
1635 ; GCN-NEXT: s_mov_b32 s10, s6
1636 ; GCN-NEXT: s_mov_b32 s11, s7
1637 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1638 ; GCN-NEXT: s_mov_b32 s8, s2
1639 ; GCN-NEXT: s_mov_b32 s9, s3
1640 ; GCN-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1641 ; GCN-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1642 ; GCN-NEXT: buffer_load_ushort v2, off, s[8:11], 0 offset:4
1643 ; GCN-NEXT: buffer_load_ushort v3, off, s[8:11], 0
1644 ; GCN-NEXT: s_mov_b32 s4, s0
1645 ; GCN-NEXT: s_mov_b32 s5, s1
1646 ; GCN-NEXT: s_waitcnt vmcnt(3)
1647 ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v0
1648 ; GCN-NEXT: s_waitcnt vmcnt(2)
1649 ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1
1650 ; GCN-NEXT: s_waitcnt vmcnt(1)
1651 ; GCN-NEXT: v_or_b32_e32 v1, v2, v1
1652 ; GCN-NEXT: v_bfe_i32 v1, v1, 0, 23
1653 ; GCN-NEXT: v_cvt_f32_i32_e32 v2, v1
1654 ; GCN-NEXT: s_waitcnt vmcnt(0)
1655 ; GCN-NEXT: v_or_b32_e32 v0, v3, v0
1656 ; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23
1657 ; GCN-NEXT: v_cvt_f32_i32_e32 v3, v0
1658 ; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v2
1659 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v1
1660 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1661 ; GCN-NEXT: v_or_b32_e32 v0, 1, v0
1662 ; GCN-NEXT: v_mul_f32_e32 v1, v3, v4
1663 ; GCN-NEXT: v_trunc_f32_e32 v1, v1
1664 ; GCN-NEXT: v_mad_f32 v3, -v1, v2, v3
1665 ; GCN-NEXT: v_cvt_i32_f32_e32 v1, v1
1666 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1667 ; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1668 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v1
1669 ; GCN-NEXT: v_bfe_i32 v0, v0, 0, 23
1670 ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
1671 ; GCN-NEXT: s_endpgm
1672 ;
1673 ; TONGA-LABEL: v_sdiv_i23:
1674 ; TONGA: ; %bb.0:
1675 ; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1676 ; TONGA-NEXT: s_mov_b32 s3, 0xf000
1677 ; TONGA-NEXT: s_mov_b32 s2, -1
1678 ; TONGA-NEXT: s_mov_b32 s10, s2
1679 ; TONGA-NEXT: s_mov_b32 s11, s3
1680 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
1681 ; TONGA-NEXT: s_mov_b32 s8, s6
1682 ; TONGA-NEXT: s_mov_b32 s9, s7
1683 ; TONGA-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1684 ; TONGA-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1685 ; TONGA-NEXT: buffer_load_ushort v2, off, s[8:11], 0 offset:4
1686 ; TONGA-NEXT: buffer_load_ushort v3, off, s[8:11], 0
1687 ; TONGA-NEXT: s_mov_b32 s0, s4
1688 ; TONGA-NEXT: s_mov_b32 s1, s5
1689 ; TONGA-NEXT: s_waitcnt vmcnt(3)
1690 ; TONGA-NEXT: v_lshlrev_b32_e32 v0, 16, v0
1691 ; TONGA-NEXT: s_waitcnt vmcnt(2)
1692 ; TONGA-NEXT: v_lshlrev_b32_e32 v1, 16, v1
1693 ; TONGA-NEXT: s_waitcnt vmcnt(1)
1694 ; TONGA-NEXT: v_or_b32_e32 v1, v2, v1
1695 ; TONGA-NEXT: v_bfe_i32 v1, v1, 0, 23
1696 ; TONGA-NEXT: v_cvt_f32_i32_e32 v2, v1
1697 ; TONGA-NEXT: s_waitcnt vmcnt(0)
1698 ; TONGA-NEXT: v_or_b32_e32 v0, v3, v0
1699 ; TONGA-NEXT: v_bfe_i32 v0, v0, 0, 23
1700 ; TONGA-NEXT: v_cvt_f32_i32_e32 v3, v0
1701 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v4, v2
1702 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v1
1703 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1704 ; TONGA-NEXT: v_or_b32_e32 v0, 1, v0
1705 ; TONGA-NEXT: v_mul_f32_e32 v1, v3, v4
1706 ; TONGA-NEXT: v_trunc_f32_e32 v1, v1
1707 ; TONGA-NEXT: v_mad_f32 v3, -v1, v2, v3
1708 ; TONGA-NEXT: v_cvt_i32_f32_e32 v1, v1
1709 ; TONGA-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1710 ; TONGA-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1711 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v1
1712 ; TONGA-NEXT: v_bfe_i32 v0, v0, 0, 23
1713 ; TONGA-NEXT: buffer_store_dword v0, off, s[0:3], 0
1714 ; TONGA-NEXT: s_endpgm
1715 ;
1716 ; GFX9-LABEL: v_sdiv_i23:
1717 ; GFX9: ; %bb.0:
1718 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1719 ; GFX9-NEXT: s_mov_b32 s3, 0xf000
1720 ; GFX9-NEXT: s_mov_b32 s2, -1
1721 ; GFX9-NEXT: s_mov_b32 s10, s2
1722 ; GFX9-NEXT: s_mov_b32 s11, s3
1723 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1724 ; GFX9-NEXT: s_mov_b32 s8, s6
1725 ; GFX9-NEXT: s_mov_b32 s9, s7
1726 ; GFX9-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1727 ; GFX9-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1728 ; GFX9-NEXT: buffer_load_ushort v2, off, s[8:11], 0 offset:4
1729 ; GFX9-NEXT: buffer_load_ushort v3, off, s[8:11], 0
1730 ; GFX9-NEXT: s_mov_b32 s0, s4
1731 ; GFX9-NEXT: s_mov_b32 s1, s5
1732 ; GFX9-NEXT: s_waitcnt vmcnt(3)
1733 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0
1734 ; GFX9-NEXT: s_waitcnt vmcnt(2)
1735 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
1736 ; GFX9-NEXT: s_waitcnt vmcnt(1)
1737 ; GFX9-NEXT: v_or_b32_e32 v1, v2, v1
1738 ; GFX9-NEXT: v_bfe_i32 v1, v1, 0, 23
1739 ; GFX9-NEXT: v_cvt_f32_i32_e32 v2, v1
1740 ; GFX9-NEXT: s_waitcnt vmcnt(0)
1741 ; GFX9-NEXT: v_or_b32_e32 v0, v3, v0
1742 ; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 23
1743 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, v0
1744 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v2
1745 ; GFX9-NEXT: v_xor_b32_e32 v0, v0, v1
1746 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1747 ; GFX9-NEXT: v_or_b32_e32 v0, 1, v0
1748 ; GFX9-NEXT: v_mul_f32_e32 v1, v3, v4
1749 ; GFX9-NEXT: v_trunc_f32_e32 v1, v1
1750 ; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v1
1751 ; GFX9-NEXT: v_mad_f32 v1, -v1, v2, v3
1752 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, |v2|
1753 ; GFX9-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1754 ; GFX9-NEXT: v_add_u32_e32 v0, v4, v0
1755 ; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 23
1756 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0
1757 ; GFX9-NEXT: s_endpgm
1758 ;
1759 ; EG-LABEL: v_sdiv_i23:
1760 ; EG: ; %bb.0:
1761 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
1762 ; EG-NEXT: TEX 3 @6
1763 ; EG-NEXT: ALU 33, @15, KC0[CB0:0-32], KC1[]
1764 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1765 ; EG-NEXT: CF_END
1766 ; EG-NEXT: PAD
1767 ; EG-NEXT: Fetch clause starting at 6:
1768 ; EG-NEXT: VTX_READ_8 T1.X, T0.X, 6, #1
1769 ; EG-NEXT: VTX_READ_16 T2.X, T0.X, 0, #1
1770 ; EG-NEXT: VTX_READ_8 T3.X, T0.X, 2, #1
1771 ; EG-NEXT: VTX_READ_16 T0.X, T0.X, 4, #1
1772 ; EG-NEXT: ALU clause starting at 14:
1773 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1774 ; EG-NEXT: ALU clause starting at 15:
1775 ; EG-NEXT: LSHL * T0.W, T1.X, literal.x,
1776 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1777 ; EG-NEXT: OR_INT T0.W, T0.X, PV.W,
1778 ; EG-NEXT: LSHL * T1.W, T3.X, literal.x,
1779 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1780 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
1781 ; EG-NEXT: 9(1.261169e-44), 0(0.000000e+00)
1782 ; EG-NEXT: ASHR T0.W, PV.W, literal.x,
1783 ; EG-NEXT: OR_INT * T1.W, T2.X, T1.W,
1784 ; EG-NEXT: 9(1.261169e-44), 0(0.000000e+00)
1785 ; EG-NEXT: LSHL T1.W, PS, literal.x,
1786 ; EG-NEXT: INT_TO_FLT * T0.X, PV.W,
1787 ; EG-NEXT: 9(1.261169e-44), 0(0.000000e+00)
1788 ; EG-NEXT: ASHR T1.W, PV.W, literal.x,
1789 ; EG-NEXT: RECIP_IEEE * T0.Y, PS,
1790 ; EG-NEXT: 9(1.261169e-44), 0(0.000000e+00)
1791 ; EG-NEXT: INT_TO_FLT * T0.Z, PV.W,
1792 ; EG-NEXT: MUL_IEEE * T2.W, PS, T0.Y,
1793 ; EG-NEXT: TRUNC T2.W, PV.W,
1794 ; EG-NEXT: XOR_INT * T0.W, T1.W, T0.W,
1795 ; EG-NEXT: ASHR T0.W, PS, literal.x,
1796 ; EG-NEXT: MULADD_IEEE * T1.W, -PV.W, T0.X, T0.Z,
1797 ; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)
1798 ; EG-NEXT: TRUNC T0.Z, T2.W,
1799 ; EG-NEXT: SETGE T1.W, |PS|, |T0.X|,
1800 ; EG-NEXT: OR_INT * T0.W, PV.W, 1,
1801 ; EG-NEXT: CNDE T0.W, PV.W, 0.0, PS,
1802 ; EG-NEXT: FLT_TO_INT * T1.W, PV.Z,
1803 ; EG-NEXT: ADD_INT * T0.W, PS, PV.W,
1804 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
1805 ; EG-NEXT: 9(1.261169e-44), 0(0.000000e+00)
1806 ; EG-NEXT: ASHR T0.X, PV.W, literal.x,
1807 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,
1808 ; EG-NEXT: 9(1.261169e-44), 2(2.802597e-45)
1809 %den_ptr = getelementptr i23, ptr addrspace(1) %in, i23 1
1810 %num = load i23, ptr addrspace(1) %in
1811 %den = load i23, ptr addrspace(1) %den_ptr
1812 %result = sdiv i23 %num, %den
1813 %result.ext = sext i23 %result to i32
1814 store i32 %result.ext, ptr addrspace(1) %out
1815 ret void
1816 }
1818 define amdgpu_kernel void @v_sdiv_i24(ptr addrspace(1) %out, ptr addrspace(1) %in) {
1819 ; GCN-LABEL: v_sdiv_i24:
1820 ; GCN: ; %bb.0:
1821 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1822 ; GCN-NEXT: s_mov_b32 s7, 0xf000
1823 ; GCN-NEXT: s_mov_b32 s6, -1
1824 ; GCN-NEXT: s_mov_b32 s10, s6
1825 ; GCN-NEXT: s_mov_b32 s11, s7
1826 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1827 ; GCN-NEXT: s_mov_b32 s8, s2
1828 ; GCN-NEXT: s_mov_b32 s9, s3
1829 ; GCN-NEXT: buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1830 ; GCN-NEXT: buffer_load_ushort v1, off, s[8:11], 0 offset:4
1831 ; GCN-NEXT: buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1832 ; GCN-NEXT: buffer_load_ushort v3, off, s[8:11], 0
1833 ; GCN-NEXT: s_mov_b32 s4, s0
1834 ; GCN-NEXT: s_mov_b32 s5, s1
1835 ; GCN-NEXT: s_waitcnt vmcnt(3)
1836 ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v0
1837 ; GCN-NEXT: s_waitcnt vmcnt(2)
1838 ; GCN-NEXT: v_or_b32_e32 v1, v1, v4
1839 ; GCN-NEXT: v_cvt_f32_i32_e32 v1, v1
1840 ; GCN-NEXT: s_waitcnt vmcnt(1)
1841 ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v2
1842 ; GCN-NEXT: s_waitcnt vmcnt(0)
1843 ; GCN-NEXT: v_or_b32_e32 v3, v3, v4
1844 ; GCN-NEXT: v_cvt_f32_i32_e32 v3, v3
1845 ; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v1
1846 ; GCN-NEXT: v_xor_b32_e32 v0, v2, v0
1847 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1848 ; GCN-NEXT: v_or_b32_e32 v0, 1, v0
1849 ; GCN-NEXT: v_mul_f32_e32 v2, v3, v4
1850 ; GCN-NEXT: v_trunc_f32_e32 v2, v2
1851 ; GCN-NEXT: v_mad_f32 v3, -v2, v1, v3
1852 ; GCN-NEXT: v_cvt_i32_f32_e32 v2, v2
1853 ; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1854 ; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1855 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v2
1856 ; GCN-NEXT: v_bfe_i32 v0, v0, 0, 24
1857 ; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
1858 ; GCN-NEXT: s_endpgm
1859 ;
1860 ; TONGA-LABEL: v_sdiv_i24:
1861 ; TONGA: ; %bb.0:
1862 ; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1863 ; TONGA-NEXT: s_mov_b32 s3, 0xf000
1864 ; TONGA-NEXT: s_mov_b32 s2, -1
1865 ; TONGA-NEXT: s_mov_b32 s10, s2
1866 ; TONGA-NEXT: s_mov_b32 s11, s3
1867 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
1868 ; TONGA-NEXT: s_mov_b32 s8, s6
1869 ; TONGA-NEXT: s_mov_b32 s9, s7
1870 ; TONGA-NEXT: buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1871 ; TONGA-NEXT: buffer_load_ushort v1, off, s[8:11], 0 offset:4
1872 ; TONGA-NEXT: buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1873 ; TONGA-NEXT: buffer_load_ushort v3, off, s[8:11], 0
1874 ; TONGA-NEXT: s_mov_b32 s0, s4
1875 ; TONGA-NEXT: s_mov_b32 s1, s5
1876 ; TONGA-NEXT: s_waitcnt vmcnt(3)
1877 ; TONGA-NEXT: v_lshlrev_b32_e32 v4, 16, v0
1878 ; TONGA-NEXT: s_waitcnt vmcnt(2)
1879 ; TONGA-NEXT: v_or_b32_e32 v1, v1, v4
1880 ; TONGA-NEXT: v_cvt_f32_i32_e32 v1, v1
1881 ; TONGA-NEXT: s_waitcnt vmcnt(1)
1882 ; TONGA-NEXT: v_lshlrev_b32_e32 v4, 16, v2
1883 ; TONGA-NEXT: s_waitcnt vmcnt(0)
1884 ; TONGA-NEXT: v_or_b32_e32 v3, v3, v4
1885 ; TONGA-NEXT: v_cvt_f32_i32_e32 v3, v3
1886 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v4, v1
1887 ; TONGA-NEXT: v_xor_b32_e32 v0, v2, v0
1888 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1889 ; TONGA-NEXT: v_or_b32_e32 v0, 1, v0
1890 ; TONGA-NEXT: v_mul_f32_e32 v2, v3, v4
1891 ; TONGA-NEXT: v_trunc_f32_e32 v2, v2
1892 ; TONGA-NEXT: v_mad_f32 v3, -v2, v1, v3
1893 ; TONGA-NEXT: v_cvt_i32_f32_e32 v2, v2
1894 ; TONGA-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1895 ; TONGA-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1896 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v2
1897 ; TONGA-NEXT: v_bfe_i32 v0, v0, 0, 24
1898 ; TONGA-NEXT: buffer_store_dword v0, off, s[0:3], 0
1899 ; TONGA-NEXT: s_endpgm
1900 ;
1901 ; GFX9-LABEL: v_sdiv_i24:
1902 ; GFX9: ; %bb.0:
1903 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1904 ; GFX9-NEXT: s_mov_b32 s3, 0xf000
1905 ; GFX9-NEXT: s_mov_b32 s2, -1
1906 ; GFX9-NEXT: s_mov_b32 s10, s2
1907 ; GFX9-NEXT: s_mov_b32 s11, s3
1908 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
1909 ; GFX9-NEXT: s_mov_b32 s8, s6
1910 ; GFX9-NEXT: s_mov_b32 s9, s7
1911 ; GFX9-NEXT: buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1912 ; GFX9-NEXT: buffer_load_ushort v1, off, s[8:11], 0 offset:4
1913 ; GFX9-NEXT: buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1914 ; GFX9-NEXT: buffer_load_ushort v3, off, s[8:11], 0
1915 ; GFX9-NEXT: s_mov_b32 s0, s4
1916 ; GFX9-NEXT: s_mov_b32 s1, s5
1917 ; GFX9-NEXT: s_waitcnt vmcnt(3)
1918 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v0
1919 ; GFX9-NEXT: s_waitcnt vmcnt(2)
1920 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v4
1921 ; GFX9-NEXT: v_cvt_f32_i32_e32 v1, v1
1922 ; GFX9-NEXT: s_waitcnt vmcnt(1)
1923 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 16, v2
1924 ; GFX9-NEXT: s_waitcnt vmcnt(0)
1925 ; GFX9-NEXT: v_or_b32_e32 v3, v3, v4
1926 ; GFX9-NEXT: v_cvt_f32_i32_e32 v3, v3
1927 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v4, v1
1928 ; GFX9-NEXT: v_xor_b32_e32 v0, v2, v0
1929 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 30, v0
1930 ; GFX9-NEXT: v_or_b32_e32 v0, 1, v0
1931 ; GFX9-NEXT: v_mul_f32_e32 v2, v3, v4
1932 ; GFX9-NEXT: v_trunc_f32_e32 v2, v2
1933 ; GFX9-NEXT: v_cvt_i32_f32_e32 v4, v2
1934 ; GFX9-NEXT: v_mad_f32 v2, -v2, v1, v3
1935 ; GFX9-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, |v1|
1936 ; GFX9-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc
1937 ; GFX9-NEXT: v_add_u32_e32 v0, v4, v0
1938 ; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 24
1939 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0
1940 ; GFX9-NEXT: s_endpgm
1941 ;
1942 ; EG-LABEL: v_sdiv_i24:
1943 ; EG: ; %bb.0:
1944 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
1945 ; EG-NEXT: TEX 3 @6
1946 ; EG-NEXT: ALU 29, @15, KC0[CB0:0-32], KC1[]
1947 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1948 ; EG-NEXT: CF_END
1949 ; EG-NEXT: PAD
1950 ; EG-NEXT: Fetch clause starting at 6:
1951 ; EG-NEXT: VTX_READ_8 T1.X, T0.X, 6, #1
1952 ; EG-NEXT: VTX_READ_16 T2.X, T0.X, 0, #1
1953 ; EG-NEXT: VTX_READ_16 T3.X, T0.X, 4, #1
1954 ; EG-NEXT: VTX_READ_8 T0.X, T0.X, 2, #1
1955 ; EG-NEXT: ALU clause starting at 14:
1956 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1957 ; EG-NEXT: ALU clause starting at 15:
1958 ; EG-NEXT: BFE_INT * T0.W, T1.X, 0.0, literal.x,
1959 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
1960 ; EG-NEXT: LSHL * T1.W, PV.W, literal.x,
1961 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1962 ; EG-NEXT: BFE_INT T2.W, T0.X, 0.0, literal.x,
1963 ; EG-NEXT: OR_INT * T1.W, T3.X, PV.W,
1964 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
1965 ; EG-NEXT: LSHL T3.W, PV.W, literal.x,
1966 ; EG-NEXT: INT_TO_FLT * T0.X, PS,
1967 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1968 ; EG-NEXT: OR_INT T1.W, T2.X, PV.W,
1969 ; EG-NEXT: RECIP_IEEE * T0.Y, PS,
1970 ; EG-NEXT: INT_TO_FLT * T0.Z, PV.W,
1971 ; EG-NEXT: MUL_IEEE * T1.W, PS, T0.Y,
1972 ; EG-NEXT: TRUNC T1.W, PV.W,
1973 ; EG-NEXT: XOR_INT * T0.W, T2.W, T0.W,
1974 ; EG-NEXT: ASHR T0.W, PS, literal.x,
1975 ; EG-NEXT: MULADD_IEEE * T2.W, -PV.W, T0.X, T0.Z,
1976 ; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)
1977 ; EG-NEXT: TRUNC T0.Z, T1.W,
1978 ; EG-NEXT: SETGE T1.W, |PS|, |T0.X|,
1979 ; EG-NEXT: OR_INT * T0.W, PV.W, 1,
1980 ; EG-NEXT: CNDE T0.W, PV.W, 0.0, PS,
1981 ; EG-NEXT: FLT_TO_INT * T1.W, PV.Z,
1982 ; EG-NEXT: ADD_INT * T0.W, PS, PV.W,
1983 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
1984 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
1985 ; EG-NEXT: ASHR T0.X, PV.W, literal.x,
1986 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,
1987 ; EG-NEXT: 8(1.121039e-44), 2(2.802597e-45)
1988 %den_ptr = getelementptr i24, ptr addrspace(1) %in, i24 1
1989 %num = load i24, ptr addrspace(1) %in
1990 %den = load i24, ptr addrspace(1) %den_ptr
1991 %result = sdiv i24 %num, %den
1992 %result.ext = sext i24 %result to i32
1993 store i32 %result.ext, ptr addrspace(1) %out
1994 ret void
1995 }
1997 define amdgpu_kernel void @v_sdiv_i25(ptr addrspace(1) %out, ptr addrspace(1) %in) {
1998 ; GCN-LABEL: v_sdiv_i25:
1999 ; GCN: ; %bb.0:
2000 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
2001 ; GCN-NEXT: s_mov_b32 s3, 0xf000
2002 ; GCN-NEXT: s_mov_b32 s2, -1
2003 ; GCN-NEXT: s_mov_b32 s10, s2
2004 ; GCN-NEXT: s_mov_b32 s11, s3
2005 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
2006 ; GCN-NEXT: s_mov_b32 s8, s6
2007 ; GCN-NEXT: s_mov_b32 s9, s7
2008 ; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2009 ; GCN-NEXT: s_mov_b32 s0, s4
2010 ; GCN-NEXT: s_mov_b32 s1, s5
2011 ; GCN-NEXT: s_waitcnt vmcnt(0)
2012 ; GCN-NEXT: v_bfe_i32 v2, v1, 0, 25
2013 ; GCN-NEXT: v_bfe_i32 v1, v1, 24, 1
2014 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v1
2015 ; GCN-NEXT: v_xor_b32_e32 v2, v2, v1
2016 ; GCN-NEXT: v_cvt_f32_u32_e32 v3, v2
2017 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, 0, v2
2018 ; GCN-NEXT: v_bfe_i32 v5, v0, 0, 25
2019 ; GCN-NEXT: v_rcp_iflag_f32_e32 v3, v3
2020 ; GCN-NEXT: v_bfe_i32 v0, v0, 24, 1
2021 ; GCN-NEXT: v_add_i32_e32 v5, vcc, v5, v0
2022 ; GCN-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3
2023 ; GCN-NEXT: v_cvt_u32_f32_e32 v3, v3
2024 ; GCN-NEXT: v_xor_b32_e32 v5, v5, v0
2025 ; GCN-NEXT: v_xor_b32_e32 v0, v0, v1
2026 ; GCN-NEXT: v_mul_lo_u32 v4, v4, v3
2027 ; GCN-NEXT: v_mul_hi_u32 v4, v3, v4
2028 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v4
2029 ; GCN-NEXT: v_mul_hi_u32 v3, v5, v3
2030 ; GCN-NEXT: v_mul_lo_u32 v1, v3, v2
2031 ; GCN-NEXT: v_add_i32_e32 v4, vcc, 1, v3
2032 ; GCN-NEXT: v_sub_i32_e32 v1, vcc, v5, v1
2033 ; GCN-NEXT: v_sub_i32_e32 v5, vcc, v1, v2
2034 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v2
2035 ; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
2036 ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
2037 ; GCN-NEXT: v_add_i32_e32 v4, vcc, 1, v3
2038 ; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v2
2039 ; GCN-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
2040 ; GCN-NEXT: v_xor_b32_e32 v1, v1, v0
2041 ; GCN-NEXT: v_sub_i32_e32 v0, vcc, v1, v0
2042 ; GCN-NEXT: v_bfe_i32 v0, v0, 0, 25
2043 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
2044 ; GCN-NEXT: s_endpgm
2045 ;
2046 ; TONGA-LABEL: v_sdiv_i25:
2047 ; TONGA: ; %bb.0:
2048 ; TONGA-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
2049 ; TONGA-NEXT: s_mov_b32 s3, 0xf000
2050 ; TONGA-NEXT: s_mov_b32 s2, -1
2051 ; TONGA-NEXT: s_mov_b32 s10, s2
2052 ; TONGA-NEXT: s_mov_b32 s11, s3
2053 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
2054 ; TONGA-NEXT: s_mov_b32 s8, s6
2055 ; TONGA-NEXT: s_mov_b32 s9, s7
2056 ; TONGA-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2057 ; TONGA-NEXT: s_mov_b32 s0, s4
2058 ; TONGA-NEXT: s_mov_b32 s1, s5
2059 ; TONGA-NEXT: s_waitcnt vmcnt(0)
2060 ; TONGA-NEXT: v_bfe_i32 v2, v1, 0, 25
2061 ; TONGA-NEXT: v_bfe_i32 v1, v1, 24, 1
2062 ; TONGA-NEXT: v_add_u32_e32 v2, vcc, v2, v1
2063 ; TONGA-NEXT: v_xor_b32_e32 v2, v2, v1
2064 ; TONGA-NEXT: v_cvt_f32_u32_e32 v3, v2
2065 ; TONGA-NEXT: v_sub_u32_e32 v4, vcc, 0, v2
2066 ; TONGA-NEXT: v_bfe_i32 v5, v0, 0, 25
2067 ; TONGA-NEXT: v_rcp_iflag_f32_e32 v3, v3
2068 ; TONGA-NEXT: v_bfe_i32 v0, v0, 24, 1
2069 ; TONGA-NEXT: v_add_u32_e32 v5, vcc, v5, v0
2070 ; TONGA-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3
2071 ; TONGA-NEXT: v_cvt_u32_f32_e32 v3, v3
2072 ; TONGA-NEXT: v_xor_b32_e32 v5, v5, v0
2073 ; TONGA-NEXT: v_xor_b32_e32 v0, v0, v1
2074 ; TONGA-NEXT: v_mul_lo_u32 v4, v4, v3
2075 ; TONGA-NEXT: v_mul_hi_u32 v4, v3, v4
2076 ; TONGA-NEXT: v_add_u32_e32 v3, vcc, v3, v4
2077 ; TONGA-NEXT: v_mul_hi_u32 v3, v5, v3
2078 ; TONGA-NEXT: v_mul_lo_u32 v1, v3, v2
2079 ; TONGA-NEXT: v_add_u32_e32 v4, vcc, 1, v3
2080 ; TONGA-NEXT: v_sub_u32_e32 v1, vcc, v5, v1
2081 ; TONGA-NEXT: v_sub_u32_e32 v5, vcc, v1, v2
2082 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v1, v2
2083 ; TONGA-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
2084 ; TONGA-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
2085 ; TONGA-NEXT: v_add_u32_e32 v4, vcc, 1, v3
2086 ; TONGA-NEXT: v_cmp_ge_u32_e32 vcc, v1, v2
2087 ; TONGA-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc
2088 ; TONGA-NEXT: v_xor_b32_e32 v1, v1, v0
2089 ; TONGA-NEXT: v_sub_u32_e32 v0, vcc, v1, v0
2090 ; TONGA-NEXT: v_bfe_i32 v0, v0, 0, 25
2091 ; TONGA-NEXT: buffer_store_dword v0, off, s[0:3], 0
2092 ; TONGA-NEXT: s_endpgm
2093 ;
2094 ; GFX9-LABEL: v_sdiv_i25:
2095 ; GFX9: ; %bb.0:
2096 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
2097 ; GFX9-NEXT: s_mov_b32 s3, 0xf000
2098 ; GFX9-NEXT: s_mov_b32 s2, -1
2099 ; GFX9-NEXT: s_mov_b32 s10, s2
2100 ; GFX9-NEXT: s_mov_b32 s11, s3
2101 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
2102 ; GFX9-NEXT: s_mov_b32 s8, s6
2103 ; GFX9-NEXT: s_mov_b32 s9, s7
2104 ; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2105 ; GFX9-NEXT: s_waitcnt vmcnt(0)
2106 ; GFX9-NEXT: v_readfirstlane_b32 s0, v1
2107 ; GFX9-NEXT: s_bfe_i32 s1, s0, 0x190000
2108 ; GFX9-NEXT: s_bfe_i32 s6, s0, 0x10018
2109 ; GFX9-NEXT: s_add_i32 s1, s1, s6
2110 ; GFX9-NEXT: s_xor_b32 s7, s1, s6
2111 ; GFX9-NEXT: v_cvt_f32_u32_e32 v1, s7
2112 ; GFX9-NEXT: s_mov_b32 s0, s4
2113 ; GFX9-NEXT: v_readfirstlane_b32 s4, v0
2114 ; GFX9-NEXT: s_mov_b32 s1, s5
2115 ; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v1
2116 ; GFX9-NEXT: s_bfe_i32 s5, s4, 0x190000
2117 ; GFX9-NEXT: s_bfe_i32 s4, s4, 0x10018
2118 ; GFX9-NEXT: s_add_i32 s5, s5, s4
2119 ; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
2120 ; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v0
2121 ; GFX9-NEXT: s_xor_b32 s6, s4, s6
2122 ; GFX9-NEXT: s_xor_b32 s4, s5, s4
2123 ; GFX9-NEXT: s_sub_i32 s5, 0, s7
2124 ; GFX9-NEXT: v_readfirstlane_b32 s8, v0
2125 ; GFX9-NEXT: s_mul_i32 s5, s5, s8
2126 ; GFX9-NEXT: s_mul_hi_u32 s5, s8, s5
2127 ; GFX9-NEXT: s_add_i32 s8, s8, s5
2128 ; GFX9-NEXT: s_mul_hi_u32 s5, s4, s8
2129 ; GFX9-NEXT: s_mul_i32 s8, s5, s7
2130 ; GFX9-NEXT: s_sub_i32 s4, s4, s8
2131 ; GFX9-NEXT: s_add_i32 s9, s5, 1
2132 ; GFX9-NEXT: s_sub_i32 s8, s4, s7
2133 ; GFX9-NEXT: s_cmp_ge_u32 s4, s7
2134 ; GFX9-NEXT: s_cselect_b32 s5, s9, s5
2135 ; GFX9-NEXT: s_cselect_b32 s4, s8, s4
2136 ; GFX9-NEXT: s_add_i32 s8, s5, 1
2137 ; GFX9-NEXT: s_cmp_ge_u32 s4, s7
2138 ; GFX9-NEXT: s_cselect_b32 s4, s8, s5
2139 ; GFX9-NEXT: s_xor_b32 s4, s4, s6
2140 ; GFX9-NEXT: s_sub_i32 s4, s4, s6
2141 ; GFX9-NEXT: s_bfe_i32 s4, s4, 0x190000
2142 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
2143 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0
2144 ; GFX9-NEXT: s_endpgm
2145 ;
2146 ; EG-LABEL: v_sdiv_i25:
2147 ; EG: ; %bb.0:
2148 ; EG-NEXT: ALU 1, @10, KC0[CB0:0-32], KC1[]
2149 ; EG-NEXT: TEX 1 @6
2150 ; EG-NEXT: ALU 37, @12, KC0[CB0:0-32], KC1[]
2151 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
2152 ; EG-NEXT: CF_END
2153 ; EG-NEXT: PAD
2154 ; EG-NEXT: Fetch clause starting at 6:
2155 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 4, #1
2156 ; EG-NEXT: VTX_READ_32 T1.X, T1.X, 0, #1
2157 ; EG-NEXT: ALU clause starting at 10:
2158 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
2159 ; EG-NEXT: MOV * T1.X, PV.X,
2160 ; EG-NEXT: ALU clause starting at 12:
2161 ; EG-NEXT: LSHL * T0.W, T0.X, literal.x,
2162 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
2163 ; EG-NEXT: ASHR * T0.W, PV.W, literal.x,
2164 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
2165 ; EG-NEXT: SETGT_INT * T1.W, 0.0, PV.W,
2166 ; EG-NEXT: ADD_INT T0.W, T0.W, PV.W,
2167 ; EG-NEXT: LSHL * T2.W, T1.X, literal.x,
2168 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
2169 ; EG-NEXT: XOR_INT * T0.W, PV.W, T1.W,
2170 ; EG-NEXT: SUB_INT T0.Z, 0.0, PV.W,
2171 ; EG-NEXT: ASHR T2.W, T2.W, literal.x,
2172 ; EG-NEXT: RECIP_UINT * T0.X, PV.W,
2173 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
2174 ; EG-NEXT: SETGT_INT T3.W, 0.0, PV.W,
2175 ; EG-NEXT: MULLO_INT * T0.Y, PV.Z, PS,
2176 ; EG-NEXT: ADD_INT T2.W, T2.W, PV.W,
2177 ; EG-NEXT: MULHI * T0.Y, T0.X, PS,
2178 ; EG-NEXT: ADD_INT T4.W, T0.X, PS,
2179 ; EG-NEXT: XOR_INT * T2.W, PV.W, T3.W,
2180 ; EG-NEXT: MULHI * T0.X, PS, PV.W,
2181 ; EG-NEXT: MULLO_INT * T0.Y, PS, T0.W,
2182 ; EG-NEXT: SUB_INT * T2.W, T2.W, PS,
2183 ; EG-NEXT: ADD_INT T0.Z, T0.X, 1,
2184 ; EG-NEXT: SETGE_UINT T4.W, PV.W, T0.W,
2185 ; EG-NEXT: SUB_INT * T5.W, PV.W, T0.W,
2186 ; EG-NEXT: CNDE_INT T2.W, PV.W, T2.W, PS,
2187 ; EG-NEXT: CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
2188 ; EG-NEXT: ADD_INT T5.W, PS, 1,
2189 ; EG-NEXT: SETGE_UINT * T0.W, PV.W, T0.W,
2190 ; EG-NEXT: CNDE_INT T0.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
2191 ; EG-NEXT: XOR_INT * T1.W, T3.W, T1.W,
2192 ; EG-NEXT: XOR_INT * T0.W, PV.W, PS,
2193 ; EG-NEXT: SUB_INT * T0.W, PV.W, T1.W,
2194 ; EG-NEXT: LSHL * T0.W, PV.W, literal.x,
2195 ; EG-NEXT: 7(9.809089e-45), 0(0.000000e+00)
2196 ; EG-NEXT: ASHR T0.X, PV.W, literal.x,
2197 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,
2198 ; EG-NEXT: 7(9.809089e-45), 2(2.802597e-45)
2199 %den_ptr = getelementptr i25, ptr addrspace(1) %in, i25 1
2200 %num = load i25, ptr addrspace(1) %in
2201 %den = load i25, ptr addrspace(1) %den_ptr
2202 %result = sdiv i25 %num, %den
2203 %result.ext = sext i25 %result to i32
2204 store i32 %result.ext, ptr addrspace(1) %out
2205 ret void
2206 }
2208 ; Tests for 64-bit divide bypass.
2209 ; define amdgpu_kernel void @test_get_quotient(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
2210 ; %result = sdiv i64 %a, %b
2211 ; store i64 %result, ptr addrspace(1) %out, align 8
2212 ; ret void
2213 ; }
2215 ; define amdgpu_kernel void @test_get_remainder(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
2216 ; %result = srem i64 %a, %b
2217 ; store i64 %result, ptr addrspace(1) %out, align 8
2218 ; ret void
2219 ; }
2221 ; define amdgpu_kernel void @test_get_quotient_and_remainder(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {
2222 ; %resultdiv = sdiv i64 %a, %b
2223 ; %resultrem = srem i64 %a, %b
2224 ; %result = add i64 %resultdiv, %resultrem
2225 ; store i64 %result, ptr addrspace(1) %out, align 8
2226 ; ret void
2227 ; }
2229 define amdgpu_kernel void @scalarize_mulhs_4xi32(ptr addrspace(1) nocapture readonly %in, ptr addrspace(1) nocapture %out) {
2230 ; GCN-LABEL: scalarize_mulhs_4xi32:
2231 ; GCN: ; %bb.0:
2232 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
2233 ; GCN-NEXT: s_mov_b32 s7, 0xf000
2234 ; GCN-NEXT: s_mov_b32 s6, -1
2235 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
2236 ; GCN-NEXT: s_mov_b32 s4, s0
2237 ; GCN-NEXT: s_mov_b32 s5, s1
2238 ; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2239 ; GCN-NEXT: s_mov_b32 s0, 0x1389c755
2240 ; GCN-NEXT: s_mov_b32 s4, s2
2241 ; GCN-NEXT: s_mov_b32 s5, s3
2242 ; GCN-NEXT: s_waitcnt vmcnt(0)
2243 ; GCN-NEXT: v_mul_hi_i32 v0, v0, s0
2244 ; GCN-NEXT: v_mul_hi_i32 v1, v1, s0
2245 ; GCN-NEXT: v_mul_hi_i32 v2, v2, s0
2246 ; GCN-NEXT: v_mul_hi_i32 v3, v3, s0
2247 ; GCN-NEXT: v_lshrrev_b32_e32 v4, 31, v0
2248 ; GCN-NEXT: v_ashrrev_i32_e32 v0, 12, v0
2249 ; GCN-NEXT: v_lshrrev_b32_e32 v5, 31, v1
2250 ; GCN-NEXT: v_ashrrev_i32_e32 v1, 12, v1
2251 ; GCN-NEXT: v_lshrrev_b32_e32 v6, 31, v2
2252 ; GCN-NEXT: v_ashrrev_i32_e32 v2, 12, v2
2253 ; GCN-NEXT: v_lshrrev_b32_e32 v7, 31, v3
2254 ; GCN-NEXT: v_ashrrev_i32_e32 v3, 12, v3
2255 ; GCN-NEXT: v_add_i32_e32 v0, vcc, v0, v4
2256 ; GCN-NEXT: v_add_i32_e32 v1, vcc, v1, v5
2257 ; GCN-NEXT: v_add_i32_e32 v2, vcc, v2, v6
2258 ; GCN-NEXT: v_add_i32_e32 v3, vcc, v3, v7
2259 ; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2260 ; GCN-NEXT: s_endpgm
2261 ;
2262 ; TONGA-LABEL: scalarize_mulhs_4xi32:
2263 ; TONGA: ; %bb.0:
2264 ; TONGA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
2265 ; TONGA-NEXT: s_mov_b32 s7, 0xf000
2266 ; TONGA-NEXT: s_mov_b32 s6, -1
2267 ; TONGA-NEXT: s_waitcnt lgkmcnt(0)
2268 ; TONGA-NEXT: s_mov_b32 s4, s0
2269 ; TONGA-NEXT: s_mov_b32 s5, s1
2270 ; TONGA-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2271 ; TONGA-NEXT: s_mov_b32 s0, 0x1389c755
2272 ; TONGA-NEXT: s_mov_b32 s4, s2
2273 ; TONGA-NEXT: s_mov_b32 s5, s3
2274 ; TONGA-NEXT: s_waitcnt vmcnt(0)
2275 ; TONGA-NEXT: v_mul_hi_i32 v0, v0, s0
2276 ; TONGA-NEXT: v_mul_hi_i32 v1, v1, s0
2277 ; TONGA-NEXT: v_mul_hi_i32 v2, v2, s0
2278 ; TONGA-NEXT: v_mul_hi_i32 v3, v3, s0
2279 ; TONGA-NEXT: v_lshrrev_b32_e32 v4, 31, v0
2280 ; TONGA-NEXT: v_ashrrev_i32_e32 v0, 12, v0
2281 ; TONGA-NEXT: v_lshrrev_b32_e32 v5, 31, v1
2282 ; TONGA-NEXT: v_ashrrev_i32_e32 v1, 12, v1
2283 ; TONGA-NEXT: v_lshrrev_b32_e32 v6, 31, v2
2284 ; TONGA-NEXT: v_ashrrev_i32_e32 v2, 12, v2
2285 ; TONGA-NEXT: v_lshrrev_b32_e32 v7, 31, v3
2286 ; TONGA-NEXT: v_ashrrev_i32_e32 v3, 12, v3
2287 ; TONGA-NEXT: v_add_u32_e32 v0, vcc, v0, v4
2288 ; TONGA-NEXT: v_add_u32_e32 v1, vcc, v1, v5
2289 ; TONGA-NEXT: v_add_u32_e32 v2, vcc, v2, v6
2290 ; TONGA-NEXT: v_add_u32_e32 v3, vcc, v3, v7
2291 ; TONGA-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2292 ; TONGA-NEXT: s_endpgm
2293 ;
2294 ; GFX9-LABEL: scalarize_mulhs_4xi32:
2295 ; GFX9: ; %bb.0:
2296 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
2297 ; GFX9-NEXT: s_mov_b32 s7, 0xf000
2298 ; GFX9-NEXT: s_mov_b32 s6, -1
2299 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
2300 ; GFX9-NEXT: s_mov_b32 s4, s0
2301 ; GFX9-NEXT: s_mov_b32 s5, s1
2302 ; GFX9-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2303 ; GFX9-NEXT: s_mov_b32 s0, 0x1389c755
2304 ; GFX9-NEXT: s_mov_b32 s4, s2
2305 ; GFX9-NEXT: s_mov_b32 s5, s3
2306 ; GFX9-NEXT: s_waitcnt vmcnt(0)
2307 ; GFX9-NEXT: v_mul_hi_i32 v0, v0, s0
2308 ; GFX9-NEXT: v_mul_hi_i32 v1, v1, s0
2309 ; GFX9-NEXT: v_mul_hi_i32 v2, v2, s0
2310 ; GFX9-NEXT: v_mul_hi_i32 v3, v3, s0
2311 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 31, v0
2312 ; GFX9-NEXT: v_ashrrev_i32_e32 v0, 12, v0
2313 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 31, v1
2314 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 12, v1
2315 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 31, v2
2316 ; GFX9-NEXT: v_ashrrev_i32_e32 v2, 12, v2
2317 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 31, v3
2318 ; GFX9-NEXT: v_ashrrev_i32_e32 v3, 12, v3
2319 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v4
2320 ; GFX9-NEXT: v_add_u32_e32 v1, v1, v5
2321 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v6
2322 ; GFX9-NEXT: v_add_u32_e32 v3, v3, v7
2323 ; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2324 ; GFX9-NEXT: s_endpgm
2325 ;
2326 ; EG-LABEL: scalarize_mulhs_4xi32:
2327 ; EG: ; %bb.0:
2328 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
2329 ; EG-NEXT: TEX 0 @6
2330 ; EG-NEXT: ALU 25, @9, KC0[CB0:0-32], KC1[]
2331 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
2332 ; EG-NEXT: CF_END
2333 ; EG-NEXT: PAD
2334 ; EG-NEXT: Fetch clause starting at 6:
2335 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
2336 ; EG-NEXT: ALU clause starting at 8:
2337 ; EG-NEXT: MOV * T0.X, KC0[2].Y,
2338 ; EG-NEXT: ALU clause starting at 9:
2339 ; EG-NEXT: MULHI_INT * T0.W, T0.W, literal.x,
2340 ; EG-NEXT: 327796565(3.478022e-27), 0(0.000000e+00)
2341 ; EG-NEXT: ASHR T1.Z, PS, literal.x,
2342 ; EG-NEXT: LSHR T0.W, PS, literal.y,
2343 ; EG-NEXT: MULHI_INT * T0.Z, T0.Z, literal.z,
2344 ; EG-NEXT: 12(1.681558e-44), 31(4.344025e-44)
2345 ; EG-NEXT: 327796565(3.478022e-27), 0(0.000000e+00)
2346 ; EG-NEXT: ASHR T1.Y, PS, literal.x,
2347 ; EG-NEXT: LSHR T0.Z, PS, literal.y,
2348 ; EG-NEXT: ADD_INT T0.W, PV.Z, PV.W,
2349 ; EG-NEXT: MULHI_INT * T0.Y, T0.Y, literal.z,
2350 ; EG-NEXT: 12(1.681558e-44), 31(4.344025e-44)
2351 ; EG-NEXT: 327796565(3.478022e-27), 0(0.000000e+00)
2352 ; EG-NEXT: ASHR T2.Y, PS, literal.x,
2353 ; EG-NEXT: ADD_INT T0.Z, PV.Y, PV.Z,
2354 ; EG-NEXT: LSHR T1.W, PS, literal.y,
2355 ; EG-NEXT: MULHI_INT * T0.X, T0.X, literal.z,
2356 ; EG-NEXT: 12(1.681558e-44), 31(4.344025e-44)
2357 ; EG-NEXT: 327796565(3.478022e-27), 0(0.000000e+00)
2358 ; EG-NEXT: ADD_INT T0.Y, PV.Y, PV.W,
2359 ; EG-NEXT: ASHR T1.W, PS, literal.x,
2360 ; EG-NEXT: LSHR * T2.W, PS, literal.y,
2361 ; EG-NEXT: 12(1.681558e-44), 31(4.344025e-44)
2362 ; EG-NEXT: ADD_INT T0.X, PV.W, PS,
2363 ; EG-NEXT: LSHR * T1.X, KC0[2].Z, literal.x,
2364 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
2365 %1 = load <4 x i32>, ptr addrspace(1) %in, align 16
2366 %2 = sdiv <4 x i32> %1, <i32 53668, i32 53668, i32 53668, i32 53668>
2367 store <4 x i32> %2, ptr addrspace(1) %out, align 16
2368 ret void
2369 }