llvm/test/CodeGen/MIR/AMDGPU/wwm-reserved-regs.mir

   1 # RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s -o - | FileCheck %s
   2 # RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
   3
   4 # CHECK-LABEL: name: empty_wwm_regs{{$}}
   5 # CHECK: machineFunctionInfo:
   6 # CHECK-NOT: wwmReservedRegs
   7 ---
   8 name: empty_wwm_regs
   9 machineFunctionInfo:
  10   wwmReservedRegs: []
  11 body:             |
  12   bb.0:
  13     S_ENDPGM 0
  14
  15 ...
  16
  17 # CHECK-LABEL: name: one_reg{{$}}
  18 # CHECK: machineFunctionInfo:
  19 # CHECK: wwmReservedRegs:
  20 # CHECK-NEXT: - '$vgpr0'
  21 ---
  22 name: one_reg
  23 machineFunctionInfo:
  24   wwmReservedRegs: ['$vgpr0']
  25 body:             |
  26   bb.0:
  27     S_ENDPGM 0
  28
  29 ...
  30
  31 # CHECK-LABEL: name: two_reg{{$}}
  32 # CHECK: machineFunctionInfo:
  33 # CHECK: wwmReservedRegs:
  34 # CHECK-NEXT: - '$vgpr0'
  35 # CHECK-NEXT: - '$vgpr1'
  36 ---
  37 name: two_reg
  38 machineFunctionInfo:
  39   wwmReservedRegs: ['$vgpr0', '$vgpr1']
  40 body:             |
  41   bb.0:
  42     S_ENDPGM 0
  43
  44 ...