[clang][modules] Don't prevent translation of FW_Private includes when explicitly...
[llvm-project.git] / llvm / test / tools / llvm-mca / X86 / Haswell / reserved-resources.s
blobb40322b9f3a393bf387cefee2e219d05d25b5604
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=100 < %s | FileCheck %s
4 fxrstor (%rsp)
6 # CHECK: Iterations: 100
7 # CHECK-NEXT: Instructions: 100
8 # CHECK-NEXT: Total Cycles: 4720
9 # CHECK-NEXT: Total uOps: 9000
11 # CHECK: Dispatch Width: 4
12 # CHECK-NEXT: uOps Per Cycle: 1.91
13 # CHECK-NEXT: IPC: 0.02
14 # CHECK-NEXT: Block RThroughput: 22.5
16 # CHECK: Instruction Info:
17 # CHECK-NEXT: [1]: #uOps
18 # CHECK-NEXT: [2]: Latency
19 # CHECK-NEXT: [3]: RThroughput
20 # CHECK-NEXT: [4]: MayLoad
21 # CHECK-NEXT: [5]: MayStore
22 # CHECK-NEXT: [6]: HasSideEffects (U)
24 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
25 # CHECK-NEXT: 90 64 16.50 * * U fxrstor (%rsp)
27 # CHECK: Resources:
28 # CHECK-NEXT: [0] - HWDivider
29 # CHECK-NEXT: [1] - HWFPDivider
30 # CHECK-NEXT: [2] - HWPort0
31 # CHECK-NEXT: [3] - HWPort1
32 # CHECK-NEXT: [4] - HWPort2
33 # CHECK-NEXT: [5] - HWPort3
34 # CHECK-NEXT: [6] - HWPort4
35 # CHECK-NEXT: [7] - HWPort5
36 # CHECK-NEXT: [8] - HWPort6
37 # CHECK-NEXT: [9] - HWPort7
39 # CHECK: Resource pressure per iteration:
40 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
41 # CHECK-NEXT: - - 4.00 1.00 16.50 16.50 - 1.00 2.00 -
43 # CHECK: Resource pressure by instruction:
44 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
45 # CHECK-NEXT: - - 4.00 1.00 16.50 16.50 - 1.00 2.00 - fxrstor (%rsp)