llvm/test/tools/llvm-mca/X86/Znver2/mulx-read-advance.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -timeline -iterations=2 < %s | FileCheck %s
   3
   4 # PR51494: A read-advance on the implicit read of EDX/RDX was missing.
   5
   6 # LLVM-MCA-BEGIN
   7 mulxl (%rdi), %eax, %edx
   8 # LLVM-MCA-END
   9
  10 # LLVM-MCA-BEGIN
  11 mulxq (%rdi), %rax, %rdx
  12 # LLVM-MCA-END
  13
  14 # CHECK:      [0] Code Region
  15
  16 # CHECK:      Iterations:        2
  17 # CHECK-NEXT: Instructions:      2
  18 # CHECK-NEXT: Total Cycles:      13
  19 # CHECK-NEXT: Total uOps:        2
  20
  21 # CHECK:      Dispatch Width:    4
  22 # CHECK-NEXT: uOps Per Cycle:    0.15
  23 # CHECK-NEXT: IPC:               0.15
  24 # CHECK-NEXT: Block RThroughput: 2.0
  25
  26 # CHECK:      Instruction Info:
  27 # CHECK-NEXT: [1]: #uOps
  28 # CHECK-NEXT: [2]: Latency
  29 # CHECK-NEXT: [3]: RThroughput
  30 # CHECK-NEXT: [4]: MayLoad
  31 # CHECK-NEXT: [5]: MayStore
  32 # CHECK-NEXT: [6]: HasSideEffects (U)
  33
  34 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  35 # CHECK-NEXT:  1      7     2.00    *                   mulxl   (%rdi), %eax, %edx
  36
  37 # CHECK:      Resources:
  38 # CHECK-NEXT: [0]   - Zn2AGU0
  39 # CHECK-NEXT: [1]   - Zn2AGU1
  40 # CHECK-NEXT: [2]   - Zn2AGU2
  41 # CHECK-NEXT: [3]   - Zn2ALU0
  42 # CHECK-NEXT: [4]   - Zn2ALU1
  43 # CHECK-NEXT: [5]   - Zn2ALU2
  44 # CHECK-NEXT: [6]   - Zn2ALU3
  45 # CHECK-NEXT: [7]   - Zn2Divider
  46 # CHECK-NEXT: [8]   - Zn2FPU0
  47 # CHECK-NEXT: [9]   - Zn2FPU1
  48 # CHECK-NEXT: [10]  - Zn2FPU2
  49 # CHECK-NEXT: [11]  - Zn2FPU3
  50 # CHECK-NEXT: [12]  - Zn2Multiplier
  51
  52 # CHECK:      Resource pressure per iteration:
  53 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]
  54 # CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -      -      -      -      -     2.00
  55
  56 # CHECK:      Resource pressure by instruction:
  57 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   Instructions:
  58 # CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -      -      -      -      -     2.00   mulxl  (%rdi), %eax, %edx
  59
  60 # CHECK:      Timeline view:
  61 # CHECK-NEXT:                     012
  62 # CHECK-NEXT: Index     0123456789
  63
  64 # CHECK:      [0,0]     DeeeeeeeER. .   mulxl   (%rdi), %eax, %edx
  65 # CHECK-NEXT: [1,0]     D===eeeeeeeER   mulxl   (%rdi), %eax, %edx
  66
  67 # CHECK:      Average Wait times (based on the timeline view):
  68 # CHECK-NEXT: [0]: Executions
  69 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
  70 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
  71 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
  72
  73 # CHECK:            [0]    [1]    [2]    [3]
  74 # CHECK-NEXT: 0.     2     2.5    0.5    0.0       mulxl        (%rdi), %eax, %edx
  75
  76 # CHECK:      [1] Code Region
  77
  78 # CHECK:      Iterations:        2
  79 # CHECK-NEXT: Instructions:      2
  80 # CHECK-NEXT: Total Cycles:      13
  81 # CHECK-NEXT: Total uOps:        2
  82
  83 # CHECK:      Dispatch Width:    4
  84 # CHECK-NEXT: uOps Per Cycle:    0.15
  85 # CHECK-NEXT: IPC:               0.15
  86 # CHECK-NEXT: Block RThroughput: 2.0
  87
  88 # CHECK:      Instruction Info:
  89 # CHECK-NEXT: [1]: #uOps
  90 # CHECK-NEXT: [2]: Latency
  91 # CHECK-NEXT: [3]: RThroughput
  92 # CHECK-NEXT: [4]: MayLoad
  93 # CHECK-NEXT: [5]: MayStore
  94 # CHECK-NEXT: [6]: HasSideEffects (U)
  95
  96 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  97 # CHECK-NEXT:  1      7     2.00    *                   mulxq   (%rdi), %rax, %rdx
  98
  99 # CHECK:      Resources:
 100 # CHECK-NEXT: [0]   - Zn2AGU0
 101 # CHECK-NEXT: [1]   - Zn2AGU1
 102 # CHECK-NEXT: [2]   - Zn2AGU2
 103 # CHECK-NEXT: [3]   - Zn2ALU0
 104 # CHECK-NEXT: [4]   - Zn2ALU1
 105 # CHECK-NEXT: [5]   - Zn2ALU2
 106 # CHECK-NEXT: [6]   - Zn2ALU3
 107 # CHECK-NEXT: [7]   - Zn2Divider
 108 # CHECK-NEXT: [8]   - Zn2FPU0
 109 # CHECK-NEXT: [9]   - Zn2FPU1
 110 # CHECK-NEXT: [10]  - Zn2FPU2
 111 # CHECK-NEXT: [11]  - Zn2FPU3
 112 # CHECK-NEXT: [12]  - Zn2Multiplier
 113
 114 # CHECK:      Resource pressure per iteration:
 115 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]
 116 # CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -      -      -      -      -     2.00
 117
 118 # CHECK:      Resource pressure by instruction:
 119 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   Instructions:
 120 # CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -      -      -      -      -     2.00   mulxq  (%rdi), %rax, %rdx
 121
 122 # CHECK:      Timeline view:
 123 # CHECK-NEXT:                     012
 124 # CHECK-NEXT: Index     0123456789
 125
 126 # CHECK:      [0,0]     DeeeeeeeER. .   mulxq   (%rdi), %rax, %rdx
 127 # CHECK-NEXT: [1,0]     D===eeeeeeeER   mulxq   (%rdi), %rax, %rdx
 128
 129 # CHECK:      Average Wait times (based on the timeline view):
 130 # CHECK-NEXT: [0]: Executions
 131 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
 132 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
 133 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
 134
 135 # CHECK:            [0]    [1]    [2]    [3]
 136 # CHECK-NEXT: 0.     2     2.5    0.5    0.0       mulxq        (%rdi), %rax, %rdx