1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s
7 # CHECK: Instruction Info:
8 # CHECK-NEXT: [1]: #uOps
9 # CHECK-NEXT: [2]: Latency
10 # CHECK-NEXT: [3]: RThroughput
11 # CHECK-NEXT: [4]: MayLoad
12 # CHECK-NEXT: [5]: MayStore
13 # CHECK-NEXT: [6]: HasSideEffects (U)
15 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
16 # CHECK-NEXT: 1 4 0.33 * * prefetch (%rax)
17 # CHECK-NEXT: 1 4 0.33 * * prefetchw (%rax)
20 # CHECK-NEXT: [0] - Zn2AGU0
21 # CHECK-NEXT: [1] - Zn2AGU1
22 # CHECK-NEXT: [2] - Zn2AGU2
23 # CHECK-NEXT: [3] - Zn2ALU0
24 # CHECK-NEXT: [4] - Zn2ALU1
25 # CHECK-NEXT: [5] - Zn2ALU2
26 # CHECK-NEXT: [6] - Zn2ALU3
27 # CHECK-NEXT: [7] - Zn2Divider
28 # CHECK-NEXT: [8] - Zn2FPU0
29 # CHECK-NEXT: [9] - Zn2FPU1
30 # CHECK-NEXT: [10] - Zn2FPU2
31 # CHECK-NEXT: [11] - Zn2FPU3
32 # CHECK-NEXT: [12] - Zn2Multiplier
34 # CHECK: Resource pressure per iteration:
35 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
36 # CHECK-NEXT: 0.67 0.67 0.67 - - - - - - - - - -
38 # CHECK: Resource pressure by instruction:
39 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
40 # CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetch (%rax)
41 # CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetchw (%rax)