lld/test/ELF/arm-adr.s

   1 // REQUIRES: arm
   2 // RUN: llvm-mc --triple=armv7a-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
   3 // RUN: ld.lld %t.o -o %t
   4 /// R_ARM_ALU_PC_G0 referencing a non-preemptible symbol can be used in PIC links.
   5 // RUN: ld.lld %t.o --shared -o /dev/null
   6 // RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-eabi %t | FileCheck %s
   7
   8 /// Test the short range cases of R_ARM_ALU_PC_G0. The range of the instruction
   9 /// depends on the number of trailing zeros of the displacement. In practice
  10 /// the maximum effective range will be 1024 bytes, which is a 4-byte aligned
  11 /// instruction to a 4-byte aligned word.
  12
  13  .arm
  14  .section .os1, "ax", %progbits
  15  .balign 1024
  16  .word 0
  17  .word 0
  18  .word 0
  19  .word 0
  20 dat1:
  21  .word 0
  22 dat2:
  23  .word 0
  24
  25  .section .os2, "ax", %progbits
  26  .balign 1024
  27  .global _start
  28  .type _start, %function
  29 _start:
  30 /// adr r0, dat1
  31  .inst 0xe24f0008
  32  .reloc 0, R_ARM_ALU_PC_G0, dat1
  33 /// adr r0, dat2
  34  .inst 0xe24f0008
  35  .reloc 4, R_ARM_ALU_PC_G0, dat2
  36 /// adr r0, dat3
  37  .inst 0xe24f0008
  38  .reloc 8, R_ARM_ALU_PC_G0, dat3
  39 /// adr r0, dat4
  40  .inst 0xe24f0008
  41  .reloc 0xc, R_ARM_ALU_PC_G0, dat4
  42
  43  .section .os3, "ax", %progbits
  44  .balign 1024
  45  .word 0
  46  .word 0
  47  .word 0
  48  .word 0
  49 dat3:
  50  .word 0
  51 dat4:
  52  .word 0
  53
  54  .section .os4, "ax", %progbits
  55  .thumb
  56  .type tfunc, %function
  57 tfunc:
  58   bx lr
  59
  60  .section .os5, "ax", %progbits
  61  .arm
  62  .type arm_func, %function
  63
  64 arm_func:
  65  .balign 4
  66 /// adr r0, tfunc
  67  .inst 0xe24f0008
  68  .reloc 0, R_ARM_ALU_PC_G0, tfunc
  69 /// adr r0, afunc
  70  .inst 0xe24f0008
  71  .reloc 4, R_ARM_ALU_PC_G0, afunc
  72  bx lr
  73
  74  .section .os6, "ax", %progbits
  75  .type afunc, %function
  76  .balign 4
  77 afunc:
  78  bx lr
  79
  80 // CHECK:      00020410 <dat1>:
  81 // CHECK-NEXT: 20410: andeq   r0, r0, r0
  82
  83 // CHECK:      00020414 <dat2>:
  84 // CHECK-NEXT: 20414: andeq   r0, r0, r0
  85
  86 // CHECK:     00020800 <_start>:
  87 /// 0x20800 + 0x8 - 0x3f8 = 0x11410 = dat1
  88 // CHECK-NEXT: 20800: sub     r0, pc, #1016
  89 /// 0x20804 + 0x8 - 0x3f8 = 0x11414 = dat2
  90 // CHECK-NEXT: 20804: sub     r0, pc, #1016
  91 /// 0x20808 + 0x8 + 0x400 = 0x11c10 = dat3
  92 // CHECK-NEXT: 20808: add     r0, pc, #64, #28
  93 /// 0x2080c + 0x8 + 0x400 = 0x11c14 = dat4
  94 // CHECK-NEXT: 2080c: add     r0, pc, #64, #28
  95
  96 // CHECK:      00020c10 <dat3>:
  97 // CHECK-NEXT: 20c10: andeq   r0, r0, r0
  98
  99 // CHECK:      00020c14 <dat4>:
 100 // CHECK-NEXT: 20c14: andeq   r0, r0, r0
 101
 102 // CHECK:      00020c18 <tfunc>:
 103 // CHECK-NEXT: 20c18: bx      lr
 104
 105 // CHECK:      00020c1c <arm_func>:
 106 /// 0x20c1c + 0x8 - 0xb = 11c19 = tfunc
 107 // CHECK-NEXT: 20c1c: sub     r0, pc, #11
 108 /// 0x20c20 + 0x8 = 0x11c28 = afunc
 109 // CHECK-NEXT: 20c20: add     r0, pc, #0
 110 // CHECK-NEXT: 20c24: bx      lr
 111
 112 // CHECK:      00020c28 <afunc>:
 113 // CHECK-NEXT: 20c28: bx      lr