clang/test/CodeGen/AArch64/cpu-supports.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals --global-value-regex ".*"
   2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -o - %s | FileCheck %s
   3
   4 //.
   5 // CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
   6 //.
   7 // CHECK-LABEL: @main(
   8 // CHECK-NEXT:  entry:
   9 // CHECK-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
  10 // CHECK-NEXT:    store i32 0, ptr [[RETVAL]], align 4
  11 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
  12 // CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 70368744177664
  13 // CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 70368744177664
  14 // CHECK-NEXT:    [[TMP3:%.*]] = and i1 true, [[TMP2]]
  15 // CHECK-NEXT:    br i1 [[TMP3]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
  16 // CHECK:       if.then:
  17 // CHECK-NEXT:    store i32 1, ptr [[RETVAL]], align 4
  18 // CHECK-NEXT:    br label [[RETURN:%.*]]
  19 // CHECK:       if.end:
  20 // CHECK-NEXT:    [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
  21 // CHECK-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 17867063951360
  22 // CHECK-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 17867063951360
  23 // CHECK-NEXT:    [[TMP7:%.*]] = and i1 true, [[TMP6]]
  24 // CHECK-NEXT:    br i1 [[TMP7]], label [[IF_THEN1:%.*]], label [[IF_END2:%.*]]
  25 // CHECK:       if.then1:
  26 // CHECK-NEXT:    store i32 2, ptr [[RETVAL]], align 4
  27 // CHECK-NEXT:    br label [[RETURN]]
  28 // CHECK:       if.end2:
  29 // CHECK-NEXT:    [[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
  30 // CHECK-NEXT:    [[TMP9:%.*]] = and i64 [[TMP8]], 171136785840078848
  31 // CHECK-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 171136785840078848
  32 // CHECK-NEXT:    [[TMP11:%.*]] = and i1 true, [[TMP10]]
  33 // CHECK-NEXT:    br i1 [[TMP11]], label [[IF_THEN3:%.*]], label [[IF_END4:%.*]]
  34 // CHECK:       if.then3:
  35 // CHECK-NEXT:    store i32 3, ptr [[RETVAL]], align 4
  36 // CHECK-NEXT:    br label [[RETURN]]
  37 // CHECK:       if.end4:
  38 // CHECK-NEXT:    br i1 false, label [[IF_THEN5:%.*]], label [[IF_END6:%.*]]
  39 // CHECK:       if.then5:
  40 // CHECK-NEXT:    store i32 4, ptr [[RETVAL]], align 4
  41 // CHECK-NEXT:    br label [[RETURN]]
  42 // CHECK:       if.end6:
  43 // CHECK-NEXT:    store i32 0, ptr [[RETVAL]], align 4
  44 // CHECK-NEXT:    br label [[RETURN]]
  45 // CHECK:       return:
  46 // CHECK-NEXT:    [[TMP12:%.*]] = load i32, ptr [[RETVAL]], align 4
  47 // CHECK-NEXT:    ret i32 [[TMP12]]
  48 //
  49 int main(void) {
  50   if (__builtin_cpu_supports("sb"))
  51     return 1;
  52
  53   if (__builtin_cpu_supports("sve2-aes+memtag"))
  54     return 2;
  55
  56   if (__builtin_cpu_supports("sme2+ls64+wfxt"))
  57     return 3;
  58
  59   if (__builtin_cpu_supports("avx2"))
  60     return 4;
  61
  62   return 0;
  63 }
  64 //.
  65 // CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
  66 // CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
  67 //.