clang/test/CodeGen/AArch64/gcs.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
   2 // RUN: %clang_cc1 -triple aarch64-eabi -target-feature +gcs -emit-llvm %s -o - | FileCheck %s
   3
   4 #include <arm_acle.h>
   5
   6 // CHECK-LABEL: define dso_local i64 @test_chkfeat
   7 // CHECK-SAME: () #[[ATTR0:[0-9]+]] {
   8 // CHECK-NEXT:  entry:
   9 // CHECK-NEXT:    [[__FEATURES_ADDR_I:%.*]] = alloca i64, align 8
  10 // CHECK-NEXT:    store i64 1, ptr [[__FEATURES_ADDR_I]], align 8
  11 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[__FEATURES_ADDR_I]], align 8
  12 // CHECK-NEXT:    [[TMP1:%.*]] = call i64 @llvm.aarch64.chkfeat(i64 [[TMP0]])
  13 // CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[__FEATURES_ADDR_I]], align 8
  14 // CHECK-NEXT:    [[XOR_I:%.*]] = xor i64 [[TMP1]], [[TMP2]]
  15 // CHECK-NEXT:    ret i64 [[XOR_I]]
  16 //
  17 uint64_t test_chkfeat() {
  18   return __chkfeat(_CHKFEAT_GCS);
  19 }
  20
  21 // CHECK-LABEL: define dso_local ptr @test_gcspr
  22 // CHECK-SAME: () #[[ATTR0]] {
  23 // CHECK-NEXT:  entry:
  24 // CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.read_volatile_register.i64(metadata [[META2:![0-9]+]])
  25 // CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr
  26 // CHECK-NEXT:    ret ptr [[TMP1]]
  27 //
  28 void *test_gcspr() {
  29   return __gcspr();
  30 }
  31
  32 // CHECK-LABEL: define dso_local i64 @test_gcspopm
  33 // CHECK-SAME: () #[[ATTR0]] {
  34 // CHECK-NEXT:  entry:
  35 // CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.aarch64.gcspopm(i64 0)
  36 // CHECK-NEXT:    ret i64 [[TMP0]]
  37 //
  38 uint64_t test_gcspopm() {
  39   return __gcspopm();
  40 }
  41
  42 // CHECK-LABEL: define dso_local ptr @test_gcsss
  43 // CHECK-SAME: (ptr noundef [[P:%.*]]) #[[ATTR0]] {
  44 // CHECK-NEXT:  entry:
  45 // CHECK-NEXT:    [[__STACK_ADDR_I:%.*]] = alloca ptr, align 8
  46 // CHECK-NEXT:    [[P_ADDR:%.*]] = alloca ptr, align 8
  47 // CHECK-NEXT:    store ptr [[P]], ptr [[P_ADDR]], align 8
  48 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[P_ADDR]], align 8
  49 // CHECK-NEXT:    store ptr [[TMP0]], ptr [[__STACK_ADDR_I]], align 8
  50 // CHECK-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[__STACK_ADDR_I]], align 8
  51 // CHECK-NEXT:    [[TMP2:%.*]] = call ptr @llvm.aarch64.gcsss(ptr [[TMP1]])
  52 // CHECK-NEXT:    ret ptr [[TMP2]]
  53 //
  54 const void *test_gcsss(const void *p) {
  55   return __gcsss(p);
  56 }