Revert "[llvm] Improve llvm.objectsize computation by computing GEP, alloca and mallo...
[llvm-project.git] / clang / test / CodeGen / AArch64 / neon-scalar-copy.c
blob4ad1ce53a3b392ab1488bd2920934a973c3eb123
1 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
2 // RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
4 // REQUIRES: aarch64-registered-target || arm-registered-target
6 #include <arm_neon.h>
8 // CHECK-LABEL: define{{.*}} float @test_vdups_lane_f32(<2 x float> noundef %a) #0 {
9 // CHECK: [[VDUPS_LANE:%.*]] = extractelement <2 x float> %a, i32 1
10 // CHECK: ret float [[VDUPS_LANE]]
11 float32_t test_vdups_lane_f32(float32x2_t a) {
12 return vdups_lane_f32(a, 1);
16 // CHECK-LABEL: define{{.*}} double @test_vdupd_lane_f64(<1 x double> noundef %a) #0 {
17 // CHECK: [[VDUPD_LANE:%.*]] = extractelement <1 x double> %a, i32 0
18 // CHECK: ret double [[VDUPD_LANE]]
19 float64_t test_vdupd_lane_f64(float64x1_t a) {
20 return vdupd_lane_f64(a, 0);
24 // CHECK-LABEL: define{{.*}} float @test_vdups_laneq_f32(<4 x float> noundef %a) #0 {
25 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3
26 // CHECK: ret float [[VGETQ_LANE]]
27 float32_t test_vdups_laneq_f32(float32x4_t a) {
28 return vdups_laneq_f32(a, 3);
32 // CHECK-LABEL: define{{.*}} double @test_vdupd_laneq_f64(<2 x double> noundef %a) #0 {
33 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a, i32 1
34 // CHECK: ret double [[VGETQ_LANE]]
35 float64_t test_vdupd_laneq_f64(float64x2_t a) {
36 return vdupd_laneq_f64(a, 1);
40 // CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_s8(<8 x i8> noundef %a) #0 {
41 // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
42 // CHECK: ret i8 [[VGET_LANE]]
43 int8_t test_vdupb_lane_s8(int8x8_t a) {
44 return vdupb_lane_s8(a, 7);
48 // CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_s16(<4 x i16> noundef %a) #0 {
49 // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
50 // CHECK: ret i16 [[VGET_LANE]]
51 int16_t test_vduph_lane_s16(int16x4_t a) {
52 return vduph_lane_s16(a, 3);
56 // CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_s32(<2 x i32> noundef %a) #0 {
57 // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
58 // CHECK: ret i32 [[VGET_LANE]]
59 int32_t test_vdups_lane_s32(int32x2_t a) {
60 return vdups_lane_s32(a, 1);
64 // CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_s64(<1 x i64> noundef %a) #0 {
65 // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
66 // CHECK: ret i64 [[VGET_LANE]]
67 int64_t test_vdupd_lane_s64(int64x1_t a) {
68 return vdupd_lane_s64(a, 0);
72 // CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_u8(<8 x i8> noundef %a) #0 {
73 // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
74 // CHECK: ret i8 [[VGET_LANE]]
75 uint8_t test_vdupb_lane_u8(uint8x8_t a) {
76 return vdupb_lane_u8(a, 7);
80 // CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_u16(<4 x i16> noundef %a) #0 {
81 // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
82 // CHECK: ret i16 [[VGET_LANE]]
83 uint16_t test_vduph_lane_u16(uint16x4_t a) {
84 return vduph_lane_u16(a, 3);
88 // CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_u32(<2 x i32> noundef %a) #0 {
89 // CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
90 // CHECK: ret i32 [[VGET_LANE]]
91 uint32_t test_vdups_lane_u32(uint32x2_t a) {
92 return vdups_lane_u32(a, 1);
96 // CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_u64(<1 x i64> noundef %a) #0 {
97 // CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
98 // CHECK: ret i64 [[VGET_LANE]]
99 uint64_t test_vdupd_lane_u64(uint64x1_t a) {
100 return vdupd_lane_u64(a, 0);
103 // CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_s8(<16 x i8> noundef %a) #0 {
104 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
105 // CHECK: ret i8 [[VGETQ_LANE]]
106 int8_t test_vdupb_laneq_s8(int8x16_t a) {
107 return vdupb_laneq_s8(a, 15);
111 // CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_s16(<8 x i16> noundef %a) #0 {
112 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
113 // CHECK: ret i16 [[VGETQ_LANE]]
114 int16_t test_vduph_laneq_s16(int16x8_t a) {
115 return vduph_laneq_s16(a, 7);
119 // CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_s32(<4 x i32> noundef %a) #0 {
120 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
121 // CHECK: ret i32 [[VGETQ_LANE]]
122 int32_t test_vdups_laneq_s32(int32x4_t a) {
123 return vdups_laneq_s32(a, 3);
127 // CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_s64(<2 x i64> noundef %a) #0 {
128 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
129 // CHECK: ret i64 [[VGETQ_LANE]]
130 int64_t test_vdupd_laneq_s64(int64x2_t a) {
131 return vdupd_laneq_s64(a, 1);
135 // CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_u8(<16 x i8> noundef %a) #0 {
136 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
137 // CHECK: ret i8 [[VGETQ_LANE]]
138 uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
139 return vdupb_laneq_u8(a, 15);
143 // CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_u16(<8 x i16> noundef %a) #0 {
144 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
145 // CHECK: ret i16 [[VGETQ_LANE]]
146 uint16_t test_vduph_laneq_u16(uint16x8_t a) {
147 return vduph_laneq_u16(a, 7);
151 // CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_u32(<4 x i32> noundef %a) #0 {
152 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
153 // CHECK: ret i32 [[VGETQ_LANE]]
154 uint32_t test_vdups_laneq_u32(uint32x4_t a) {
155 return vdups_laneq_u32(a, 3);
159 // CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_u64(<2 x i64> noundef %a) #0 {
160 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
161 // CHECK: ret i64 [[VGETQ_LANE]]
162 uint64_t test_vdupd_laneq_u64(uint64x2_t a) {
163 return vdupd_laneq_u64(a, 1);
166 // CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_p8(<8 x i8> noundef %a) #0 {
167 // CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
168 // CHECK: ret i8 [[VGET_LANE]]
169 poly8_t test_vdupb_lane_p8(poly8x8_t a) {
170 return vdupb_lane_p8(a, 7);
173 // CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_p16(<4 x i16> noundef %a) #0 {
174 // CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
175 // CHECK: ret i16 [[VGET_LANE]]
176 poly16_t test_vduph_lane_p16(poly16x4_t a) {
177 return vduph_lane_p16(a, 3);
180 // CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_p8(<16 x i8> noundef %a) #0 {
181 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
182 // CHECK: ret i8 [[VGETQ_LANE]]
183 poly8_t test_vdupb_laneq_p8(poly8x16_t a) {
184 return vdupb_laneq_p8(a, 15);
187 // CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_p16(<8 x i16> noundef %a) #0 {
188 // CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
189 // CHECK: ret i16 [[VGETQ_LANE]]
190 poly16_t test_vduph_laneq_p16(poly16x8_t a) {
191 return vduph_laneq_p16(a, 7);