clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3
   4 // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
   5 // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
   7 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   8 // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   9
  10 #include <arm_sme.h>
  11
  12 #ifdef SVE_OVERLOADED_FORMS
  13 // A simple used,unused... macro, long enough to represent any SVE builtin.
  14 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
  15 #else
  16 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
  17 #endif
  18
  19 // CHECK-LABEL: @test_svwrite_ver_za8_u8_vg2(
  20 // CHECK-NEXT:  entry:
  21 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  22 // CHECK-NEXT:    ret void
  23 //
  24 // CPP-CHECK-LABEL: @_Z27test_svwrite_ver_za8_u8_vg2j11svuint8x2_t(
  25 // CPP-CHECK-NEXT:  entry:
  26 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  27 // CPP-CHECK-NEXT:    ret void
  28 //
  29 void test_svwrite_ver_za8_u8_vg2(uint32_t base, svuint8x2_t val) __arm_streaming __arm_inout("za") {
  30   SVE_ACLE_FUNC(svwrite_ver_za8,_u8,_vg2,)(0, base, val);
  31 }
  32
  33 // CHECK-LABEL: @test_svwrite_ver_za8_s8_vg2(
  34 // CHECK-NEXT:  entry:
  35 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  36 // CHECK-NEXT:    ret void
  37 //
  38 // CPP-CHECK-LABEL: @_Z27test_svwrite_ver_za8_s8_vg2j10svint8x2_t(
  39 // CPP-CHECK-NEXT:  entry:
  40 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  41 // CPP-CHECK-NEXT:    ret void
  42 //
  43 void test_svwrite_ver_za8_s8_vg2(uint32_t base, svint8x2_t val) __arm_streaming __arm_inout("za") {
  44   SVE_ACLE_FUNC(svwrite_ver_za8,_s8,_vg2,)(0, base, val);
  45 }
  46
  47 // CHECK-LABEL: @test_svwrite_hor_za8_u8_vg2(
  48 // CHECK-NEXT:  entry:
  49 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  50 // CHECK-NEXT:    ret void
  51 //
  52 // CPP-CHECK-LABEL: @_Z27test_svwrite_hor_za8_u8_vg2j11svuint8x2_t(
  53 // CPP-CHECK-NEXT:  entry:
  54 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  55 // CPP-CHECK-NEXT:    ret void
  56 //
  57 void test_svwrite_hor_za8_u8_vg2(uint32_t base, svuint8x2_t val) __arm_streaming __arm_inout("za") {
  58   SVE_ACLE_FUNC(svwrite_hor_za8,_u8,_vg2,)(0, base, val);
  59 }
  60
  61 // CHECK-LABEL: @test_svwrite_hor_za8_s8_vg2(
  62 // CHECK-NEXT:  entry:
  63 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  64 // CHECK-NEXT:    ret void
  65 //
  66 // CPP-CHECK-LABEL: @_Z27test_svwrite_hor_za8_s8_vg2j10svint8x2_t(
  67 // CPP-CHECK-NEXT:  entry:
  68 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
  69 // CPP-CHECK-NEXT:    ret void
  70 //
  71 void test_svwrite_hor_za8_s8_vg2(uint32_t base, svint8x2_t val) __arm_streaming __arm_inout("za") {
  72   SVE_ACLE_FUNC(svwrite_hor_za8,_s8,_vg2,)(0, base, val);
  73 }
  74
  75 // CHECK-LABEL: @test_svwrite_hor_za8_u8_vg4(
  76 // CHECK-NEXT:  entry:
  77 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
  78 // CHECK-NEXT:    ret void
  79 //
  80 // CPP-CHECK-LABEL: @_Z27test_svwrite_hor_za8_u8_vg4j11svuint8x4_t(
  81 // CPP-CHECK-NEXT:  entry:
  82 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
  83 // CPP-CHECK-NEXT:    ret void
  84 //
  85 void test_svwrite_hor_za8_u8_vg4(uint32_t base, svuint8x4_t val) __arm_streaming __arm_inout("za") {
  86   SVE_ACLE_FUNC(svwrite_hor_za8,_u8,_vg4,)(0, base, val);
  87 }
  88
  89 // CHECK-LABEL: @test_svwrite_hor_za8_s8_vg4(
  90 // CHECK-NEXT:  entry:
  91 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
  92 // CHECK-NEXT:    ret void
  93 //
  94 // CPP-CHECK-LABEL: @_Z27test_svwrite_hor_za8_s8_vg4j10svint8x4_t(
  95 // CPP-CHECK-NEXT:  entry:
  96 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
  97 // CPP-CHECK-NEXT:    ret void
  98 //
  99 void test_svwrite_hor_za8_s8_vg4(uint32_t base, svint8x4_t val) __arm_streaming __arm_inout("za") {
 100   SVE_ACLE_FUNC(svwrite_hor_za8,_s8,_vg4,)(0, base, val);
 101 }
 102
 103 // CHECK-LABEL: @test_svwrite_ver_za8_u8_vg4(
 104 // CHECK-NEXT:  entry:
 105 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 106 // CHECK-NEXT:    ret void
 107 //
 108 // CPP-CHECK-LABEL: @_Z27test_svwrite_ver_za8_u8_vg4j11svuint8x4_t(
 109 // CPP-CHECK-NEXT:  entry:
 110 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 111 // CPP-CHECK-NEXT:    ret void
 112 //
 113 void test_svwrite_ver_za8_u8_vg4(uint32_t base, svuint8x4_t val) __arm_streaming __arm_inout("za") {
 114   SVE_ACLE_FUNC(svwrite_ver_za8,_u8,_vg4,)(0, base, val);
 115 }
 116
 117 // CHECK-LABEL: @test_svwrite_ver_za8_s8_vg4(
 118 // CHECK-NEXT:  entry:
 119 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 120 // CHECK-NEXT:    ret void
 121 //
 122 // CPP-CHECK-LABEL: @_Z27test_svwrite_ver_za8_s8_vg4j10svint8x4_t(
 123 // CPP-CHECK-NEXT:  entry:
 124 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv16i8(i32 0, i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 125 // CPP-CHECK-NEXT:    ret void
 126 //
 127 void test_svwrite_ver_za8_s8_vg4(uint32_t base, svint8x4_t val) __arm_streaming __arm_inout("za") {
 128   SVE_ACLE_FUNC(svwrite_ver_za8,_s8,_vg4,)(0, base, val);
 129 }
 130
 131 // CHECK-LABEL: @test_svwrite_hor_za16_u16_vg2(
 132 // CHECK-NEXT:  entry:
 133 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 134 // CHECK-NEXT:    ret void
 135 //
 136 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za16_u16_vg2j12svuint16x2_t(
 137 // CPP-CHECK-NEXT:  entry:
 138 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 139 // CPP-CHECK-NEXT:    ret void
 140 //
 141 void test_svwrite_hor_za16_u16_vg2(uint32_t base, svuint16x2_t val) __arm_streaming __arm_inout("za") {
 142   SVE_ACLE_FUNC(svwrite_hor_za16,_u16,_vg2,)(1, base, val);
 143 }
 144
 145 // CHECK-LABEL: @test_svwrite_hor_za16_bf16_vg2(
 146 // CHECK-NEXT:  entry:
 147 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]])
 148 // CHECK-NEXT:    ret void
 149 //
 150 // CPP-CHECK-LABEL: @_Z30test_svwrite_hor_za16_bf16_vg2j14svbfloat16x2_t(
 151 // CPP-CHECK-NEXT:  entry:
 152 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]])
 153 // CPP-CHECK-NEXT:    ret void
 154 //
 155 void test_svwrite_hor_za16_bf16_vg2(uint32_t base, svbfloat16x2_t val) __arm_streaming __arm_inout("za") {
 156   SVE_ACLE_FUNC(svwrite_hor_za16,_bf16,_vg2,)(1, base, val);
 157 }
 158
 159 // CHECK-LABEL: @test_svwrite_hor_za16_f16_vg2(
 160 // CHECK-NEXT:  entry:
 161 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]])
 162 // CHECK-NEXT:    ret void
 163 //
 164 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za16_f16_vg2j13svfloat16x2_t(
 165 // CPP-CHECK-NEXT:  entry:
 166 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]])
 167 // CPP-CHECK-NEXT:    ret void
 168 //
 169 void test_svwrite_hor_za16_f16_vg2(uint32_t base, svfloat16x2_t val) __arm_streaming __arm_inout("za") {
 170   SVE_ACLE_FUNC(svwrite_hor_za16,_f16,_vg2,)(1, base, val);
 171 }
 172
 173 // CHECK-LABEL: @test_svwrite_hor_za16_s16_vg2(
 174 // CHECK-NEXT:  entry:
 175 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 176 // CHECK-NEXT:    ret void
 177 //
 178 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za16_s16_vg2j11svint16x2_t(
 179 // CPP-CHECK-NEXT:  entry:
 180 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 181 // CPP-CHECK-NEXT:    ret void
 182 //
 183 void test_svwrite_hor_za16_s16_vg2(uint32_t base, svint16x2_t val) __arm_streaming __arm_inout("za") {
 184   SVE_ACLE_FUNC(svwrite_hor_za16,_s16,_vg2,)(1, base, val);
 185 }
 186
 187 // CHECK-LABEL: @test_svwrite_ver_za16_u16_vg2(
 188 // CHECK-NEXT:  entry:
 189 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 190 // CHECK-NEXT:    ret void
 191 //
 192 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za16_u16_vg2j12svuint16x2_t(
 193 // CPP-CHECK-NEXT:  entry:
 194 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 195 // CPP-CHECK-NEXT:    ret void
 196 //
 197 void test_svwrite_ver_za16_u16_vg2(uint32_t base, svuint16x2_t val) __arm_streaming __arm_inout("za") {
 198   SVE_ACLE_FUNC(svwrite_ver_za16,_u16,_vg2,)(1, base, val);
 199 }
 200
 201 // CHECK-LABEL: @test_svwrite_ver_za16_bf16_vg2(
 202 // CHECK-NEXT:  entry:
 203 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]])
 204 // CHECK-NEXT:    ret void
 205 //
 206 // CPP-CHECK-LABEL: @_Z30test_svwrite_ver_za16_bf16_vg2j14svbfloat16x2_t(
 207 // CPP-CHECK-NEXT:  entry:
 208 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]])
 209 // CPP-CHECK-NEXT:    ret void
 210 //
 211 void test_svwrite_ver_za16_bf16_vg2(uint32_t base, svbfloat16x2_t val) __arm_streaming __arm_inout("za") {
 212   SVE_ACLE_FUNC(svwrite_ver_za16,_bf16,_vg2,)(1, base, val);
 213 }
 214
 215 // CHECK-LABEL: @test_svwrite_ver_za16_f16_vg2(
 216 // CHECK-NEXT:  entry:
 217 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]])
 218 // CHECK-NEXT:    ret void
 219 //
 220 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za16_f16_vg2j13svfloat16x2_t(
 221 // CPP-CHECK-NEXT:  entry:
 222 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]])
 223 // CPP-CHECK-NEXT:    ret void
 224 //
 225 void test_svwrite_ver_za16_f16_vg2(uint32_t base, svfloat16x2_t val) __arm_streaming __arm_inout("za") {
 226   SVE_ACLE_FUNC(svwrite_ver_za16,_f16,_vg2,)(1, base, val);
 227 }
 228
 229 // CHECK-LABEL: @test_svwrite_ver_za16_s16_vg2(
 230 // CHECK-NEXT:  entry:
 231 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 232 // CHECK-NEXT:    ret void
 233 //
 234 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za16_s16_vg2j11svint16x2_t(
 235 // CPP-CHECK-NEXT:  entry:
 236 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 237 // CPP-CHECK-NEXT:    ret void
 238 //
 239 void test_svwrite_ver_za16_s16_vg2(uint32_t base, svint16x2_t val) __arm_streaming __arm_inout("za") {
 240   SVE_ACLE_FUNC(svwrite_ver_za16,_s16,_vg2,)(1, base, val);
 241 }
 242
 243 // CHECK-LABEL: @test_svwrite_hor_za16_u16_vg4(
 244 // CHECK-NEXT:  entry:
 245 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 246 // CHECK-NEXT:    ret void
 247 //
 248 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za16_u16_vg4j12svuint16x4_t(
 249 // CPP-CHECK-NEXT:  entry:
 250 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 251 // CPP-CHECK-NEXT:    ret void
 252 //
 253 void test_svwrite_hor_za16_u16_vg4(uint32_t base, svuint16x4_t val) __arm_streaming __arm_inout("za") {
 254   SVE_ACLE_FUNC(svwrite_hor_za16,_u16,_vg4,)(1, base, val);
 255 }
 256
 257 // CHECK-LABEL: @test_svwrite_hor_za16_bf16_vg4(
 258 // CHECK-NEXT:  entry:
 259 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE2:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE3:%.*]])
 260 // CHECK-NEXT:    ret void
 261 //
 262 // CPP-CHECK-LABEL: @_Z30test_svwrite_hor_za16_bf16_vg4j14svbfloat16x4_t(
 263 // CPP-CHECK-NEXT:  entry:
 264 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE2:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE3:%.*]])
 265 // CPP-CHECK-NEXT:    ret void
 266 //
 267 void test_svwrite_hor_za16_bf16_vg4(uint32_t base, svbfloat16x4_t val) __arm_streaming __arm_inout("za") {
 268   SVE_ACLE_FUNC(svwrite_hor_za16,_bf16,_vg4,)(1, base, val);
 269 }
 270
 271 // CHECK-LABEL: @test_svwrite_hor_za16_f16_vg4(
 272 // CHECK-NEXT:  entry:
 273 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]], <vscale x 8 x half> [[VAL_COERCE2:%.*]], <vscale x 8 x half> [[VAL_COERCE3:%.*]])
 274 // CHECK-NEXT:    ret void
 275 //
 276 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za16_f16_vg4j13svfloat16x4_t(
 277 // CPP-CHECK-NEXT:  entry:
 278 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]], <vscale x 8 x half> [[VAL_COERCE2:%.*]], <vscale x 8 x half> [[VAL_COERCE3:%.*]])
 279 // CPP-CHECK-NEXT:    ret void
 280 //
 281 void test_svwrite_hor_za16_f16_vg4(uint32_t base, svfloat16x4_t val) __arm_streaming __arm_inout("za") {
 282   SVE_ACLE_FUNC(svwrite_hor_za16,_f16,_vg4,)(1, base, val);
 283 }
 284
 285 // CHECK-LABEL: @test_svwrite_hor_za16_s16_vg4(
 286 // CHECK-NEXT:  entry:
 287 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 288 // CHECK-NEXT:    ret void
 289 //
 290 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za16_s16_vg4j11svint16x4_t(
 291 // CPP-CHECK-NEXT:  entry:
 292 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 293 // CPP-CHECK-NEXT:    ret void
 294 //
 295 void test_svwrite_hor_za16_s16_vg4(uint32_t base, svint16x4_t val) __arm_streaming __arm_inout("za") {
 296   SVE_ACLE_FUNC(svwrite_hor_za16,_s16,_vg4,)(1, base, val);
 297 }
 298
 299 // CHECK-LABEL: @test_svwrite_ver_za16_u16_vg4(
 300 // CHECK-NEXT:  entry:
 301 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 302 // CHECK-NEXT:    ret void
 303 //
 304 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za16_u16_vg4j12svuint16x4_t(
 305 // CPP-CHECK-NEXT:  entry:
 306 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 307 // CPP-CHECK-NEXT:    ret void
 308 //
 309 void test_svwrite_ver_za16_u16_vg4(uint32_t base, svuint16x4_t val) __arm_streaming __arm_inout("za") {
 310   SVE_ACLE_FUNC(svwrite_ver_za16,_u16,_vg4,)(1, base, val);
 311 }
 312
 313 // CHECK-LABEL: @test_svwrite_ver_za16_bf16_vg4(
 314 // CHECK-NEXT:  entry:
 315 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE2:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE3:%.*]])
 316 // CHECK-NEXT:    ret void
 317 //
 318 // CPP-CHECK-LABEL: @_Z30test_svwrite_ver_za16_bf16_vg4j14svbfloat16x4_t(
 319 // CPP-CHECK-NEXT:  entry:
 320 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8bf16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE2:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE3:%.*]])
 321 // CPP-CHECK-NEXT:    ret void
 322 //
 323 void test_svwrite_ver_za16_bf16_vg4(uint32_t base, svbfloat16x4_t val) __arm_streaming __arm_inout("za") {
 324   SVE_ACLE_FUNC(svwrite_ver_za16,_bf16,_vg4,)(1, base, val);
 325 }
 326
 327 // CHECK-LABEL: @test_svwrite_ver_za16_f16_vg4(
 328 // CHECK-NEXT:  entry:
 329 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]], <vscale x 8 x half> [[VAL_COERCE2:%.*]], <vscale x 8 x half> [[VAL_COERCE3:%.*]])
 330 // CHECK-NEXT:    ret void
 331 //
 332 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za16_f16_vg4j13svfloat16x4_t(
 333 // CPP-CHECK-NEXT:  entry:
 334 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8f16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]], <vscale x 8 x half> [[VAL_COERCE2:%.*]], <vscale x 8 x half> [[VAL_COERCE3:%.*]])
 335 // CPP-CHECK-NEXT:    ret void
 336 //
 337 void test_svwrite_ver_za16_f16_vg4(uint32_t base, svfloat16x4_t val) __arm_streaming __arm_inout("za") {
 338   SVE_ACLE_FUNC(svwrite_ver_za16,_f16,_vg4,)(1, base, val);
 339 }
 340
 341 // CHECK-LABEL: @test_svwrite_ver_za16_s16_vg4(
 342 // CHECK-NEXT:  entry:
 343 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 344 // CHECK-NEXT:    ret void
 345 //
 346 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za16_s16_vg4j11svint16x4_t(
 347 // CPP-CHECK-NEXT:  entry:
 348 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv8i16(i32 1, i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 349 // CPP-CHECK-NEXT:    ret void
 350 //
 351 void test_svwrite_ver_za16_s16_vg4(uint32_t base, svint16x4_t val) __arm_streaming __arm_inout("za") {
 352   SVE_ACLE_FUNC(svwrite_ver_za16,_s16,_vg4,)(1, base, val);
 353 }
 354
 355 // CHECK-LABEL: @test_svwrite_hor_za32_u32_vg2(
 356 // CHECK-NEXT:  entry:
 357 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 358 // CHECK-NEXT:    ret void
 359 //
 360 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za32_u32_vg2j12svuint32x2_t(
 361 // CPP-CHECK-NEXT:  entry:
 362 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 363 // CPP-CHECK-NEXT:    ret void
 364 //
 365 void test_svwrite_hor_za32_u32_vg2(uint32_t base, svuint32x2_t val) __arm_streaming __arm_inout("za") {
 366   SVE_ACLE_FUNC(svwrite_hor_za32,_u32,_vg2,)(3, base, val);
 367 }
 368
 369 // CHECK-LABEL: @test_svwrite_hor_za32_f32_vg2(
 370 // CHECK-NEXT:  entry:
 371 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]])
 372 // CHECK-NEXT:    ret void
 373 //
 374 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za32_f32_vg2j13svfloat32x2_t(
 375 // CPP-CHECK-NEXT:  entry:
 376 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]])
 377 // CPP-CHECK-NEXT:    ret void
 378 //
 379 void test_svwrite_hor_za32_f32_vg2(uint32_t base, svfloat32x2_t val) __arm_streaming __arm_inout("za") {
 380   SVE_ACLE_FUNC(svwrite_hor_za32,_f32,_vg2,)(3, base, val);
 381 }
 382
 383 // CHECK-LABEL: @test_svwrite_hor_za32_s32_vg2(
 384 // CHECK-NEXT:  entry:
 385 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 386 // CHECK-NEXT:    ret void
 387 //
 388 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za32_s32_vg2j11svint32x2_t(
 389 // CPP-CHECK-NEXT:  entry:
 390 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 391 // CPP-CHECK-NEXT:    ret void
 392 //
 393 void test_svwrite_hor_za32_s32_vg2(uint32_t base, svint32x2_t val) __arm_streaming __arm_inout("za") {
 394   SVE_ACLE_FUNC(svwrite_hor_za32,_s32,_vg2,)(3, base, val);
 395 }
 396
 397 // CHECK-LABEL: @test_svwrite_ver_za32_u32_vg2(
 398 // CHECK-NEXT:  entry:
 399 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 400 // CHECK-NEXT:    ret void
 401 //
 402 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za32_u32_vg2j12svuint32x2_t(
 403 // CPP-CHECK-NEXT:  entry:
 404 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 405 // CPP-CHECK-NEXT:    ret void
 406 //
 407 void test_svwrite_ver_za32_u32_vg2(uint32_t base, svuint32x2_t val) __arm_streaming __arm_inout("za") {
 408   SVE_ACLE_FUNC(svwrite_ver_za32,_u32,_vg2,)(3, base, val);
 409 }
 410
 411 // CHECK-LABEL: @test_svwrite_ver_za32_f32_vg2(
 412 // CHECK-NEXT:  entry:
 413 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]])
 414 // CHECK-NEXT:    ret void
 415 //
 416 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za32_f32_vg2j13svfloat32x2_t(
 417 // CPP-CHECK-NEXT:  entry:
 418 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]])
 419 // CPP-CHECK-NEXT:    ret void
 420 //
 421 void test_svwrite_ver_za32_f32_vg2(uint32_t base, svfloat32x2_t val) __arm_streaming __arm_inout("za") {
 422   SVE_ACLE_FUNC(svwrite_ver_za32,_f32,_vg2,)(3, base, val);
 423 }
 424
 425 // CHECK-LABEL: @test_svwrite_ver_za32_s32_vg2(
 426 // CHECK-NEXT:  entry:
 427 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 428 // CHECK-NEXT:    ret void
 429 //
 430 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za32_s32_vg2j11svint32x2_t(
 431 // CPP-CHECK-NEXT:  entry:
 432 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 433 // CPP-CHECK-NEXT:    ret void
 434 //
 435 void test_svwrite_ver_za32_s32_vg2(uint32_t base, svint32x2_t val) __arm_streaming __arm_inout("za") {
 436   SVE_ACLE_FUNC(svwrite_ver_za32,_s32,_vg2,)(3, base, val);
 437 }
 438
 439 // CHECK-LABEL: @test_svwrite_hor_za32_u32_vg4(
 440 // CHECK-NEXT:  entry:
 441 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 442 // CHECK-NEXT:    ret void
 443 //
 444 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za32_u32_vg4j12svuint32x4_t(
 445 // CPP-CHECK-NEXT:  entry:
 446 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 447 // CPP-CHECK-NEXT:    ret void
 448 //
 449 void test_svwrite_hor_za32_u32_vg4(uint32_t base, svuint32x4_t val) __arm_streaming __arm_inout("za") {
 450   SVE_ACLE_FUNC(svwrite_hor_za32,_u32,_vg4,)(3, base, val);
 451 }
 452
 453 // CHECK-LABEL: @test_svwrite_hor_za32_f32_vg4(
 454 // CHECK-NEXT:  entry:
 455 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]], <vscale x 4 x float> [[VAL_COERCE2:%.*]], <vscale x 4 x float> [[VAL_COERCE3:%.*]])
 456 // CHECK-NEXT:    ret void
 457 //
 458 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za32_f32_vg4j13svfloat32x4_t(
 459 // CPP-CHECK-NEXT:  entry:
 460 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]], <vscale x 4 x float> [[VAL_COERCE2:%.*]], <vscale x 4 x float> [[VAL_COERCE3:%.*]])
 461 // CPP-CHECK-NEXT:    ret void
 462 //
 463 void test_svwrite_hor_za32_f32_vg4(uint32_t base, svfloat32x4_t val) __arm_streaming __arm_inout("za") {
 464   SVE_ACLE_FUNC(svwrite_hor_za32,_f32,_vg4,)(3, base, val);
 465 }
 466
 467 // CHECK-LABEL: @test_svwrite_hor_za32_s32_vg4(
 468 // CHECK-NEXT:  entry:
 469 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 470 // CHECK-NEXT:    ret void
 471 //
 472 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za32_s32_vg4j11svint32x4_t(
 473 // CPP-CHECK-NEXT:  entry:
 474 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 475 // CPP-CHECK-NEXT:    ret void
 476 //
 477 void test_svwrite_hor_za32_s32_vg4(uint32_t base, svint32x4_t val) __arm_streaming __arm_inout("za") {
 478   SVE_ACLE_FUNC(svwrite_hor_za32,_s32,_vg4,)(3, base, val);
 479 }
 480
 481 // CHECK-LABEL: @test_svwrite_ver_za32_u32_vg4(
 482 // CHECK-NEXT:  entry:
 483 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 484 // CHECK-NEXT:    ret void
 485 //
 486 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za32_u32_vg4j12svuint32x4_t(
 487 // CPP-CHECK-NEXT:  entry:
 488 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 489 // CPP-CHECK-NEXT:    ret void
 490 //
 491 void test_svwrite_ver_za32_u32_vg4(uint32_t base, svuint32x4_t val) __arm_streaming __arm_inout("za") {
 492   SVE_ACLE_FUNC(svwrite_ver_za32,_u32,_vg4,)(3, base, val);
 493 }
 494
 495 // CHECK-LABEL: @test_svwrite_ver_za32_f32_vg4(
 496 // CHECK-NEXT:  entry:
 497 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]], <vscale x 4 x float> [[VAL_COERCE2:%.*]], <vscale x 4 x float> [[VAL_COERCE3:%.*]])
 498 // CHECK-NEXT:    ret void
 499 //
 500 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za32_f32_vg4j13svfloat32x4_t(
 501 // CPP-CHECK-NEXT:  entry:
 502 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv4f32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]], <vscale x 4 x float> [[VAL_COERCE2:%.*]], <vscale x 4 x float> [[VAL_COERCE3:%.*]])
 503 // CPP-CHECK-NEXT:    ret void
 504 //
 505 void test_svwrite_ver_za32_f32_vg4(uint32_t base, svfloat32x4_t val) __arm_streaming __arm_inout("za") {
 506   SVE_ACLE_FUNC(svwrite_ver_za32,_f32,_vg4,)(3, base, val);
 507 }
 508
 509 // CHECK-LABEL: @test_svwrite_ver_za32_s32_vg4(
 510 // CHECK-NEXT:  entry:
 511 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 512 // CHECK-NEXT:    ret void
 513 //
 514 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za32_s32_vg4j11svint32x4_t(
 515 // CPP-CHECK-NEXT:  entry:
 516 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv4i32(i32 3, i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 517 // CPP-CHECK-NEXT:    ret void
 518 //
 519 void test_svwrite_ver_za32_s32_vg4(uint32_t base, svint32x4_t val) __arm_streaming __arm_inout("za") {
 520   SVE_ACLE_FUNC(svwrite_ver_za32,_s32,_vg4,)(3, base, val);
 521 }
 522
 523 // CHECK-LABEL: @test_svwrite_hor_za64_u64_vg2(
 524 // CHECK-NEXT:  entry:
 525 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 526 // CHECK-NEXT:    ret void
 527 //
 528 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za64_u64_vg2j12svuint64x2_t(
 529 // CPP-CHECK-NEXT:  entry:
 530 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 531 // CPP-CHECK-NEXT:    ret void
 532 //
 533 void test_svwrite_hor_za64_u64_vg2(uint32_t base, svuint64x2_t val) __arm_streaming __arm_inout("za") {
 534   SVE_ACLE_FUNC(svwrite_hor_za64,_u64,_vg2,)(7, base, val);
 535 }
 536
 537 // CHECK-LABEL: @test_svwrite_hor_za64_f64_vg2(
 538 // CHECK-NEXT:  entry:
 539 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]])
 540 // CHECK-NEXT:    ret void
 541 //
 542 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za64_f64_vg2j13svfloat64x2_t(
 543 // CPP-CHECK-NEXT:  entry:
 544 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]])
 545 // CPP-CHECK-NEXT:    ret void
 546 //
 547 void test_svwrite_hor_za64_f64_vg2(uint32_t base, svfloat64x2_t val) __arm_streaming __arm_inout("za") {
 548   SVE_ACLE_FUNC(svwrite_hor_za64,_f64,_vg2,)(7, base, val);
 549 }
 550
 551 // CHECK-LABEL: @test_svwrite_hor_za64_s64_vg2(
 552 // CHECK-NEXT:  entry:
 553 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 554 // CHECK-NEXT:    ret void
 555 //
 556 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za64_s64_vg2j11svint64x2_t(
 557 // CPP-CHECK-NEXT:  entry:
 558 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 559 // CPP-CHECK-NEXT:    ret void
 560 //
 561 void test_svwrite_hor_za64_s64_vg2(uint32_t base, svint64x2_t val) __arm_streaming __arm_inout("za") {
 562   SVE_ACLE_FUNC(svwrite_hor_za64,_s64,_vg2,)(7, base, val);
 563 }
 564
 565 // CHECK-LABEL: @test_svwrite_ver_za64_u64_vg2(
 566 // CHECK-NEXT:  entry:
 567 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 568 // CHECK-NEXT:    ret void
 569 //
 570 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za64_u64_vg2j12svuint64x2_t(
 571 // CPP-CHECK-NEXT:  entry:
 572 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 573 // CPP-CHECK-NEXT:    ret void
 574 //
 575 void test_svwrite_ver_za64_u64_vg2(uint32_t base, svuint64x2_t val) __arm_streaming __arm_inout("za") {
 576   SVE_ACLE_FUNC(svwrite_ver_za64,_u64,_vg2,)(7, base, val);
 577 }
 578
 579 // CHECK-LABEL: @test_svwrite_ver_za64_f64_vg2(
 580 // CHECK-NEXT:  entry:
 581 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]])
 582 // CHECK-NEXT:    ret void
 583 //
 584 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za64_f64_vg2j13svfloat64x2_t(
 585 // CPP-CHECK-NEXT:  entry:
 586 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]])
 587 // CPP-CHECK-NEXT:    ret void
 588 //
 589 void test_svwrite_ver_za64_f64_vg2(uint32_t base, svfloat64x2_t val) __arm_streaming __arm_inout("za") {
 590   SVE_ACLE_FUNC(svwrite_ver_za64,_f64,_vg2,)(7, base, val);
 591 }
 592
 593 // CHECK-LABEL: @test_svwrite_ver_za64_s64_vg2(
 594 // CHECK-NEXT:  entry:
 595 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 596 // CHECK-NEXT:    ret void
 597 //
 598 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za64_s64_vg2j11svint64x2_t(
 599 // CPP-CHECK-NEXT:  entry:
 600 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg2.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 601 // CPP-CHECK-NEXT:    ret void
 602 //
 603 void test_svwrite_ver_za64_s64_vg2(uint32_t base, svint64x2_t val) __arm_streaming __arm_inout("za") {
 604   SVE_ACLE_FUNC(svwrite_ver_za64,_s64,_vg2,)(7, base, val);
 605 }
 606
 607 // CHECK-LABEL: @test_svwrite_hor_za64_u64_vg4(
 608 // CHECK-NEXT:  entry:
 609 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 610 // CHECK-NEXT:    ret void
 611 //
 612 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za64_u64_vg4j12svuint64x4_t(
 613 // CPP-CHECK-NEXT:  entry:
 614 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 615 // CPP-CHECK-NEXT:    ret void
 616 //
 617 void test_svwrite_hor_za64_u64_vg4(uint32_t base, svuint64x4_t val) __arm_streaming __arm_inout("za") {
 618   SVE_ACLE_FUNC(svwrite_hor_za64,_u64,_vg4,)(7, base, val);
 619 }
 620
 621 // CHECK-LABEL: @test_svwrite_ver_za64_u64_vg4(
 622 // CHECK-NEXT:  entry:
 623 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 624 // CHECK-NEXT:    ret void
 625 //
 626 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za64_u64_vg4j12svuint64x4_t(
 627 // CPP-CHECK-NEXT:  entry:
 628 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 629 // CPP-CHECK-NEXT:    ret void
 630 //
 631 void test_svwrite_ver_za64_u64_vg4(uint32_t base, svuint64x4_t val) __arm_streaming __arm_inout("za") {
 632   SVE_ACLE_FUNC(svwrite_ver_za64,_u64,_vg4,)(7, base, val);
 633 }
 634
 635 // CHECK-LABEL: @test_svwrite_hor_za64_f64_vg4(
 636 // CHECK-NEXT:  entry:
 637 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]], <vscale x 2 x double> [[VAL_COERCE2:%.*]], <vscale x 2 x double> [[VAL_COERCE3:%.*]])
 638 // CHECK-NEXT:    ret void
 639 //
 640 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za64_f64_vg4j13svfloat64x4_t(
 641 // CPP-CHECK-NEXT:  entry:
 642 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]], <vscale x 2 x double> [[VAL_COERCE2:%.*]], <vscale x 2 x double> [[VAL_COERCE3:%.*]])
 643 // CPP-CHECK-NEXT:    ret void
 644 //
 645 void test_svwrite_hor_za64_f64_vg4(uint32_t base, svfloat64x4_t val) __arm_streaming __arm_inout("za") {
 646   SVE_ACLE_FUNC(svwrite_hor_za64,_f64,_vg4,)(7, base, val);
 647 }
 648
 649 // CHECK-LABEL: @test_svwrite_hor_za64_s64_vg4(
 650 // CHECK-NEXT:  entry:
 651 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 652 // CHECK-NEXT:    ret void
 653 //
 654 // CPP-CHECK-LABEL: @_Z29test_svwrite_hor_za64_s64_vg4j11svint64x4_t(
 655 // CPP-CHECK-NEXT:  entry:
 656 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.hor.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 657 // CPP-CHECK-NEXT:    ret void
 658 //
 659 void test_svwrite_hor_za64_s64_vg4(uint32_t base, svint64x4_t val) __arm_streaming __arm_inout("za") {
 660   SVE_ACLE_FUNC(svwrite_hor_za64,_s64,_vg4,)(7, base, val);
 661 }
 662
 663 // CHECK-LABEL: @test_svwrite_ver_za64_f64_vg4(
 664 // CHECK-NEXT:  entry:
 665 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]], <vscale x 2 x double> [[VAL_COERCE2:%.*]], <vscale x 2 x double> [[VAL_COERCE3:%.*]])
 666 // CHECK-NEXT:    ret void
 667 //
 668 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za64_f64_vg4j13svfloat64x4_t(
 669 // CPP-CHECK-NEXT:  entry:
 670 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv2f64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]], <vscale x 2 x double> [[VAL_COERCE2:%.*]], <vscale x 2 x double> [[VAL_COERCE3:%.*]])
 671 // CPP-CHECK-NEXT:    ret void
 672 //
 673 void test_svwrite_ver_za64_f64_vg4(uint32_t base, svfloat64x4_t val) __arm_streaming __arm_inout("za") {
 674   SVE_ACLE_FUNC(svwrite_ver_za64,_f64,_vg4,)(7, base, val);
 675 }
 676
 677 // CHECK-LABEL: @test_svwrite_ver_za64_s64_vg4(
 678 // CHECK-NEXT:  entry:
 679 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 680 // CHECK-NEXT:    ret void
 681 //
 682 // CPP-CHECK-LABEL: @_Z29test_svwrite_ver_za64_s64_vg4j11svint64x4_t(
 683 // CPP-CHECK-NEXT:  entry:
 684 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.ver.vg4.nxv2i64(i32 7, i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 685 // CPP-CHECK-NEXT:    ret void
 686 //
 687 void test_svwrite_ver_za64_s64_vg4(uint32_t base, svint64x4_t val) __arm_streaming __arm_inout("za") {
 688   SVE_ACLE_FUNC(svwrite_ver_za64,_s64,_vg4,)(7, base, val);
 689 }
 690
 691 // CHECK-LABEL: @test_svwrite_za8_s8_vg1x2(
 692 // CHECK-NEXT:  entry:
 693 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
 694 // CHECK-NEXT:    ret void
 695 //
 696 // CPP-CHECK-LABEL: @_Z25test_svwrite_za8_s8_vg1x2j10svint8x2_t(
 697 // CPP-CHECK-NEXT:  entry:
 698 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
 699 // CPP-CHECK-NEXT:    ret void
 700 //
 701 void test_svwrite_za8_s8_vg1x2(uint32_t base, svint8x2_t val) __arm_streaming __arm_inout("za") {
 702   SVE_ACLE_FUNC(svwrite_za8,_s8,_vg1x2,)(base, val);
 703 }
 704
 705 // CHECK-LABEL: @test_svwrite_za8_u8_vg1x2(
 706 // CHECK-NEXT:  entry:
 707 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
 708 // CHECK-NEXT:    ret void
 709 //
 710 // CPP-CHECK-LABEL: @_Z25test_svwrite_za8_u8_vg1x2j11svuint8x2_t(
 711 // CPP-CHECK-NEXT:  entry:
 712 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]])
 713 // CPP-CHECK-NEXT:    ret void
 714 //
 715 void test_svwrite_za8_u8_vg1x2(uint32_t base, svuint8x2_t val) __arm_streaming __arm_inout("za") {
 716   SVE_ACLE_FUNC(svwrite_za8,_u8,_vg1x2,)(base, val);
 717 }
 718
 719 // CHECK-LABEL: @test_svwrite_za16_s16_vg1x2(
 720 // CHECK-NEXT:  entry:
 721 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 722 // CHECK-NEXT:    ret void
 723 //
 724 // CPP-CHECK-LABEL: @_Z27test_svwrite_za16_s16_vg1x2j11svint16x2_t(
 725 // CPP-CHECK-NEXT:  entry:
 726 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 727 // CPP-CHECK-NEXT:    ret void
 728 //
 729 void test_svwrite_za16_s16_vg1x2(uint32_t base, svint16x2_t val) __arm_streaming __arm_inout("za") {
 730   SVE_ACLE_FUNC(svwrite_za16,_s16,_vg1x2,)(base, val);
 731 }
 732
 733 // CHECK-LABEL: @test_svwrite_za16_u16_vg1x2(
 734 // CHECK-NEXT:  entry:
 735 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 736 // CHECK-NEXT:    ret void
 737 //
 738 // CPP-CHECK-LABEL: @_Z27test_svwrite_za16_u16_vg1x2j12svuint16x2_t(
 739 // CPP-CHECK-NEXT:  entry:
 740 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]])
 741 // CPP-CHECK-NEXT:    ret void
 742 //
 743 void test_svwrite_za16_u16_vg1x2(uint32_t base, svuint16x2_t val) __arm_streaming __arm_inout("za") {
 744   SVE_ACLE_FUNC(svwrite_za16,_u16,_vg1x2,)(base, val);
 745 }
 746
 747 // CHECK-LABEL: @test_svwrite_za16_bf16_vg1x2(
 748 // CHECK-NEXT:  entry:
 749 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8bf16(i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]])
 750 // CHECK-NEXT:    ret void
 751 //
 752 // CPP-CHECK-LABEL: @_Z28test_svwrite_za16_bf16_vg1x2j14svbfloat16x2_t(
 753 // CPP-CHECK-NEXT:  entry:
 754 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8bf16(i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]])
 755 // CPP-CHECK-NEXT:    ret void
 756 //
 757 void test_svwrite_za16_bf16_vg1x2(uint32_t base, svbfloat16x2_t val) __arm_streaming __arm_inout("za") {
 758   SVE_ACLE_FUNC(svwrite_za16,_bf16,_vg1x2,)(base, val);
 759 }
 760
 761 // CHECK-LABEL: @test_svwrite_za16_f16_vg1x2(
 762 // CHECK-NEXT:  entry:
 763 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8f16(i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]])
 764 // CHECK-NEXT:    ret void
 765 //
 766 // CPP-CHECK-LABEL: @_Z27test_svwrite_za16_f16_vg1x2j13svfloat16x2_t(
 767 // CPP-CHECK-NEXT:  entry:
 768 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv8f16(i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]])
 769 // CPP-CHECK-NEXT:    ret void
 770 //
 771 void test_svwrite_za16_f16_vg1x2(uint32_t base, svfloat16x2_t val) __arm_streaming __arm_inout("za") {
 772   SVE_ACLE_FUNC(svwrite_za16,_f16,_vg1x2,)(base, val);
 773 }
 774
 775 // CHECK-LABEL: @test_svwrite_za32_s32_vg1x2(
 776 // CHECK-NEXT:  entry:
 777 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 778 // CHECK-NEXT:    ret void
 779 //
 780 // CPP-CHECK-LABEL: @_Z27test_svwrite_za32_s32_vg1x2j11svint32x2_t(
 781 // CPP-CHECK-NEXT:  entry:
 782 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 783 // CPP-CHECK-NEXT:    ret void
 784 //
 785 void test_svwrite_za32_s32_vg1x2(uint32_t base, svint32x2_t val) __arm_streaming __arm_inout("za") {
 786   SVE_ACLE_FUNC(svwrite_za32,_s32,_vg1x2,)(base, val);
 787 }
 788
 789 // CHECK-LABEL: @test_svwrite_za32_u32_vg1x2(
 790 // CHECK-NEXT:  entry:
 791 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 792 // CHECK-NEXT:    ret void
 793 //
 794 // CPP-CHECK-LABEL: @_Z27test_svwrite_za32_u32_vg1x2j12svuint32x2_t(
 795 // CPP-CHECK-NEXT:  entry:
 796 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]])
 797 // CPP-CHECK-NEXT:    ret void
 798 //
 799 void test_svwrite_za32_u32_vg1x2(uint32_t base, svuint32x2_t val) __arm_streaming __arm_inout("za") {
 800   SVE_ACLE_FUNC(svwrite_za32,_u32,_vg1x2,)(base, val);
 801 }
 802
 803 // CHECK-LABEL: @test_svwrite_za32_f32_vg1x2(
 804 // CHECK-NEXT:  entry:
 805 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv4f32(i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]])
 806 // CHECK-NEXT:    ret void
 807 //
 808 // CPP-CHECK-LABEL: @_Z27test_svwrite_za32_f32_vg1x2j13svfloat32x2_t(
 809 // CPP-CHECK-NEXT:  entry:
 810 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv4f32(i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]])
 811 // CPP-CHECK-NEXT:    ret void
 812 //
 813 void test_svwrite_za32_f32_vg1x2(uint32_t base, svfloat32x2_t val) __arm_streaming __arm_inout("za") {
 814   SVE_ACLE_FUNC(svwrite_za32,_f32,_vg1x2,)(base, val);
 815 }
 816
 817 // CHECK-LABEL: @test_svwrite_za64_u64_vg1x2(
 818 // CHECK-NEXT:  entry:
 819 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 820 // CHECK-NEXT:    ret void
 821 //
 822 // CPP-CHECK-LABEL: @_Z27test_svwrite_za64_u64_vg1x2j12svuint64x2_t(
 823 // CPP-CHECK-NEXT:  entry:
 824 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 825 // CPP-CHECK-NEXT:    ret void
 826 //
 827 void test_svwrite_za64_u64_vg1x2(uint32_t base, svuint64x2_t val) __arm_streaming __arm_inout("za") {
 828   SVE_ACLE_FUNC(svwrite_za64,_u64,_vg1x2,)(base, val);
 829 }
 830
 831 // CHECK-LABEL: @test_svwrite_za64_f64_vg1x2(
 832 // CHECK-NEXT:  entry:
 833 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv2f64(i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]])
 834 // CHECK-NEXT:    ret void
 835 //
 836 // CPP-CHECK-LABEL: @_Z27test_svwrite_za64_f64_vg1x2j13svfloat64x2_t(
 837 // CPP-CHECK-NEXT:  entry:
 838 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv2f64(i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]])
 839 // CPP-CHECK-NEXT:    ret void
 840 //
 841 void test_svwrite_za64_f64_vg1x2(uint32_t base, svfloat64x2_t val) __arm_streaming __arm_inout("za") {
 842   SVE_ACLE_FUNC(svwrite_za64,_f64,_vg1x2,)(base, val);
 843 }
 844
 845 // CHECK-LABEL: @test_svwrite_za64_s64_vg1x2(
 846 // CHECK-NEXT:  entry:
 847 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 848 // CHECK-NEXT:    ret void
 849 //
 850 // CPP-CHECK-LABEL: @_Z27test_svwrite_za64_s64_vg1x2j11svint64x2_t(
 851 // CPP-CHECK-NEXT:  entry:
 852 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x2.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]])
 853 // CPP-CHECK-NEXT:    ret void
 854 //
 855 void test_svwrite_za64_s64_vg1x2(uint32_t base, svint64x2_t val) __arm_streaming __arm_inout("za") {
 856   SVE_ACLE_FUNC(svwrite_za64,_s64,_vg1x2,)(base, val);
 857 }
 858
 859 // CHECK-LABEL: @test_svwrite_za8_s8_vg1x4(
 860 // CHECK-NEXT:  entry:
 861 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 862 // CHECK-NEXT:    ret void
 863 //
 864 // CPP-CHECK-LABEL: @_Z25test_svwrite_za8_s8_vg1x4j10svint8x4_t(
 865 // CPP-CHECK-NEXT:  entry:
 866 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 867 // CPP-CHECK-NEXT:    ret void
 868 //
 869 void test_svwrite_za8_s8_vg1x4(uint32_t base, svint8x4_t val) __arm_streaming __arm_inout("za") {
 870   SVE_ACLE_FUNC(svwrite_za8,_s8,_vg1x4,)(base, val);
 871 }
 872
 873 // CHECK-LABEL: @test_svwrite_za8_u8_vg1x4(
 874 // CHECK-NEXT:  entry:
 875 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 876 // CHECK-NEXT:    ret void
 877 //
 878 // CPP-CHECK-LABEL: @_Z25test_svwrite_za8_u8_vg1x4j11svuint8x4_t(
 879 // CPP-CHECK-NEXT:  entry:
 880 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv16i8(i32 [[BASE:%.*]], <vscale x 16 x i8> [[VAL_COERCE0:%.*]], <vscale x 16 x i8> [[VAL_COERCE1:%.*]], <vscale x 16 x i8> [[VAL_COERCE2:%.*]], <vscale x 16 x i8> [[VAL_COERCE3:%.*]])
 881 // CPP-CHECK-NEXT:    ret void
 882 //
 883 void test_svwrite_za8_u8_vg1x4(uint32_t base, svuint8x4_t val) __arm_streaming __arm_inout("za") {
 884   SVE_ACLE_FUNC(svwrite_za8,_u8,_vg1x4,)(base, val);
 885 }
 886
 887 // CHECK-LABEL: @test_svwrite_za16_s16_vg1x4(
 888 // CHECK-NEXT:  entry:
 889 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 890 // CHECK-NEXT:    ret void
 891 //
 892 // CPP-CHECK-LABEL: @_Z27test_svwrite_za16_s16_vg1x4j11svint16x4_t(
 893 // CPP-CHECK-NEXT:  entry:
 894 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 895 // CPP-CHECK-NEXT:    ret void
 896 //
 897 void test_svwrite_za16_s16_vg1x4(uint32_t base, svint16x4_t val) __arm_streaming __arm_inout("za") {
 898   SVE_ACLE_FUNC(svwrite_za16,_s16,_vg1x4,)(base, val);
 899 }
 900
 901 // CHECK-LABEL: @test_svwrite_za16_u16_vg1x4(
 902 // CHECK-NEXT:  entry:
 903 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 904 // CHECK-NEXT:    ret void
 905 //
 906 // CPP-CHECK-LABEL: @_Z27test_svwrite_za16_u16_vg1x4j12svuint16x4_t(
 907 // CPP-CHECK-NEXT:  entry:
 908 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8i16(i32 [[BASE:%.*]], <vscale x 8 x i16> [[VAL_COERCE0:%.*]], <vscale x 8 x i16> [[VAL_COERCE1:%.*]], <vscale x 8 x i16> [[VAL_COERCE2:%.*]], <vscale x 8 x i16> [[VAL_COERCE3:%.*]])
 909 // CPP-CHECK-NEXT:    ret void
 910 //
 911 void test_svwrite_za16_u16_vg1x4(uint32_t base, svuint16x4_t val) __arm_streaming __arm_inout("za") {
 912   SVE_ACLE_FUNC(svwrite_za16,_u16,_vg1x4,)(base, val);
 913 }
 914
 915 // CHECK-LABEL: @test_svwrite_za16_bf16_vg1x4(
 916 // CHECK-NEXT:  entry:
 917 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8bf16(i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE2:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE3:%.*]])
 918 // CHECK-NEXT:    ret void
 919 //
 920 // CPP-CHECK-LABEL: @_Z28test_svwrite_za16_bf16_vg1x4j14svbfloat16x4_t(
 921 // CPP-CHECK-NEXT:  entry:
 922 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8bf16(i32 [[BASE:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE0:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE1:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE2:%.*]], <vscale x 8 x bfloat> [[VAL_COERCE3:%.*]])
 923 // CPP-CHECK-NEXT:    ret void
 924 //
 925 void test_svwrite_za16_bf16_vg1x4(uint32_t base, svbfloat16x4_t val) __arm_streaming __arm_inout("za") {
 926   SVE_ACLE_FUNC(svwrite_za16,_bf16,_vg1x4,)(base, val);
 927 }
 928
 929 // CHECK-LABEL: @test_svwrite_za16_f16_vg1x4(
 930 // CHECK-NEXT:  entry:
 931 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8f16(i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]], <vscale x 8 x half> [[VAL_COERCE2:%.*]], <vscale x 8 x half> [[VAL_COERCE3:%.*]])
 932 // CHECK-NEXT:    ret void
 933 //
 934 // CPP-CHECK-LABEL: @_Z27test_svwrite_za16_f16_vg1x4j13svfloat16x4_t(
 935 // CPP-CHECK-NEXT:  entry:
 936 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv8f16(i32 [[BASE:%.*]], <vscale x 8 x half> [[VAL_COERCE0:%.*]], <vscale x 8 x half> [[VAL_COERCE1:%.*]], <vscale x 8 x half> [[VAL_COERCE2:%.*]], <vscale x 8 x half> [[VAL_COERCE3:%.*]])
 937 // CPP-CHECK-NEXT:    ret void
 938 //
 939 void test_svwrite_za16_f16_vg1x4(uint32_t base, svfloat16x4_t val) __arm_streaming __arm_inout("za") {
 940   SVE_ACLE_FUNC(svwrite_za16,_f16,_vg1x4,)(base, val);
 941 }
 942
 943 // CHECK-LABEL: @test_svwrite_za32_s32_vg1x4(
 944 // CHECK-NEXT:  entry:
 945 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 946 // CHECK-NEXT:    ret void
 947 //
 948 // CPP-CHECK-LABEL: @_Z27test_svwrite_za32_s32_vg1x4j11svint32x4_t(
 949 // CPP-CHECK-NEXT:  entry:
 950 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 951 // CPP-CHECK-NEXT:    ret void
 952 //
 953 void test_svwrite_za32_s32_vg1x4(uint32_t base, svint32x4_t val) __arm_streaming __arm_inout("za") {
 954   SVE_ACLE_FUNC(svwrite_za32,_s32,_vg1x4,)(base, val);
 955 }
 956
 957 // CHECK-LABEL: @test_svwrite_za32_u32_vg1x4(
 958 // CHECK-NEXT:  entry:
 959 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 960 // CHECK-NEXT:    ret void
 961 //
 962 // CPP-CHECK-LABEL: @_Z27test_svwrite_za32_u32_vg1x4j12svuint32x4_t(
 963 // CPP-CHECK-NEXT:  entry:
 964 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv4i32(i32 [[BASE:%.*]], <vscale x 4 x i32> [[VAL_COERCE0:%.*]], <vscale x 4 x i32> [[VAL_COERCE1:%.*]], <vscale x 4 x i32> [[VAL_COERCE2:%.*]], <vscale x 4 x i32> [[VAL_COERCE3:%.*]])
 965 // CPP-CHECK-NEXT:    ret void
 966 //
 967 void test_svwrite_za32_u32_vg1x4(uint32_t base, svuint32x4_t val) __arm_streaming __arm_inout("za") {
 968   SVE_ACLE_FUNC(svwrite_za32,_u32,_vg1x4,)(base, val);
 969 }
 970
 971 // CHECK-LABEL: @test_svwrite_za32_f32_vg1x4(
 972 // CHECK-NEXT:  entry:
 973 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv4f32(i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]], <vscale x 4 x float> [[VAL_COERCE2:%.*]], <vscale x 4 x float> [[VAL_COERCE3:%.*]])
 974 // CHECK-NEXT:    ret void
 975 //
 976 // CPP-CHECK-LABEL: @_Z27test_svwrite_za32_f32_vg1x4j13svfloat32x4_t(
 977 // CPP-CHECK-NEXT:  entry:
 978 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv4f32(i32 [[BASE:%.*]], <vscale x 4 x float> [[VAL_COERCE0:%.*]], <vscale x 4 x float> [[VAL_COERCE1:%.*]], <vscale x 4 x float> [[VAL_COERCE2:%.*]], <vscale x 4 x float> [[VAL_COERCE3:%.*]])
 979 // CPP-CHECK-NEXT:    ret void
 980 //
 981 void test_svwrite_za32_f32_vg1x4(uint32_t base, svfloat32x4_t val) __arm_streaming __arm_inout("za") {
 982   SVE_ACLE_FUNC(svwrite_za32,_f32,_vg1x4,)(base, val);
 983 }
 984
 985 // CHECK-LABEL: @test_svwrite_za64_u64_vg1x4(
 986 // CHECK-NEXT:  entry:
 987 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 988 // CHECK-NEXT:    ret void
 989 //
 990 // CPP-CHECK-LABEL: @_Z27test_svwrite_za64_u64_vg1x4j12svuint64x4_t(
 991 // CPP-CHECK-NEXT:  entry:
 992 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
 993 // CPP-CHECK-NEXT:    ret void
 994 //
 995 void test_svwrite_za64_u64_vg1x4(uint32_t base, svuint64x4_t val) __arm_streaming __arm_inout("za") {
 996   SVE_ACLE_FUNC(svwrite_za64,_u64,_vg1x4,)(base, val);
 997 }
 998
 999 // CHECK-LABEL: @test_svwrite_za64_f64_vg1x4(
1000 // CHECK-NEXT:  entry:
1001 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv2f64(i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]], <vscale x 2 x double> [[VAL_COERCE2:%.*]], <vscale x 2 x double> [[VAL_COERCE3:%.*]])
1002 // CHECK-NEXT:    ret void
1003 //
1004 // CPP-CHECK-LABEL: @_Z27test_svwrite_za64_f64_vg1x4j13svfloat64x4_t(
1005 // CPP-CHECK-NEXT:  entry:
1006 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv2f64(i32 [[BASE:%.*]], <vscale x 2 x double> [[VAL_COERCE0:%.*]], <vscale x 2 x double> [[VAL_COERCE1:%.*]], <vscale x 2 x double> [[VAL_COERCE2:%.*]], <vscale x 2 x double> [[VAL_COERCE3:%.*]])
1007 // CPP-CHECK-NEXT:    ret void
1008 //
1009 void test_svwrite_za64_f64_vg1x4(uint32_t base, svfloat64x4_t val) __arm_streaming __arm_inout("za") {
1010   SVE_ACLE_FUNC(svwrite_za64,_f64,_vg1x4,)(base, val);
1011 }
1012
1013 // CHECK-LABEL: @test_svwrite_za64_s64_vg1x4(
1014 // CHECK-NEXT:  entry:
1015 // CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
1016 // CHECK-NEXT:    ret void
1017 //
1018 // CPP-CHECK-LABEL: @_Z27test_svwrite_za64_s64_vg1x4j11svint64x4_t(
1019 // CPP-CHECK-NEXT:  entry:
1020 // CPP-CHECK-NEXT:    tail call void @llvm.aarch64.sme.write.vg1x4.nxv2i64(i32 [[BASE:%.*]], <vscale x 2 x i64> [[VAL_COERCE0:%.*]], <vscale x 2 x i64> [[VAL_COERCE1:%.*]], <vscale x 2 x i64> [[VAL_COERCE2:%.*]], <vscale x 2 x i64> [[VAL_COERCE3:%.*]])
1021 // CPP-CHECK-NEXT:    ret void
1022 //
1023 void test_svwrite_za64_s64_vg1x4(uint32_t base, svint64x4_t val) __arm_streaming __arm_inout("za") {
1024   SVE_ACLE_FUNC(svwrite_za64,_s64,_vg1x4,)(base, val);
1025 }