clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntb.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   6 // RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   7
   8 #include <arm_sve.h>
   9
  10 #if defined __ARM_FEATURE_SME
  11 #define MODE_ATTR __arm_streaming
  12 #else
  13 #define MODE_ATTR
  14 #endif
  15
  16 // CHECK-LABEL: @test_svcntb(
  17 // CHECK-NEXT:  entry:
  18 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
  19 // CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
  20 // CHECK-NEXT:    ret i64 [[TMP1]]
  21 //
  22 // CPP-CHECK-LABEL: @_Z11test_svcntbv(
  23 // CPP-CHECK-NEXT:  entry:
  24 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
  25 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
  26 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
  27 //
  28 uint64_t test_svcntb(void) MODE_ATTR
  29 {
  30   return svcntb();
  31 }
  32
  33 // CHECK-LABEL: @test_svcntb_pat(
  34 // CHECK-NEXT:  entry:
  35 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 0)
  36 // CHECK-NEXT:    ret i64 [[TMP0]]
  37 //
  38 // CPP-CHECK-LABEL: @_Z15test_svcntb_patv(
  39 // CPP-CHECK-NEXT:  entry:
  40 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 0)
  41 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  42 //
  43 uint64_t test_svcntb_pat(void) MODE_ATTR
  44 {
  45   return svcntb_pat(SV_POW2);
  46 }
  47
  48 // CHECK-LABEL: @test_svcntb_pat_1(
  49 // CHECK-NEXT:  entry:
  50 // CHECK-NEXT:    ret i64 1
  51 //
  52 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_1v(
  53 // CPP-CHECK-NEXT:  entry:
  54 // CPP-CHECK-NEXT:    ret i64 1
  55 //
  56 uint64_t test_svcntb_pat_1(void) MODE_ATTR
  57 {
  58   return svcntb_pat(SV_VL1);
  59 }
  60
  61 // CHECK-LABEL: @test_svcntb_pat_2(
  62 // CHECK-NEXT:  entry:
  63 // CHECK-NEXT:    ret i64 2
  64 //
  65 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_2v(
  66 // CPP-CHECK-NEXT:  entry:
  67 // CPP-CHECK-NEXT:    ret i64 2
  68 //
  69 uint64_t test_svcntb_pat_2(void) MODE_ATTR
  70 {
  71   return svcntb_pat(SV_VL2);
  72 }
  73
  74 // CHECK-LABEL: @test_svcntb_pat_3(
  75 // CHECK-NEXT:  entry:
  76 // CHECK-NEXT:    ret i64 3
  77 //
  78 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_3v(
  79 // CPP-CHECK-NEXT:  entry:
  80 // CPP-CHECK-NEXT:    ret i64 3
  81 //
  82 uint64_t test_svcntb_pat_3(void) MODE_ATTR
  83 {
  84   return svcntb_pat(SV_VL3);
  85 }
  86
  87 // CHECK-LABEL: @test_svcntb_pat_4(
  88 // CHECK-NEXT:  entry:
  89 // CHECK-NEXT:    ret i64 4
  90 //
  91 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_4v(
  92 // CPP-CHECK-NEXT:  entry:
  93 // CPP-CHECK-NEXT:    ret i64 4
  94 //
  95 uint64_t test_svcntb_pat_4(void) MODE_ATTR
  96 {
  97   return svcntb_pat(SV_VL4);
  98 }
  99
 100 // CHECK-LABEL: @test_svcntb_pat_5(
 101 // CHECK-NEXT:  entry:
 102 // CHECK-NEXT:    ret i64 5
 103 //
 104 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_5v(
 105 // CPP-CHECK-NEXT:  entry:
 106 // CPP-CHECK-NEXT:    ret i64 5
 107 //
 108 uint64_t test_svcntb_pat_5(void) MODE_ATTR
 109 {
 110   return svcntb_pat(SV_VL5);
 111 }
 112
 113 // CHECK-LABEL: @test_svcntb_pat_6(
 114 // CHECK-NEXT:  entry:
 115 // CHECK-NEXT:    ret i64 6
 116 //
 117 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_6v(
 118 // CPP-CHECK-NEXT:  entry:
 119 // CPP-CHECK-NEXT:    ret i64 6
 120 //
 121 uint64_t test_svcntb_pat_6(void) MODE_ATTR
 122 {
 123   return svcntb_pat(SV_VL6);
 124 }
 125
 126 // CHECK-LABEL: @test_svcntb_pat_7(
 127 // CHECK-NEXT:  entry:
 128 // CHECK-NEXT:    ret i64 7
 129 //
 130 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_7v(
 131 // CPP-CHECK-NEXT:  entry:
 132 // CPP-CHECK-NEXT:    ret i64 7
 133 //
 134 uint64_t test_svcntb_pat_7(void) MODE_ATTR
 135 {
 136   return svcntb_pat(SV_VL7);
 137 }
 138
 139 // CHECK-LABEL: @test_svcntb_pat_8(
 140 // CHECK-NEXT:  entry:
 141 // CHECK-NEXT:    ret i64 8
 142 //
 143 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_8v(
 144 // CPP-CHECK-NEXT:  entry:
 145 // CPP-CHECK-NEXT:    ret i64 8
 146 //
 147 uint64_t test_svcntb_pat_8(void) MODE_ATTR
 148 {
 149   return svcntb_pat(SV_VL8);
 150 }
 151
 152 // CHECK-LABEL: @test_svcntb_pat_9(
 153 // CHECK-NEXT:  entry:
 154 // CHECK-NEXT:    ret i64 16
 155 //
 156 // CPP-CHECK-LABEL: @_Z17test_svcntb_pat_9v(
 157 // CPP-CHECK-NEXT:  entry:
 158 // CPP-CHECK-NEXT:    ret i64 16
 159 //
 160 uint64_t test_svcntb_pat_9(void) MODE_ATTR
 161 {
 162   return svcntb_pat(SV_VL16);
 163 }
 164
 165 // CHECK-LABEL: @test_svcntb_pat_10(
 166 // CHECK-NEXT:  entry:
 167 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 10)
 168 // CHECK-NEXT:    ret i64 [[TMP0]]
 169 //
 170 // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_10v(
 171 // CPP-CHECK-NEXT:  entry:
 172 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 10)
 173 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 174 //
 175 uint64_t test_svcntb_pat_10(void) MODE_ATTR
 176 {
 177   return svcntb_pat(SV_VL32);
 178 }
 179
 180 // CHECK-LABEL: @test_svcntb_pat_11(
 181 // CHECK-NEXT:  entry:
 182 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 11)
 183 // CHECK-NEXT:    ret i64 [[TMP0]]
 184 //
 185 // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_11v(
 186 // CPP-CHECK-NEXT:  entry:
 187 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 11)
 188 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 189 //
 190 uint64_t test_svcntb_pat_11(void) MODE_ATTR
 191 {
 192   return svcntb_pat(SV_VL64);
 193 }
 194
 195 // CHECK-LABEL: @test_svcntb_pat_12(
 196 // CHECK-NEXT:  entry:
 197 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 12)
 198 // CHECK-NEXT:    ret i64 [[TMP0]]
 199 //
 200 // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_12v(
 201 // CPP-CHECK-NEXT:  entry:
 202 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 12)
 203 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 204 //
 205 uint64_t test_svcntb_pat_12(void) MODE_ATTR
 206 {
 207   return svcntb_pat(SV_VL128);
 208 }
 209
 210 // CHECK-LABEL: @test_svcntb_pat_13(
 211 // CHECK-NEXT:  entry:
 212 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 13)
 213 // CHECK-NEXT:    ret i64 [[TMP0]]
 214 //
 215 // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_13v(
 216 // CPP-CHECK-NEXT:  entry:
 217 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 13)
 218 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 219 //
 220 uint64_t test_svcntb_pat_13(void) MODE_ATTR
 221 {
 222   return svcntb_pat(SV_VL256);
 223 }
 224
 225 // CHECK-LABEL: @test_svcntb_pat_14(
 226 // CHECK-NEXT:  entry:
 227 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 29)
 228 // CHECK-NEXT:    ret i64 [[TMP0]]
 229 //
 230 // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_14v(
 231 // CPP-CHECK-NEXT:  entry:
 232 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 29)
 233 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 234 //
 235 uint64_t test_svcntb_pat_14(void) MODE_ATTR
 236 {
 237   return svcntb_pat(SV_MUL4);
 238 }
 239
 240 // CHECK-LABEL: @test_svcntb_pat_15(
 241 // CHECK-NEXT:  entry:
 242 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 30)
 243 // CHECK-NEXT:    ret i64 [[TMP0]]
 244 //
 245 // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_15v(
 246 // CPP-CHECK-NEXT:  entry:
 247 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 30)
 248 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 249 //
 250 uint64_t test_svcntb_pat_15(void) MODE_ATTR
 251 {
 252   return svcntb_pat(SV_MUL3);
 253 }
 254
 255 // CHECK-LABEL: @test_svcntb_pat_16(
 256 // CHECK-NEXT:  entry:
 257 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
 258 // CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
 259 // CHECK-NEXT:    ret i64 [[TMP1]]
 260 //
 261 // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_16v(
 262 // CPP-CHECK-NEXT:  entry:
 263 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
 264 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4
 265 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
 266 //
 267 uint64_t test_svcntb_pat_16(void) MODE_ATTR
 268 {
 269   return svcntb_pat(SV_ALL);
 270 }