1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
3 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
7 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
8 // RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
12 #if defined __ARM_FEATURE_SME
13 #define MODE_ATTR __arm_streaming
18 #ifdef SVE_OVERLOADED_FORMS
19 // A simple used,unused... macro, long enough to represent any SVE builtin.
20 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
22 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
25 // CHECK-LABEL: @test_svqdecb_n_s32(
27 // CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1)
28 // CHECK-NEXT: ret i32 [[TMP0]]
30 // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_s32i(
31 // CPP-CHECK-NEXT: entry:
32 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1)
33 // CPP-CHECK-NEXT: ret i32 [[TMP0]]
35 int32_t test_svqdecb_n_s32(int32_t op
) MODE_ATTR
37 return SVE_ACLE_FUNC(svqdecb
,_n_s32
,,)(op
, 1);
40 // CHECK-LABEL: @test_svqdecb_n_s32_1(
42 // CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16)
43 // CHECK-NEXT: ret i32 [[TMP0]]
45 // CPP-CHECK-LABEL: @_Z20test_svqdecb_n_s32_1i(
46 // CPP-CHECK-NEXT: entry:
47 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16)
48 // CPP-CHECK-NEXT: ret i32 [[TMP0]]
50 int32_t test_svqdecb_n_s32_1(int32_t op
) MODE_ATTR
52 return SVE_ACLE_FUNC(svqdecb
,_n_s32
,,)(op
, 16);
55 // CHECK-LABEL: @test_svqdecb_n_s64(
57 // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1)
58 // CHECK-NEXT: ret i64 [[TMP0]]
60 // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_s64l(
61 // CPP-CHECK-NEXT: entry:
62 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1)
63 // CPP-CHECK-NEXT: ret i64 [[TMP0]]
65 int64_t test_svqdecb_n_s64(int64_t op
) MODE_ATTR
67 return SVE_ACLE_FUNC(svqdecb
,_n_s64
,,)(op
, 1);
70 // CHECK-LABEL: @test_svqdecb_n_u32(
72 // CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16)
73 // CHECK-NEXT: ret i32 [[TMP0]]
75 // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_u32j(
76 // CPP-CHECK-NEXT: entry:
77 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16)
78 // CPP-CHECK-NEXT: ret i32 [[TMP0]]
80 uint32_t test_svqdecb_n_u32(uint32_t op
) MODE_ATTR
82 return SVE_ACLE_FUNC(svqdecb
,_n_u32
,,)(op
, 16);
85 // CHECK-LABEL: @test_svqdecb_n_u64(
87 // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1)
88 // CHECK-NEXT: ret i64 [[TMP0]]
90 // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_u64m(
91 // CPP-CHECK-NEXT: entry:
92 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1)
93 // CPP-CHECK-NEXT: ret i64 [[TMP0]]
95 uint64_t test_svqdecb_n_u64(uint64_t op
) MODE_ATTR
97 return SVE_ACLE_FUNC(svqdecb
,_n_u64
,,)(op
, 1);
100 // CHECK-LABEL: @test_svqdecb_pat_n_s32(
101 // CHECK-NEXT: entry:
102 // CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16)
103 // CHECK-NEXT: ret i32 [[TMP0]]
105 // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_s32i(
106 // CPP-CHECK-NEXT: entry:
107 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16)
108 // CPP-CHECK-NEXT: ret i32 [[TMP0]]
110 int32_t test_svqdecb_pat_n_s32(int32_t op
) MODE_ATTR
112 return SVE_ACLE_FUNC(svqdecb_pat
,_n_s32
,,)(op
, SV_POW2
, 16);
115 // CHECK-LABEL: @test_svqdecb_pat_n_s64(
116 // CHECK-NEXT: entry:
117 // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1)
118 // CHECK-NEXT: ret i64 [[TMP0]]
120 // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_s64l(
121 // CPP-CHECK-NEXT: entry:
122 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1)
123 // CPP-CHECK-NEXT: ret i64 [[TMP0]]
125 int64_t test_svqdecb_pat_n_s64(int64_t op
) MODE_ATTR
127 return SVE_ACLE_FUNC(svqdecb_pat
,_n_s64
,,)(op
, SV_VL1
, 1);
130 // CHECK-LABEL: @test_svqdecb_pat_n_u32(
131 // CHECK-NEXT: entry:
132 // CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16)
133 // CHECK-NEXT: ret i32 [[TMP0]]
135 // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_u32j(
136 // CPP-CHECK-NEXT: entry:
137 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16)
138 // CPP-CHECK-NEXT: ret i32 [[TMP0]]
140 uint32_t test_svqdecb_pat_n_u32(uint32_t op
) MODE_ATTR
142 return SVE_ACLE_FUNC(svqdecb_pat
,_n_u32
,,)(op
, SV_VL2
, 16);
145 // CHECK-LABEL: @test_svqdecb_pat_n_u64(
146 // CHECK-NEXT: entry:
147 // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1)
148 // CHECK-NEXT: ret i64 [[TMP0]]
150 // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_u64m(
151 // CPP-CHECK-NEXT: entry:
152 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1)
153 // CPP-CHECK-NEXT: ret i64 [[TMP0]]
155 uint64_t test_svqdecb_pat_n_u64(uint64_t op
) MODE_ATTR
157 return SVE_ACLE_FUNC(svqdecb_pat
,_n_u64
,,)(op
, SV_VL3
, 1);