clang/test/CodeGen/X86/bmi-builtins.c

   1 // RUN: %clang_cc1 -x c -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +bmi -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK,TZCNT
   2 // RUN: %clang_cc1 -x c -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 -ffreestanding %s -triple=x86_64-windows-msvc -emit-llvm -o - -Wall -Werror -DTEST_TZCNT | FileCheck %s --check-prefix=TZCNT
   3 // RUN: %clang_cc1 -x c++ -std=c++11 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +bmi -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK,TZCNT
   4 // RUN: %clang_cc1 -x c++ -std=c++11 -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 -ffreestanding %s -triple=x86_64-windows-msvc -emit-llvm -o - -Wall -Werror -DTEST_TZCNT | FileCheck %s --check-prefix=TZCNT
   5
   6
   7 #include <immintrin.h>
   8
   9 // NOTE: This should match the tests in llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
  10
  11 // The double underscore intrinsics are for compatibility with
  12 // AMD's BMI interface. The single underscore intrinsics
  13 // are for compatibility with Intel's BMI interface.
  14 // Apart from the underscores, the interfaces are identical
  15 // except in one case: although the 'bextr' register-form
  16 // instruction is identical in hardware, the AMD and Intel
  17 // intrinsics are different!
  18
  19 unsigned short test_tzcnt_u16(unsigned short __X) {
  20 // TZCNT-LABEL: test_tzcnt_u16
  21 // TZCNT: i16 @llvm.cttz.i16(i16 %{{.*}}, i1 false)
  22   return _tzcnt_u16(__X);
  23 }
  24
  25 unsigned short test__tzcnt_u16(unsigned short __X) {
  26 // TZCNT-LABEL: test__tzcnt_u16
  27 // TZCNT: i16 @llvm.cttz.i16(i16 %{{.*}}, i1 false)
  28   return __tzcnt_u16(__X);
  29 }
  30
  31 unsigned int test__tzcnt_u32(unsigned int __X) {
  32 // TZCNT-LABEL: test__tzcnt_u32
  33 // TZCNT: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 false)
  34   return __tzcnt_u32(__X);
  35 }
  36
  37 int test_mm_tzcnt_32(unsigned int __X) {
  38 // TZCNT-LABEL: test_mm_tzcnt_32
  39 // TZCNT: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 false)
  40   return _mm_tzcnt_32(__X);
  41 }
  42
  43 unsigned int test_tzcnt_u32(unsigned int __X) {
  44 // TZCNT-LABEL: test_tzcnt_u32
  45 // TZCNT: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 false)
  46   return _tzcnt_u32(__X);
  47 }
  48
  49 #ifdef __x86_64__
  50 unsigned long long test__tzcnt_u64(unsigned long long __X) {
  51 // TZCNT-LABEL: test__tzcnt_u64
  52 // TZCNT: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 false)
  53   return __tzcnt_u64(__X);
  54 }
  55
  56 long long test_mm_tzcnt_64(unsigned long long __X) {
  57 // TZCNT-LABEL: test_mm_tzcnt_64
  58 // TZCNT: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 false)
  59   return _mm_tzcnt_64(__X);
  60 }
  61
  62 unsigned long long test_tzcnt_u64(unsigned long long __X) {
  63 // TZCNT-LABEL: test_tzcnt_u64
  64 // TZCNT: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 false)
  65   return _tzcnt_u64(__X);
  66 }
  67 #endif
  68
  69 #if !defined(TEST_TZCNT)
  70 unsigned int test__andn_u32(unsigned int __X, unsigned int __Y) {
  71 // CHECK-LABEL: test__andn_u32
  72 // CHECK: xor i32 %{{.*}}, -1
  73 // CHECK: and i32 %{{.*}}, %{{.*}}
  74   return __andn_u32(__X, __Y);
  75 }
  76
  77 unsigned int test__bextr_u32(unsigned int __X, unsigned int __Y) {
  78 // CHECK-LABEL: test__bextr_u32
  79 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}})
  80   return __bextr_u32(__X, __Y);
  81 }
  82
  83 unsigned int test__blsi_u32(unsigned int __X) {
  84 // CHECK-LABEL: test__blsi_u32
  85 // CHECK: sub i32 0, %{{.*}}
  86 // CHECK: and i32 %{{.*}}, %{{.*}}
  87   return __blsi_u32(__X);
  88 }
  89
  90 unsigned int test__blsmsk_u32(unsigned int __X) {
  91 // CHECK-LABEL: test__blsmsk_u32
  92 // CHECK: sub i32 %{{.*}}, 1
  93 // CHECK: xor i32 %{{.*}}, %{{.*}}
  94   return __blsmsk_u32(__X);
  95 }
  96
  97 unsigned int test__blsr_u32(unsigned int __X) {
  98 // CHECK-LABEL: test__blsr_u32
  99 // CHECK: sub i32 %{{.*}}, 1
 100 // CHECK: and i32 %{{.*}}, %{{.*}}
 101   return __blsr_u32(__X);
 102 }
 103
 104 #ifdef __x86_64__
 105 unsigned long long test__andn_u64(unsigned long __X, unsigned long __Y) {
 106 // CHECK-LABEL: test__andn_u64
 107 // CHECK: xor i64 %{{.*}}, -1
 108 // CHECK: and i64 %{{.*}}, %{{.*}}
 109   return __andn_u64(__X, __Y);
 110 }
 111
 112 unsigned long long test__bextr_u64(unsigned long __X, unsigned long __Y) {
 113 // CHECK-LABEL: test__bextr_u64
 114 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}})
 115   return __bextr_u64(__X, __Y);
 116 }
 117
 118 unsigned long long test__blsi_u64(unsigned long long __X) {
 119 // CHECK-LABEL: test__blsi_u64
 120 // CHECK: sub i64 0, %{{.*}}
 121 // CHECK: and i64 %{{.*}}, %{{.*}}
 122   return __blsi_u64(__X);
 123 }
 124
 125 unsigned long long test__blsmsk_u64(unsigned long long __X) {
 126 // CHECK-LABEL: test__blsmsk_u64
 127 // CHECK: sub i64 %{{.*}}, 1
 128 // CHECK: xor i64 %{{.*}}, %{{.*}}
 129   return __blsmsk_u64(__X);
 130 }
 131
 132 unsigned long long test__blsr_u64(unsigned long long __X) {
 133 // CHECK-LABEL: test__blsr_u64
 134 // CHECK: sub i64 %{{.*}}, 1
 135 // CHECK: and i64 %{{.*}}, %{{.*}}
 136   return __blsr_u64(__X);
 137 }
 138 #endif
 139
 140 // Intel intrinsics
 141
 142 unsigned int test_andn_u32(unsigned int __X, unsigned int __Y) {
 143 // CHECK-LABEL: test_andn_u32
 144 // CHECK: xor i32 %{{.*}}, -1
 145 // CHECK: and i32 %{{.*}}, %{{.*}}
 146   return _andn_u32(__X, __Y);
 147 }
 148
 149 unsigned int test_bextr_u32(unsigned int __X, unsigned int __Y,
 150                             unsigned int __Z) {
 151 // CHECK-LABEL: test_bextr_u32
 152 // CHECK: and i32 %{{.*}}, 255
 153 // CHECK: and i32 %{{.*}}, 255
 154 // CHECK: shl i32 %{{.*}}, 8
 155 // CHECK: or i32 %{{.*}}, %{{.*}}
 156 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}})
 157   return _bextr_u32(__X, __Y, __Z);
 158 }
 159
 160 unsigned int test_bextr2_u32(unsigned int __X, unsigned int __Y) {
 161 // CHECK-LABEL: test_bextr2_u32
 162 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}})
 163   return _bextr2_u32(__X, __Y);
 164 }
 165
 166 unsigned int test_blsi_u32(unsigned int __X) {
 167 // CHECK-LABEL: test_blsi_u32
 168 // CHECK: sub i32 0, %{{.*}}
 169 // CHECK: and i32 %{{.*}}, %{{.*}}
 170   return _blsi_u32(__X);
 171 }
 172
 173 unsigned int test_blsmsk_u32(unsigned int __X) {
 174 // CHECK-LABEL: test_blsmsk_u32
 175 // CHECK: sub i32 %{{.*}}, 1
 176 // CHECK: xor i32 %{{.*}}, %{{.*}}
 177   return _blsmsk_u32(__X);
 178 }
 179
 180 unsigned int test_blsr_u32(unsigned int __X) {
 181 // CHECK-LABEL: test_blsr_u32
 182 // CHECK: sub i32 %{{.*}}, 1
 183 // CHECK: and i32 %{{.*}}, %{{.*}}
 184   return _blsr_u32(__X);
 185 }
 186
 187 #ifdef __x86_64__
 188 unsigned long long test_andn_u64(unsigned long __X, unsigned long __Y) {
 189 // CHECK-LABEL: test_andn_u64
 190 // CHECK: xor i64 %{{.*}}, -1
 191 // CHECK: and i64 %{{.*}}, %{{.*}}
 192   return _andn_u64(__X, __Y);
 193 }
 194
 195 unsigned long long test_bextr_u64(unsigned long __X, unsigned int __Y,
 196                                   unsigned int __Z) {
 197 // CHECK-LABEL: test_bextr_u64
 198 // CHECK: and i32 %{{.*}}, 255
 199 // CHECK: and i32 %{{.*}}, 255
 200 // CHECK: shl i32 %{{.*}}, 8
 201 // CHECK: or i32 %{{.*}}, %{{.*}}
 202 // CHECK: zext i32 %{{.*}} to i64
 203 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}})
 204   return _bextr_u64(__X, __Y, __Z);
 205 }
 206
 207 unsigned long long test_bextr2_u64(unsigned long long __X,
 208                                    unsigned long long __Y) {
 209 // CHECK-LABEL: test_bextr2_u64
 210 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}})
 211   return _bextr2_u64(__X, __Y);
 212 }
 213
 214 unsigned long long test_blsi_u64(unsigned long long __X) {
 215 // CHECK-LABEL: test_blsi_u64
 216 // CHECK: sub i64 0, %{{.*}}
 217 // CHECK: and i64 %{{.*}}, %{{.*}}
 218   return _blsi_u64(__X);
 219 }
 220
 221 unsigned long long test_blsmsk_u64(unsigned long long __X) {
 222 // CHECK-LABEL: test_blsmsk_u64
 223 // CHECK: sub i64 %{{.*}}, 1
 224 // CHECK: xor i64 %{{.*}}, %{{.*}}
 225   return _blsmsk_u64(__X);
 226 }
 227
 228 unsigned long long test_blsr_u64(unsigned long long __X) {
 229 // CHECK-LABEL: test_blsr_u64
 230 // CHECK: sub i64 %{{.*}}, 1
 231 // CHECK: and i64 %{{.*}}, %{{.*}}
 232   return _blsr_u64(__X);
 233 }
 234 #endif
 235
 236 #endif // !defined(TEST_TZCNT)
 237
 238 // Test constexpr handling.
 239 #if defined(__cplusplus) && (__cplusplus >= 201103L)
 240 char andnu32[__andn_u32(0x01234567, 0xFECDBA98) == (~0x01234567 & 0xFECDBA98) ? 1 : -1];
 241 char andn2u32[_andn_u32(0x01234567, 0xFECDBA98) == (~0x01234567 & 0xFECDBA98) ? 1 : -1];
 242
 243 char bextr32_0[__bextr_u32(0x00000000, 0x00000000) == 0x00000000 ? 1 : -1];
 244 char bextr32_1[__bextr_u32(0x000003F0, 0xFFFF1004) == 0x0000003F ? 1 : -1];
 245 char bextr32_2[__bextr_u32(0x000003F0, 0xFFFF3008) == 0x00000003 ? 1 : -1];
 246
 247 char bextr32_3[_bextr2_u32(0x00000000, 0x00000000) == 0x00000000 ? 1 : -1];
 248 char bextr32_4[_bextr2_u32(0x000003F0, 0xFFFF1004) == 0x0000003F ? 1 : -1];
 249 char bextr32_5[_bextr2_u32(0x000003F0, 0xFFFF3008) == 0x00000003 ? 1 : -1];
 250
 251 char bextr32_6[_bextr_u32(0x00000000, 0x00000000, 0x00000000) == 0x00000000 ? 1 : -1];
 252 char bextr32_7[_bextr_u32(0x000003F0, 0xFFFFFF04, 0xFFFFFF10) == 0x0000003F ? 1 : -1];
 253 char bextr32_8[_bextr_u32(0x000003F0, 0xFFFFFF08, 0xFFFFFF30) == 0x00000003 ? 1 : -1];
 254
 255 char blsiu32[__blsi_u32(0x89ABCDEF) == (0x89ABCDEF & -0x89ABCDEF) ? 1 : -1];
 256 char blsi2u32[_blsi_u32(0x89ABCDEF) == (0x89ABCDEF & -0x89ABCDEF) ? 1 : -1];
 257
 258 char blsmasku32[__blsmsk_u32(0x89ABCDEF) == (0x89ABCDEF ^ (0x89ABCDEF - 1)) ? 1 : -1];
 259 char blsmask2u32[_blsmsk_u32(0x89ABCDEF) == (0x89ABCDEF ^ (0x89ABCDEF - 1)) ? 1 : -1];
 260
 261 char blsru32[__blsr_u32(0x89ABCDEF) == (0x89ABCDEF & (0x89ABCDEF - 1)) ? 1 : -1];
 262 char blsr2u32[_blsr_u32(0x89ABCDEF) == (0x89ABCDEF & (0x89ABCDEF - 1)) ? 1 : -1];
 263
 264 char tzcntu16_0[__tzcnt_u16(0x0000) == 16 ? 1 : -1];
 265 char tzcntu16_1[__tzcnt_u16(0x0001) ==  0 ? 1 : -1];
 266 char tzcntu16_2[__tzcnt_u16(0x0010) ==  4 ? 1 : -1];
 267
 268 char tzcnt2u16_0[_tzcnt_u16(0x0000) == 16 ? 1 : -1];
 269 char tzcnt2u16_1[_tzcnt_u16(0x0001) ==  0 ? 1 : -1];
 270 char tzcnt2u16_2[_tzcnt_u16(0x0010) ==  4 ? 1 : -1];
 271
 272 char tzcntu32_0[__tzcnt_u32(0x00000000) == 32 ? 1 : -1];
 273 char tzcntu32_1[__tzcnt_u32(0x00000001) ==  0 ? 1 : -1];
 274 char tzcntu32_2[__tzcnt_u32(0x00000080) ==  7 ? 1 : -1];
 275
 276 char tzcnt2u32_0[_tzcnt_u32(0x00000000) == 32 ? 1 : -1];
 277 char tzcnt2u32_1[_tzcnt_u32(0x00000001) ==  0 ? 1 : -1];
 278 char tzcnt2u32_2[_tzcnt_u32(0x00000080) ==  7 ? 1 : -1];
 279
 280 char tzcnt3u32_0[_mm_tzcnt_32(0x00000000) == 32 ? 1 : -1];
 281 char tzcnt3u32_1[_mm_tzcnt_32(0x00000001) ==  0 ? 1 : -1];
 282 char tzcnt3u32_2[_mm_tzcnt_32(0x00000080) ==  7 ? 1 : -1];
 283
 284 #ifdef __x86_64__
 285 char andnu64[__andn_u64(0x0123456789ABCDEFULL, 0xFECDBA9876543210ULL) == (~0x0123456789ABCDEFULL & 0xFECDBA9876543210ULL) ? 1 : -1];
 286 char andn2u64[_andn_u64(0x0123456789ABCDEFULL, 0xFECDBA9876543210ULL) == (~0x0123456789ABCDEFULL & 0xFECDBA9876543210ULL) ? 1 : -1];
 287
 288 char bextr64_0[__bextr_u64(0x0000000000000000ULL, 0x0000000000000000ULL) == 0x0000000000000000ULL ? 1 : -1];
 289 char bextr64_1[__bextr_u64(0xF000000000000001ULL, 0x0000000000004001ULL) == 0x7800000000000000ULL ? 1 : -1];
 290 char bextr64_2[__bextr_u64(0xF000000000000001ULL, 0xFFFFFFFFFFFF1001ULL) == 0x0000000000000000ULL ? 1 : -1];
 291
 292 char bextr64_3[_bextr2_u64(0x0000000000000000ULL, 0x0000000000000000ULL) == 0x0000000000000000ULL ? 1 : -1];
 293 char bextr64_4[_bextr2_u64(0xF000000000000001ULL, 0x0000000000004001ULL) == 0x7800000000000000ULL ? 1 : -1];
 294 char bextr64_5[_bextr2_u64(0xF000000000000001ULL, 0xFFFFFFFFFFFF1001ULL) == 0x0000000000000000ULL ? 1 : -1];
 295
 296 char bextr64_6[_bextr_u64(0x0000000000000000ULL, 0x0000000000000000ULL, 0x0000000000000000ULL) == 0x0000000000000000ULL ? 1 : -1];
 297 char bextr64_7[_bextr_u64(0xF000000000000001ULL, 0x0000000000000001ULL, 0x0000000000000040ULL) == 0x7800000000000000ULL ? 1 : -1];
 298 char bextr64_8[_bextr_u64(0xF000000000000001ULL, 0xFFFFFFFFFFFFFF01ULL, 0xFFFFFFFFFFFFFF10ULL) == 0x0000000000000000ULL ? 1 : -1];
 299
 300 char blsiu64[__blsi_u64(0x0123456789ABCDEFULL) == (0x0123456789ABCDEFULL & -0x0123456789ABCDEFULL) ? 1 : -1];
 301 char blsi2u64[_blsi_u64(0x0123456789ABCDEFULL) == (0x0123456789ABCDEFULL & -0x0123456789ABCDEFULL) ? 1 : -1];
 302
 303 char blsmasku64[__blsmsk_u64(0x0123456789ABCDEFULL) == (0x0123456789ABCDEFULL ^ (0x0123456789ABCDEFULL - 1)) ? 1 : -1];
 304 char blsmask2u64[_blsmsk_u64(0x0123456789ABCDEFULL) == (0x0123456789ABCDEFULL ^ (0x0123456789ABCDEFULL - 1)) ? 1 : -1];
 305
 306 char blsru64[__blsr_u64(0x0123456789ABCDEFULL) == (0x0123456789ABCDEFULL & (0x0123456789ABCDEFULL - 1)) ? 1 : -1];
 307 char blsr2u64[_blsr_u64(0x0123456789ABCDEFULL) == (0x0123456789ABCDEFULL & (0x0123456789ABCDEFULL - 1)) ? 1 : -1];
 308
 309 char tzcntu64_0[__tzcnt_u64(0x0000000000000000ULL) == 64 ? 1 : -1];
 310 char tzcntu64_1[__tzcnt_u64(0x0000000000000001ULL) ==  0 ? 1 : -1];
 311 char tzcntu64_2[__tzcnt_u64(0x0000000800000000ULL) == 35 ? 1 : -1];
 312
 313 char tzcnt2u64_0[_tzcnt_u64(0x0000000000000000ULL) == 64 ? 1 : -1];
 314 char tzcnt2u64_1[_tzcnt_u64(0x0000000000000001ULL) ==  0 ? 1 : -1];
 315 char tzcnt2u64_2[_tzcnt_u64(0x0000000800000000ULL) == 35 ? 1 : -1];
 316
 317 char tzcnt3u64_0[_mm_tzcnt_64(0x0000000000000000ULL) == 64 ? 1 : -1];
 318 char tzcnt3u64_1[_mm_tzcnt_64(0x0000000000000001ULL) ==  0 ? 1 : -1];
 319 char tzcnt3u64_2[_mm_tzcnt_64(0x0000000800000000ULL) == 35 ? 1 : -1];
 320 #endif
 321 #endif