Revert "[llvm] Improve llvm.objectsize computation by computing GEP, alloca and mallo...
[llvm-project.git] / clang / test / CodeGen / arm-vfp16-arguments2.cpp
blobb7c6852c47b7f077eb34d5b5e0d89675cf6088ed
1 // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \
2 // RUN: -mfloat-abi soft -target-feature +neon -emit-llvm -o - -O2 %s \
3 // RUN: | FileCheck %s --check-prefix=CHECK-SOFT
4 // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \
5 // RUN: -mfloat-abi hard -target-feature +neon -emit-llvm -o - -O2 %s \
6 // RUN: | FileCheck %s --check-prefix=CHECK-HARD
7 // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs \
8 // RUN: -mfloat-abi hard -target-feature +neon -target-feature +fullfp16 \
9 // RUN: -emit-llvm -o - -O2 %s \
10 // RUN: | FileCheck %s --check-prefix=CHECK-FULL
12 typedef float float32_t;
13 typedef __fp16 float16_t;
14 typedef __attribute__((neon_vector_type(2))) float32_t float32x2_t;
15 typedef __attribute__((neon_vector_type(4))) float16_t float16x4_t;
17 struct S1 {
18 float32x2_t M1;
19 float16x4_t M2;
22 struct B1 { float32x2_t M; };
23 struct B2 { float16x4_t M; };
25 struct S2 : B1, B2 {};
27 struct S3 : B1 {
28 float16x4_t M;
31 struct S4 : B1 {
32 B2 M[1];
35 // S5 does not contain any FP16 vectors
36 struct S5 : B1 {
37 B1 M[1];
40 // CHECK-SOFT: define{{.*}} void @_Z2f12S1(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.S1) align 8 %agg.result, [2 x i64] %s1.coerce)
41 // CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f12S1([2 x <2 x i32>] returned %s1.coerce)
42 // CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S1 @_Z2f12S1(%struct.S1 returned %s1.coerce)
43 struct S1 f1(struct S1 s1) { return s1; }
45 // CHECK-SOFT: define{{.*}} void @_Z2f22S2(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.S2) align 8 %agg.result, [4 x i32] %s2.coerce)
46 // CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f22S2([2 x <2 x i32>] returned %s2.coerce)
47 // CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S2 @_Z2f22S2(%struct.S2 %s2.coerce)
48 struct S2 f2(struct S2 s2) { return s2; }
50 // CHECK-SOFT: define{{.*}} void @_Z2f32S3(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.S3) align 8 %agg.result, [2 x i64] %s3.coerce)
51 // CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f32S3([2 x <2 x i32>] returned %s3.coerce)
52 // CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S3 @_Z2f32S3(%struct.S3 %s3.coerce)
53 struct S3 f3(struct S3 s3) { return s3; }
55 // CHECK-SOFT: define{{.*}} void @_Z2f42S4(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.S4) align 8 %agg.result, [2 x i64] %s4.coerce)
56 // CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f42S4([2 x <2 x i32>] returned %s4.coerce)
57 // CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S4 @_Z2f42S4(%struct.S4 %s4.coerce)
58 struct S4 f4(struct S4 s4) { return s4; }
60 // CHECK-SOFT: define{{.*}} void @_Z2f52S5(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.S5) align 8 %agg.result, [2 x i64] %s5.coerce)
61 // CHECK-HARD: define{{.*}} arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 %s5.coerce)
62 // CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 %s5.coerce)
63 struct S5 f5(struct S5 s5) { return s5; }