1 // RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -o - -emit-llvm %s | FileCheck %s
2 // Test ARM64 SIMD duplicate lane and n intrinsics
4 // REQUIRES: aarch64-registered-target || arm-registered-target
8 void test_vdup_lane_s64(int64x1_t a1
) {
9 // CHECK-LABEL: test_vdup_lane_s64
11 // CHECK: shufflevector
14 void test_vdup_lane_u64(uint64x1_t a1
) {
15 // CHECK-LABEL: test_vdup_lane_u64
17 // CHECK: shufflevector
20 // uncomment out the following code once scalar_to_vector in the backend
21 // works (for 64 bit?). Change the "CHECK@" to "CHECK<colon>"
23 float64x1_t test_vdup_n_f64(float64_t a1) {
24 // CHECK-LABEL@ test_vdup_n_f64
25 return vdup_n_f64(a1);
26 // match that an element is inserted into part 0
27 // CHECK@ insertelement {{.*, i32 0 *$}}
31 float16x8_t
test_vdupq_n_f16(float16_t
*a1
) {
32 // CHECK-LABEL: test_vdupq_n_f16
33 return vdupq_n_f16(*a1
);
34 // match that an element is inserted into parts 0-7. The backend better
35 // turn that into a single dup instruction
36 // CHECK: insertelement {{.*, i32 0 *$}}
37 // CHECK: insertelement {{.*, i32 1 *$}}
38 // CHECK: insertelement {{.*, i32 2 *$}}
39 // CHECK: insertelement {{.*, i32 3 *$}}
40 // CHECK: insertelement {{.*, i32 4 *$}}
41 // CHECK: insertelement {{.*, i32 5 *$}}
42 // CHECK: insertelement {{.*, i32 6 *$}}
43 // CHECK: insertelement {{.*, i32 7 *$}}