clang/test/CodeGen/asm-attrs.c

   1 // RUN: %clang_cc1 -triple armv7-apple-darwin -emit-llvm %s -o - | FileCheck %s
   2
   3 // CHECK: call i32 asm "foo0", {{.*}} [[READNONE:#[0-9]+]]
   4 // CHECK: call i32 asm "foo1", {{.*}} [[READNONE]]
   5 // CHECK: call i32 asm "foo2", {{.*}} [[NOATTRS:#[0-9]+]]
   6 // CHECK: call i32 asm sideeffect "foo3", {{.*}} [[NOATTRS]]
   7 // CHECK: call i32 asm "foo4", {{.*}} [[READONLY:#[0-9]+]]
   8 // CHECK: call i32 asm "foo5", {{.*}} [[READONLY]]
   9 // CHECK: call i32 asm "foo6", {{.*}} [[NOATTRS]]
  10 // CHECK: call void asm sideeffect "foo7", {{.*}} [[NOATTRS]]
  11 // CHECK: call i32 asm "foo8", {{.*}} [[READNONE]]
  12
  13 // CHECK: attributes [[READNONE]] = { nounwind memory(none) }
  14 // CHECK: attributes [[NOATTRS]] = { nounwind }
  15 // CHECK: attributes [[READONLY]] = { nounwind memory(read) }
  16
  17 int g0, g1;
  18
  19 struct S {
  20   int i;
  21 } g2;
  22
  23 void test_attrs(int a) {
  24   __asm__ ("foo0" : "=r"(g1) : "r"(a));
  25   __asm__ ("foo1" : "=r"(g1) : "r"(a) : "cc");
  26   __asm__ ("foo2" : "=r"(g1) : "r"(a) : "memory");
  27   __asm__ volatile("foo3" : "=r"(g1) : "r"(a));
  28   __asm__ ("foo4" : "=r"(g1) : "r"(a), "m"(g0));
  29   __asm__ ("foo5" : "=r"(g1) : "r"(a), "Q"(g0));
  30   __asm__ ("foo6" : "=r"(g1), "=m"(g0) : "r"(a));
  31   __asm__ ("foo7" : : "r"(a));
  32   __asm__ ("foo8" : "=r"(g2) : "r"(a));
  33 }