clang/test/CodeGen/asm-goto2.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: x86-registered-target
   3 // RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -O0 -emit-llvm %s -o - | FileCheck %s
   4
   5 // CHECK-LABEL: @test0(
   6 // CHECK-NEXT:  entry:
   7 // CHECK-NEXT:    [[RET:%.*]] = alloca i32, align 4
   8 // CHECK-NEXT:    [[TMP0:%.*]] = callbr i32 asm "", "=r,!i,~{dirflag},~{fpsr},~{flags}"() #[[ATTR1:[0-9]+]]
   9 // CHECK-NEXT:    to label [[ASM_FALLTHROUGH:%.*]] [label %z.split], !srcloc !2
  10 // CHECK:       asm.fallthrough:
  11 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[RET]], align 4
  12 // CHECK-NEXT:    store i32 42, ptr [[RET]], align 4
  13 // CHECK-NEXT:    br label [[Z:%.*]]
  14 // CHECK:       z:
  15 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RET]], align 4
  16 // CHECK-NEXT:    ret i32 [[TMP1]]
  17 // CHECK:       z.split:
  18 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[RET]], align 4
  19 // CHECK-NEXT:    br label [[Z]]
  20 //
  21 int test0 (void) {
  22   int ret;
  23   asm goto ("" : "=r"(ret):::z);
  24   ret = 42;
  25 z:
  26   return ret;
  27 }
  28
  29 // CHECK-LABEL: @test1(
  30 // CHECK-NEXT:  entry:
  31 // CHECK-NEXT:    [[RET:%.*]] = alloca i32, align 4
  32 // CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
  33 // CHECK-NEXT:    [[TMP0:%.*]] = callbr { i32, i32 } asm "", "=r,=r,!i,~{dirflag},~{fpsr},~{flags}"() #[[ATTR1]]
  34 // CHECK-NEXT:    to label [[ASM_FALLTHROUGH:%.*]] [label %z.split], !srcloc !3
  35 // CHECK:       asm.fallthrough:
  36 // CHECK-NEXT:    [[ASMRESULT:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0
  37 // CHECK-NEXT:    [[ASMRESULT1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
  38 // CHECK-NEXT:    store i32 [[ASMRESULT]], ptr [[RET]], align 4
  39 // CHECK-NEXT:    store i32 [[ASMRESULT1]], ptr [[B]], align 4
  40 // CHECK-NEXT:    store i32 42, ptr [[RET]], align 4
  41 // CHECK-NEXT:    br label [[Z:%.*]]
  42 // CHECK:       z:
  43 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RET]], align 4
  44 // CHECK-NEXT:    ret i32 [[TMP1]]
  45 // CHECK:       z.split:
  46 // CHECK-NEXT:    [[ASMRESULT2:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0
  47 // CHECK-NEXT:    [[ASMRESULT3:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
  48 // CHECK-NEXT:    store i32 [[ASMRESULT2]], ptr [[RET]], align 4
  49 // CHECK-NEXT:    store i32 [[ASMRESULT3]], ptr [[B]], align 4
  50 // CHECK-NEXT:    br label [[Z]]
  51 //
  52 int test1 (void) {
  53   int ret, b;
  54   asm goto ("" : "=r"(ret), "=r"(b):::z);
  55   ret = 42;
  56 z:
  57   return ret;
  58 }
  59
  60 // CHECK-LABEL: @test2(
  61 // CHECK-NEXT:  entry:
  62 // CHECK-NEXT:    [[RET:%.*]] = alloca i32, align 4
  63 // CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
  64 // CHECK-NEXT:    [[TMP0:%.*]] = callbr { i32, i32 } asm "", "=r,=r,!i,~{dirflag},~{fpsr},~{flags}"() #[[ATTR1]]
  65 // CHECK-NEXT:    to label [[ASM_FALLTHROUGH:%.*]] [label %z.split], !srcloc !4
  66 // CHECK:       asm.fallthrough:
  67 // CHECK-NEXT:    [[ASMRESULT:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0
  68 // CHECK-NEXT:    [[ASMRESULT1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
  69 // CHECK-NEXT:    store i32 [[ASMRESULT]], ptr [[RET]], align 4
  70 // CHECK-NEXT:    store i32 [[ASMRESULT1]], ptr [[B]], align 4
  71 // CHECK-NEXT:    [[TMP1:%.*]] = callbr { i32, i32 } asm "", "=r,=r,!i,~{dirflag},~{fpsr},~{flags}"() #[[ATTR1]]
  72 // CHECK-NEXT:    to label [[ASM_FALLTHROUGH4:%.*]] [label %z.split9], !srcloc !5
  73 // CHECK:       asm.fallthrough4:
  74 // CHECK-NEXT:    [[ASMRESULT5:%.*]] = extractvalue { i32, i32 } [[TMP1]], 0
  75 // CHECK-NEXT:    [[ASMRESULT6:%.*]] = extractvalue { i32, i32 } [[TMP1]], 1
  76 // CHECK-NEXT:    store i32 [[ASMRESULT5]], ptr [[RET]], align 4
  77 // CHECK-NEXT:    store i32 [[ASMRESULT6]], ptr [[B]], align 4
  78 // CHECK-NEXT:    br label [[Z:%.*]]
  79 // CHECK:       z:
  80 // CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[RET]], align 4
  81 // CHECK-NEXT:    ret i32 [[TMP2]]
  82 // CHECK:       z.split:
  83 // CHECK-NEXT:    [[ASMRESULT2:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0
  84 // CHECK-NEXT:    [[ASMRESULT3:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
  85 // CHECK-NEXT:    store i32 [[ASMRESULT2]], ptr [[RET]], align 4
  86 // CHECK-NEXT:    store i32 [[ASMRESULT3]], ptr [[B]], align 4
  87 // CHECK-NEXT:    br label [[Z]]
  88 // CHECK:       z.split9:
  89 // CHECK-NEXT:    [[ASMRESULT7:%.*]] = extractvalue { i32, i32 } [[TMP1]], 0
  90 // CHECK-NEXT:    [[ASMRESULT8:%.*]] = extractvalue { i32, i32 } [[TMP1]], 1
  91 // CHECK-NEXT:    store i32 [[ASMRESULT7]], ptr [[RET]], align 4
  92 // CHECK-NEXT:    store i32 [[ASMRESULT8]], ptr [[B]], align 4
  93 // CHECK-NEXT:    br label [[Z]]
  94 //
  95 int test2 (void) {
  96   int ret, b;
  97   asm goto ("" : "=r"(ret), "=r"(b):::z);
  98   asm goto ("" : "=r"(ret), "=r"(b):::z);
  99 z:
 100   return ret;
 101 }
 102 // CHECK-LABEL: @test3(
 103 // CHECK-NEXT:  entry:
 104 // CHECK-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 105 // CHECK-NEXT:    [[OUT1_ADDR:%.*]] = alloca i32, align 4
 106 // CHECK-NEXT:    store i32 [[OUT1:%.*]], ptr [[OUT1_ADDR]], align 4
 107 // CHECK-NEXT:    [[TMP0:%.*]] = callbr i32 asm "", "=r,!i,!i,~{dirflag},~{fpsr},~{flags}"() #[[ATTR1]]
 108 // CHECK-NEXT:    to label [[ASM_FALLTHROUGH:%.*]] [label [[LABEL_TRUE_SPLIT:%.*]], label %loop.split], !srcloc !6
 109 // CHECK:       asm.fallthrough:
 110 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[OUT1_ADDR]], align 4
 111 // CHECK-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 112 // CHECK-NEXT:    br label [[RETURN:%.*]]
 113 // CHECK:       label_true.split:
 114 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[OUT1_ADDR]], align 4
 115 // CHECK-NEXT:    br label [[LABEL_TRUE:%.*]]
 116 // CHECK:       loop.split:
 117 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[OUT1_ADDR]], align 4
 118 // CHECK-NEXT:    br label [[LOOP:%.*]]
 119 // CHECK:       loop:
 120 // CHECK-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 121 // CHECK-NEXT:    br label [[RETURN]]
 122 // CHECK:       label_true:
 123 // CHECK-NEXT:    store i32 1, ptr [[RETVAL]], align 4
 124 // CHECK-NEXT:    br label [[RETURN]]
 125 // CHECK:       return:
 126 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 4
 127 // CHECK-NEXT:    ret i32 [[TMP1]]
 128 //
 129 int test3 (int out1) {
 130   asm goto("" : "=r"(out1)::: label_true, loop);
 131   return 0;
 132 loop:
 133   return 0;
 134 label_true:
 135   return 1;
 136 }
 137
 138 // CHECK-LABEL: @test4(
 139 // CHECK-NEXT:  entry:
 140 // CHECK-NEXT:    [[X:%.*]] = alloca i32, align 4
 141 // CHECK-NEXT:    br label [[FOO:%.*]]
 142 // CHECK:       foo:
 143 // CHECK-NEXT:    [[TMP0:%.*]] = callbr i32 asm "", "=r,!i,~{dirflag},~{fpsr},~{flags}"() #[[ATTR1]]
 144 // CHECK-NEXT:    to label [[ASM_FALLTHROUGH:%.*]] [label %foo.split], !srcloc !7
 145 // CHECK:       asm.fallthrough:
 146 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[X]], align 4
 147 // CHECK-NEXT:    ret void
 148 // CHECK:       foo.split:
 149 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[X]], align 4
 150 // CHECK-NEXT:    br label [[FOO]]
 151 //
 152 void test4 (void) {
 153   int x;
 154 foo:
 155   asm goto ("" : "=r"(x):::foo);
 156 }