clang/test/CodeGen/c11atomics.c

   1 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv5-unknown-freebsd -std=c11 | FileCheck %s
   2
   3 // Test that we are generating atomicrmw instructions, rather than
   4 // compare-exchange loops for common atomic ops.  This makes a big difference
   5 // on RISC platforms, where the compare-exchange loop becomes a ll/sc pair for
   6 // the load and then another ll/sc in the loop, expanding to about 30
   7 // instructions when it should be only 4.  It has a smaller, but still
   8 // noticeable, impact on platforms like x86 and RISC-V, where there are atomic
   9 // RMW instructions.
  10 //
  11 // We currently emit cmpxchg loops for most operations on _Bools, because
  12 // they're sufficiently rare that it's not worth making sure that the semantics
  13 // are correct.
  14
  15 struct elem;
  16
  17 struct ptr {
  18     struct elem *ptr;
  19 };
  20 // CHECK-DAG: %struct.ptr = type { ptr }
  21
  22 struct elem {
  23     _Atomic(struct ptr) link;
  24 };
  25
  26 struct ptr object;
  27 // CHECK-DAG: @object ={{.*}} global %struct.ptr zeroinitializer
  28
  29 // CHECK-DAG: @testStructGlobal ={{.*}} global {{.*}} { i16 1, i16 2, i16 3, i16 4 }
  30 // CHECK-DAG: @testPromotedStructGlobal ={{.*}} global {{.*}} { %{{.*}} { i16 1, i16 2, i16 3 }, [2 x i8] zeroinitializer }
  31
  32
  33 typedef int __attribute__((vector_size(16))) vector;
  34
  35 _Atomic(_Bool) b;
  36 _Atomic(int) i;
  37 _Atomic(long long) l;
  38 _Atomic(short) s;
  39 _Atomic(char*) p;
  40 _Atomic(float) f;
  41 _Atomic(vector) v;
  42
  43 // CHECK: testinc
  44 void testinc(void)
  45 {
  46   // Special case for suffix bool++, sets to true and returns the old value.
  47   // CHECK: atomicrmw xchg ptr @b, i8 1 seq_cst, align 1
  48   b++;
  49   // CHECK: atomicrmw add ptr @i, i32 1 seq_cst, align 4
  50   i++;
  51   // CHECK: atomicrmw add ptr @l, i64 1 seq_cst, align 8
  52   l++;
  53   // CHECK: atomicrmw add ptr @s, i16 1 seq_cst, align 2
  54   s++;
  55   // Prefix increment
  56   // Special case for bool: set to true and return true
  57   // CHECK: store atomic i8 1, ptr @b seq_cst, align 1
  58   ++b;
  59   // Currently, we have no variant of atomicrmw that returns the new value, so
  60   // we have to generate an atomic add, which returns the old value, and then a
  61   // non-atomic add.
  62   // CHECK: atomicrmw add ptr @i, i32 1 seq_cst, align 4
  63   // CHECK: add i32
  64   ++i;
  65   // CHECK: atomicrmw add ptr @l, i64 1 seq_cst, align 8
  66   // CHECK: add i64
  67   ++l;
  68   // CHECK: atomicrmw add ptr @s, i16 1 seq_cst, align 2
  69   // CHECK: add i16
  70   ++s;
  71 }
  72 // CHECK: testdec
  73 void testdec(void)
  74 {
  75   // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 noundef 1, ptr noundef @b
  76   b--;
  77   // CHECK: atomicrmw sub ptr @i, i32 1 seq_cst, align 4
  78   i--;
  79   // CHECK: atomicrmw sub ptr @l, i64 1 seq_cst, align 8
  80   l--;
  81   // CHECK: atomicrmw sub ptr @s, i16 1 seq_cst, align 2
  82   s--;
  83   // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 noundef 1, ptr noundef @b
  84   --b;
  85   // CHECK: atomicrmw sub ptr @i, i32 1 seq_cst, align 4
  86   // CHECK: sub i32
  87   --i;
  88   // CHECK: atomicrmw sub ptr @l, i64 1 seq_cst, align 8
  89   // CHECK: sub i64
  90   --l;
  91   // CHECK: atomicrmw sub ptr @s, i16 1 seq_cst, align 2
  92   // CHECK: sub i16
  93   --s;
  94 }
  95 // CHECK: testaddeq
  96 void testaddeq(void)
  97 {
  98   // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 noundef 1, ptr noundef @b
  99   // CHECK: atomicrmw add ptr @i, i32 42 seq_cst, align 4
 100   // CHECK: atomicrmw add ptr @l, i64 42 seq_cst, align 8
 101   // CHECK: atomicrmw add ptr @s, i16 42 seq_cst, align 2
 102   b += 42;
 103   i += 42;
 104   l += 42;
 105   s += 42;
 106 }
 107 // CHECK: testsubeq
 108 void testsubeq(void)
 109 {
 110   // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 noundef 1, ptr noundef @b
 111   // CHECK: atomicrmw sub ptr @i, i32 42 seq_cst, align 4
 112   // CHECK: atomicrmw sub ptr @l, i64 42 seq_cst, align 8
 113   // CHECK: atomicrmw sub ptr @s, i16 42 seq_cst, align 2
 114   b -= 42;
 115   i -= 42;
 116   l -= 42;
 117   s -= 42;
 118 }
 119 // CHECK: testxoreq
 120 void testxoreq(void)
 121 {
 122   // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 noundef 1, ptr noundef @b
 123   // CHECK: atomicrmw xor ptr @i, i32 42 seq_cst, align 4
 124   // CHECK: atomicrmw xor ptr @l, i64 42 seq_cst, align 8
 125   // CHECK: atomicrmw xor ptr @s, i16 42 seq_cst, align 2
 126   b ^= 42;
 127   i ^= 42;
 128   l ^= 42;
 129   s ^= 42;
 130 }
 131 // CHECK: testoreq
 132 void testoreq(void)
 133 {
 134   // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 noundef 1, ptr noundef @b
 135   // CHECK: atomicrmw or ptr @i, i32 42 seq_cst, align 4
 136   // CHECK: atomicrmw or ptr @l, i64 42 seq_cst, align 8
 137   // CHECK: atomicrmw or ptr @s, i16 42 seq_cst, align 2
 138   b |= 42;
 139   i |= 42;
 140   l |= 42;
 141   s |= 42;
 142 }
 143 // CHECK: testandeq
 144 void testandeq(void)
 145 {
 146   // CHECK: call arm_aapcscc zeroext i1 @__atomic_compare_exchange(i32 noundef 1, ptr noundef @b
 147   // CHECK: atomicrmw and ptr @i, i32 42 seq_cst, align 4
 148   // CHECK: atomicrmw and ptr @l, i64 42 seq_cst, align 8
 149   // CHECK: atomicrmw and ptr @s, i16 42 seq_cst, align 2
 150   b &= 42;
 151   i &= 42;
 152   l &= 42;
 153   s &= 42;
 154 }
 155
 156 // CHECK-LABEL: define{{.*}} arm_aapcscc void @testFloat(ptr
 157 void testFloat(_Atomic(float) *fp) {
 158 // CHECK:      [[FP:%.*]] = alloca ptr
 159 // CHECK-NEXT: [[X:%.*]] = alloca float
 160 // CHECK-NEXT: [[F:%.*]] = alloca float
 161 // CHECK-NEXT: [[TMP0:%.*]] = alloca float
 162 // CHECK-NEXT: [[TMP1:%.*]] = alloca float
 163 // CHECK-NEXT: store ptr {{%.*}}, ptr [[FP]]
 164
 165 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]]
 166 // CHECK-NEXT: store float 1.000000e+00, ptr [[T0]], align 4
 167   __c11_atomic_init(fp, 1.0f);
 168
 169 // CHECK-NEXT: store float 2.000000e+00, ptr [[X]], align 4
 170   _Atomic(float) x = 2.0f;
 171
 172 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]]
 173 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 noundef 4, ptr noundef [[T0]], ptr noundef [[TMP0]], i32 noundef 5)
 174 // CHECK-NEXT: [[T3:%.*]] = load float, ptr [[TMP0]], align 4
 175 // CHECK-NEXT: store float [[T3]], ptr [[F]]
 176   float f = *fp;
 177
 178 // CHECK-NEXT: [[T0:%.*]] = load float, ptr [[F]], align 4
 179 // CHECK-NEXT: [[T1:%.*]] = load ptr, ptr [[FP]], align 4
 180 // CHECK-NEXT: store float [[T0]], ptr [[TMP1]], align 4
 181 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 noundef 4, ptr noundef [[T1]], ptr noundef [[TMP1]], i32 noundef 5)
 182   *fp = f;
 183
 184 // CHECK-NEXT: ret void
 185 }
 186
 187 // CHECK: define{{.*}} arm_aapcscc void @testComplexFloat(ptr
 188 void testComplexFloat(_Atomic(_Complex float) *fp) {
 189 // CHECK:      [[FP:%.*]] = alloca ptr, align 4
 190 // CHECK-NEXT: [[X:%.*]] = alloca [[CF:{ float, float }]], align 8
 191 // CHECK-NEXT: [[F:%.*]] = alloca [[CF]], align 4
 192 // CHECK-NEXT: [[TMP0:%.*]] = alloca [[CF]], align 8
 193 // CHECK-NEXT: [[TMP1:%.*]] = alloca [[CF]], align 8
 194 // CHECK-NEXT: store ptr
 195
 196 // CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[FP]]
 197 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[P]], i32 0, i32 0
 198 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[P]], i32 0, i32 1
 199 // CHECK-NEXT: store float 1.000000e+00, ptr [[T0]]
 200 // CHECK-NEXT: store float 0.000000e+00, ptr [[T1]]
 201   __c11_atomic_init(fp, 1.0f);
 202
 203 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[X]], i32 0, i32 0
 204 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[X]], i32 0, i32 1
 205 // CHECK-NEXT: store float 2.000000e+00, ptr [[T0]]
 206 // CHECK-NEXT: store float 0.000000e+00, ptr [[T1]]
 207   _Atomic(_Complex float) x = 2.0f;
 208
 209 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]]
 210 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 noundef 8, ptr noundef [[T0]], ptr noundef [[TMP0]], i32 noundef 5)
 211 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[TMP0]], i32 0, i32 0
 212 // CHECK-NEXT: [[R:%.*]] = load float, ptr [[T0]]
 213 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[TMP0]], i32 0, i32 1
 214 // CHECK-NEXT: [[I:%.*]] = load float, ptr [[T0]]
 215 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[F]], i32 0, i32 0
 216 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[F]], i32 0, i32 1
 217 // CHECK-NEXT: store float [[R]], ptr [[T0]]
 218 // CHECK-NEXT: store float [[I]], ptr [[T1]]
 219   _Complex float f = *fp;
 220
 221 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[F]], i32 0, i32 0
 222 // CHECK-NEXT: [[R:%.*]] = load float, ptr [[T0]]
 223 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[F]], i32 0, i32 1
 224 // CHECK-NEXT: [[I:%.*]] = load float, ptr [[T0]]
 225 // CHECK-NEXT: [[DEST:%.*]] = load ptr, ptr [[FP]], align 4
 226 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[TMP1]], i32 0, i32 0
 227 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[CF]], ptr [[TMP1]], i32 0, i32 1
 228 // CHECK-NEXT: store float [[R]], ptr [[T0]]
 229 // CHECK-NEXT: store float [[I]], ptr [[T1]]
 230 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 noundef 8, ptr noundef [[DEST]], ptr noundef [[TMP1]], i32 noundef 5)
 231   *fp = f;
 232
 233 // CHECK-NEXT: ret void
 234 }
 235
 236 typedef struct { short x, y, z, w; } S;
 237 _Atomic S testStructGlobal = (S){1, 2, 3, 4};
 238 // CHECK: define{{.*}} arm_aapcscc void @testStruct(ptr
 239 void testStruct(_Atomic(S) *fp) {
 240 // CHECK:      [[FP:%.*]] = alloca ptr, align 4
 241 // CHECK-NEXT: [[X:%.*]] = alloca [[S:.*]], align 8
 242 // CHECK-NEXT: [[F:%.*]] = alloca [[S:%.*]], align 2
 243 // CHECK-NEXT: [[TMP0:%.*]] = alloca [[S]], align 8
 244 // CHECK-NEXT: store ptr
 245
 246 // CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[FP]]
 247 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[P]], i32 0, i32 0
 248 // CHECK-NEXT: store i16 1, ptr [[T0]], align 8
 249 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[P]], i32 0, i32 1
 250 // CHECK-NEXT: store i16 2, ptr [[T0]], align 2
 251 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[P]], i32 0, i32 2
 252 // CHECK-NEXT: store i16 3, ptr [[T0]], align 4
 253 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[P]], i32 0, i32 3
 254 // CHECK-NEXT: store i16 4, ptr [[T0]], align 2
 255   __c11_atomic_init(fp, (S){1,2,3,4});
 256
 257 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[X]], i32 0, i32 0
 258 // CHECK-NEXT: store i16 1, ptr [[T0]], align 8
 259 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[X]], i32 0, i32 1
 260 // CHECK-NEXT: store i16 2, ptr [[T0]], align 2
 261 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[X]], i32 0, i32 2
 262 // CHECK-NEXT: store i16 3, ptr [[T0]], align 4
 263 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[S]], ptr [[X]], i32 0, i32 3
 264 // CHECK-NEXT: store i16 4, ptr [[T0]], align 2
 265   _Atomic(S) x = (S){1,2,3,4};
 266
 267 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]]
 268 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 noundef 8, ptr noundef [[T0]], ptr noundef [[F]], i32 noundef 5)
 269   S f = *fp;
 270
 271 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]]
 272 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 8 [[TMP0]], ptr align 2 [[F]], i32 8, i1 false)
 273 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 noundef 8, ptr noundef [[T0]], ptr noundef [[TMP0]], i32 noundef 5)
 274   *fp = f;
 275
 276 // CHECK-NEXT: ret void
 277 }
 278
 279 typedef struct { short x, y, z; } PS;
 280 _Atomic PS testPromotedStructGlobal = (PS){1, 2, 3};
 281 // CHECK: define{{.*}} arm_aapcscc void @testPromotedStruct(ptr
 282 void testPromotedStruct(_Atomic(PS) *fp) {
 283 // CHECK:      [[FP:%.*]] = alloca ptr, align 4
 284 // CHECK-NEXT: [[X:%.*]] = alloca [[APS:.*]], align 8
 285 // CHECK-NEXT: [[F:%.*]] = alloca [[PS:%.*]], align 2
 286 // CHECK-NEXT: [[TMP0:%.*]] = alloca [[APS]], align 8
 287 // CHECK-NEXT: [[TMP1:%.*]] = alloca [[APS]], align 8
 288 // CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
 289 // CHECK-NEXT: [[TMP2:%.*]] = alloca %struct.PS, align 2
 290 // CHECK-NEXT: [[TMP3:%.*]] = alloca [[APS]], align 8
 291 // CHECK-NEXT: store ptr
 292
 293 // CHECK-NEXT: [[P:%.*]] = load ptr, ptr [[FP]]
 294 // CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[P]], i8 0, i64 8, i1 false)
 295 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[APS]], ptr [[P]], i32 0, i32 0
 296 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[PS]], ptr [[T0]], i32 0, i32 0
 297 // CHECK-NEXT: store i16 1, ptr [[T1]], align 8
 298 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[PS]], ptr [[T0]], i32 0, i32 1
 299 // CHECK-NEXT: store i16 2, ptr [[T1]], align 2
 300 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[PS]], ptr [[T0]], i32 0, i32 2
 301 // CHECK-NEXT: store i16 3, ptr [[T1]], align 4
 302   __c11_atomic_init(fp, (PS){1,2,3});
 303
 304 // CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 8 [[X]], i8 0, i32 8, i1 false)
 305 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[APS]], ptr [[X]], i32 0, i32 0
 306 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[PS]], ptr [[T0]], i32 0, i32 0
 307 // CHECK-NEXT: store i16 1, ptr [[T1]], align 8
 308 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[PS]], ptr [[T0]], i32 0, i32 1
 309 // CHECK-NEXT: store i16 2, ptr [[T1]], align 2
 310 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[PS]], ptr [[T0]], i32 0, i32 2
 311 // CHECK-NEXT: store i16 3, ptr [[T1]], align 4
 312   _Atomic(PS) x = (PS){1,2,3};
 313
 314 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]]
 315 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 noundef 8, ptr noundef [[T0]], ptr noundef [[TMP0]], i32 noundef 5)
 316 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[APS]], ptr [[TMP0]], i32 0, i32 0
 317 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 2 [[F]], ptr align 8 [[T0]], i32 6, i1 false)
 318   PS f = *fp;
 319
 320 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]]
 321 // CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 8 [[TMP1]], i8 0, i32 8, i1 false)
 322 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds nuw [[APS]], ptr [[TMP1]], i32 0, i32 0
 323 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 8 [[T1]], ptr align 2 [[F]], i32 6, i1 false)
 324 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 noundef 8, ptr noundef [[T0]], ptr noundef [[TMP1]], i32 noundef 5)
 325   *fp = f;
 326
 327 // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[FP]], align 4
 328 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 noundef 8, ptr noundef [[T0]], ptr noundef [[TMP3]], i32 noundef 5)
 329 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw [[APS]], ptr [[TMP3]], i32 0, i32 0
 330 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 2 [[TMP2]], ptr align 8 [[T0]], i32 6, i1 false)
 331 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds nuw %struct.PS, ptr [[TMP2]], i32 0, i32 0
 332 // CHECK-NEXT: [[T1:%.*]] = load i16, ptr [[T0]], align 2
 333 // CHECK-NEXT: [[T2:%.*]] = sext i16 [[T1]] to i32
 334 // CHECK-NEXT: store i32 [[T2]], ptr [[A]], align 4
 335   int a = ((PS)*fp).x;
 336
 337 // CHECK-NEXT: ret void
 338 }
 339
 340 PS test_promoted_load(_Atomic(PS) *addr) {
 341   // CHECK-LABEL: @test_promoted_load(ptr dead_on_unwind noalias writable sret(%struct.PS) align 2 %agg.result, ptr noundef %addr)
 342   // CHECK:   [[ADDR_ARG:%.*]] = alloca ptr, align 4
 343   // CHECK:   [[ATOMIC_RES:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8
 344   // CHECK:   store ptr %addr, ptr [[ADDR_ARG]], align 4
 345   // CHECK:   [[ADDR:%.*]] = load ptr, ptr [[ADDR_ARG]], align 4
 346   // CHECK:   [[ATOMIC_RES:%.*]] = load atomic i64, ptr [[ADDR]] seq_cst, align 8
 347   // CHECK:   store i64 [[ATOMIC_RES]], ptr [[ATOMIC_RES_ADDR:%.*]], align 8
 348   // CHECK:   call void @llvm.memcpy.p0.p0.i32(ptr align 2 %agg.result, ptr align 8 [[ATOMIC_RES_ADDR]], i32 6, i1 false)
 349   return __c11_atomic_load(addr, 5);
 350 }
 351
 352 void test_promoted_store(_Atomic(PS) *addr, PS *val) {
 353   // CHECK-LABEL: @test_promoted_store(ptr noundef %addr, ptr noundef %val)
 354   // CHECK:   [[ADDR_ARG:%.*]] = alloca ptr, align 4
 355   // CHECK:   [[VAL_ARG:%.*]] = alloca ptr, align 4
 356   // CHECK:   [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2
 357   // CHECK:   [[ATOMIC_VAL:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8
 358   // CHECK:   store ptr %addr, ptr [[ADDR_ARG]], align 4
 359   // CHECK:   store ptr %val, ptr [[VAL_ARG]], align 4
 360   // CHECK:   [[ADDR:%.*]] = load ptr, ptr [[ADDR_ARG]], align 4
 361   // CHECK:   [[VAL:%.*]] = load ptr, ptr [[VAL_ARG]], align 4
 362   // CHECK:   call void @llvm.memcpy.p0.p0.i32(ptr align 2 [[NONATOMIC_TMP]], ptr align 2 [[VAL]], i32 6, i1 false)
 363   // CHECK:   call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[ATOMIC_VAL]], ptr align 2 [[NONATOMIC_TMP]], i64 6, i1 false)
 364   // CHECK:   [[ATOMIC:%.*]] = load i64, ptr [[ATOMIC_VAL]], align 8
 365   // CHECK:   store atomic i64 [[ATOMIC]], ptr [[ADDR]] seq_cst, align 8
 366   __c11_atomic_store(addr, *val, 5);
 367 }
 368
 369 PS test_promoted_exchange(_Atomic(PS) *addr, PS *val) {
 370   // CHECK-LABEL: @test_promoted_exchange(ptr dead_on_unwind noalias writable sret(%struct.PS) align 2 %agg.result, ptr noundef %addr, ptr noundef %val)
 371   // CHECK:   [[ADDR_ARG:%.*]] = alloca ptr, align 4
 372   // CHECK:   [[VAL_ARG:%.*]] = alloca ptr, align 4
 373   // CHECK:   [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2
 374   // CHECK:   [[ATOMIC_VAL:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8
 375   // CHECK:   [[ATOMIC_RES:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8
 376   // CHECK:   store ptr %addr, ptr [[ADDR_ARG]], align 4
 377   // CHECK:   store ptr %val, ptr [[VAL_ARG]], align 4
 378   // CHECK:   [[ADDR:%.*]] = load ptr, ptr [[ADDR_ARG]], align 4
 379   // CHECK:   [[VAL:%.*]] = load ptr, ptr [[VAL_ARG]], align 4
 380   // CHECK:   call void @llvm.memcpy.p0.p0.i32(ptr align 2 [[NONATOMIC_TMP]], ptr align 2 [[VAL]], i32 6, i1 false)
 381   // CHECK:   call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[ATOMIC_VAL]], ptr align 2 [[NONATOMIC_TMP]], i64 6, i1 false)
 382   // CHECK:   [[ATOMIC:%.*]] = load i64, ptr [[ATOMIC_VAL]], align 8
 383   // CHECK:   [[ATOMIC_RES:%.*]] = atomicrmw xchg ptr [[ADDR]], i64 [[ATOMIC]] seq_cst, align 8
 384   // CHECK:   store i64 [[ATOMIC_RES]], ptr [[ATOMIC_RES_PTR:%.*]], align 8
 385   // CHECK:   call void @llvm.memcpy.p0.p0.i32(ptr align 2 %agg.result, ptr align 8 [[ATOMIC_RES_PTR]], i32 6, i1 false)
 386   return __c11_atomic_exchange(addr, *val, 5);
 387 }
 388
 389 _Bool test_promoted_cmpxchg(_Atomic(PS) *addr, PS *desired, PS *new) {
 390   // CHECK-LABEL: i1 @test_promoted_cmpxchg(ptr noundef %addr, ptr noundef %desired, ptr noundef %new) #0 {
 391   // CHECK:   [[ADDR_ARG:%.*]] = alloca ptr, align 4
 392   // CHECK:   [[DESIRED_ARG:%.*]] = alloca ptr, align 4
 393   // CHECK:   [[NEW_ARG:%.*]] = alloca ptr, align 4
 394   // CHECK:   [[NONATOMIC_TMP:%.*]] = alloca %struct.PS, align 2
 395   // CHECK:   [[ATOMIC_DESIRED:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8
 396   // CHECK:   [[ATOMIC_NEW:%.*]] = alloca { %struct.PS, [2 x i8] }, align 8
 397   // CHECK:   store ptr %addr, ptr [[ADDR_ARG]], align 4
 398   // CHECK:   store ptr %desired, ptr [[DESIRED_ARG]], align 4
 399   // CHECK:   store ptr %new, ptr [[NEW_ARG]], align 4
 400   // CHECK:   [[ADDR:%.*]] = load ptr, ptr [[ADDR_ARG]], align 4
 401   // CHECK:   [[DESIRED:%.*]] = load ptr, ptr [[DESIRED_ARG]], align 4
 402   // CHECK:   [[NEW:%.*]] = load ptr, ptr [[NEW_ARG]], align 4
 403   // CHECK:   call void @llvm.memcpy.p0.p0.i32(ptr align 2 [[NONATOMIC_TMP]], ptr align 2 [[NEW]], i32 6, i1 false)
 404   // CHECK:   call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[ATOMIC_DESIRED]], ptr align 2 [[DESIRED]], i64 6, i1 false)
 405   // CHECK:   call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[ATOMIC_NEW]], ptr align 2 [[NONATOMIC_TMP]], i64 6, i1 false)
 406   // CHECK:   [[VAL1:%.*]] = load i64, ptr [[ATOMIC_DESIRED]], align 8
 407   // CHECK:   [[VAL2:%.*]] = load i64, ptr [[ATOMIC_NEW]], align 8
 408   // CHECK:   [[RES_PAIR:%.*]] = cmpxchg ptr [[ADDR]], i64 [[VAL1]], i64 [[VAL2]] seq_cst seq_cst, align 8
 409   // CHECK:   [[RES:%.*]] = extractvalue { i64, i1 } [[RES_PAIR]], 1
 410   return __c11_atomic_compare_exchange_strong(addr, desired, *new, 5, 5);
 411 }
 412
 413 struct Empty {};
 414
 415 struct Empty test_empty_struct_load(_Atomic(struct Empty)* empty) {
 416   // CHECK-LABEL: @test_empty_struct_load(
 417   // CHECK: load atomic i8, ptr {{.*}}, align 1
 418   return __c11_atomic_load(empty, 5);
 419 }
 420
 421 void test_empty_struct_store(_Atomic(struct Empty)* empty, struct Empty value) {
 422   // CHECK-LABEL: @test_empty_struct_store(
 423   // CHECK: store atomic i8 {{.*}}, ptr {{.*}}, align 1
 424   __c11_atomic_store(empty, value, 5);
 425 }