clang/test/CodeGen/memcpy-inline-builtin.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2
   3 // RUN: %clang_cc1 -triple x86_64 -emit-llvm -o - %s | FileCheck %s
   4 //
   5 // Verifies that clang detects memcpy inline version and uses it instead of the builtin.
   6 // Checks alternate version with the `artificial` attribute.
   7
   8 typedef unsigned long size_t;
   9
  10 // Clang requires these attributes for a function to be redefined.
  11 #define AVAILABLE_EXTERNALLY extern inline __attribute__((always_inline)) __attribute__((gnu_inline))
  12
  13 #define AVAILABLE_EXTERNALLY_ALTERNATE extern inline __attribute__((__always_inline__)) __attribute__((__artificial__))
  14
  15 // Clang recognizes an inline builtin and renames it to prevent conflict with builtins.
  16 AVAILABLE_EXTERNALLY void *memcpy(void *a, const void *b, size_t c) {
  17   asm("# memcpy.inline marker");
  18   return __builtin_memcpy(a, b, c);
  19 }
  20
  21 // Clang recognizes an inline builtin and renames it to prevent conflict with builtins.
  22 AVAILABLE_EXTERNALLY_ALTERNATE void *memmove(void *a, const void *b, size_t c) {
  23   asm("# memmove.inline marker");
  24   return __builtin_memmove(a, b, c);
  25 }
  26
  27 // CHECK-LABEL: @foo(
  28 // CHECK-NEXT:  entry:
  29 // CHECK-NEXT:    [[A_ADDR_I:%.*]] = alloca ptr, align 8
  30 // CHECK-NEXT:    [[B_ADDR_I:%.*]] = alloca ptr, align 8
  31 // CHECK-NEXT:    [[C_ADDR_I:%.*]] = alloca i64, align 8
  32 // CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
  33 // CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
  34 // CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 8
  35 // CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 8
  36 // CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 8
  37 // CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 8
  38 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
  39 // CHECK-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
  40 // CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[C_ADDR]], align 8
  41 // CHECK-NEXT:    store ptr [[TMP0]], ptr [[A_ADDR_I]], align 8
  42 // CHECK-NEXT:    store ptr [[TMP1]], ptr [[B_ADDR_I]], align 8
  43 // CHECK-NEXT:    store i64 [[TMP2]], ptr [[C_ADDR_I]], align 8
  44 // CHECK-NEXT:    call void asm sideeffect "# memcpy.inline marker", "~{dirflag},~{fpsr},~{flags}"() #[[ATTR3:[0-9]+]], !srcloc !2
  45 // CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR_I]], align 8
  46 // CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR_I]], align 8
  47 // CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR_I]], align 8
  48 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[TMP3]], ptr align 1 [[TMP4]], i64 [[TMP5]], i1 false)
  49 // CHECK-NEXT:    ret ptr [[TMP3]]
  50 //
  51 void *foo(void *a, const void *b, size_t c) {
  52   return memcpy(a, b, c);
  53 }
  54
  55 // CHECK-LABEL: @foo_alt(
  56 // CHECK-NEXT:  entry:
  57 // CHECK-NEXT:    [[A_ADDR_I:%.*]] = alloca ptr, align 8
  58 // CHECK-NEXT:    [[B_ADDR_I:%.*]] = alloca ptr, align 8
  59 // CHECK-NEXT:    [[C_ADDR_I:%.*]] = alloca i64, align 8
  60 // CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
  61 // CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
  62 // CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 8
  63 // CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 8
  64 // CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 8
  65 // CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 8
  66 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
  67 // CHECK-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
  68 // CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[C_ADDR]], align 8
  69 // CHECK-NEXT:    store ptr [[TMP0]], ptr [[A_ADDR_I]], align 8
  70 // CHECK-NEXT:    store ptr [[TMP1]], ptr [[B_ADDR_I]], align 8
  71 // CHECK-NEXT:    store i64 [[TMP2]], ptr [[C_ADDR_I]], align 8
  72 // CHECK-NEXT:    call void asm sideeffect "# memmove.inline marker", "~{dirflag},~{fpsr},~{flags}"() #[[ATTR3]], !srcloc !3
  73 // CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR_I]], align 8
  74 // CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR_I]], align 8
  75 // CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR_I]], align 8
  76 // CHECK-NEXT:    call void @llvm.memmove.p0.p0.i64(ptr align 1 [[TMP3]], ptr align 1 [[TMP4]], i64 [[TMP5]], i1 false)
  77 // CHECK-NEXT:    ret ptr [[TMP3]]
  78 //
  79 void *foo_alt(void *a, const void *b, size_t c) {
  80   return memmove(a, b, c);
  81 }
  82
  83 // CHECK-LABEL: @bar(
  84 // CHECK-NEXT:  entry:
  85 // CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
  86 // CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
  87 // CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 8
  88 // CHECK-NEXT:    [[CPY:%.*]] = alloca ptr, align 8
  89 // CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 8
  90 // CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 8
  91 // CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 8
  92 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[C_ADDR]], align 8
  93 // CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[TMP0]], 10
  94 // CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP]] to i64
  95 // CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], ptr @memcpy, ptr @foo
  96 // CHECK-NEXT:    store ptr [[COND]], ptr [[CPY]], align 8
  97 // CHECK-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[CPY]], align 8
  98 // CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8
  99 // CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 8
 100 // CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR]], align 8
 101 // CHECK-NEXT:    [[CALL:%.*]] = call ptr [[TMP2]](ptr noundef [[TMP3]], ptr noundef [[TMP4]], i64 noundef [[TMP5]])
 102 // CHECK-NEXT:    ret void
 103 //
 104 void bar(void *a, const void *b, size_t c) {
 105   void *(*cpy)(void *, const void *, size_t) = c > 10 ? memcpy : foo;
 106   cpy(a, b, c);
 107 }
 108
 109 // CHECK-LABEL: @bar_alt(
 110 // CHECK-NEXT:  entry:
 111 // CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 112 // CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
 113 // CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 8
 114 // CHECK-NEXT:    [[CPY:%.*]] = alloca ptr, align 8
 115 // CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 8
 116 // CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 8
 117 // CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 8
 118 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[C_ADDR]], align 8
 119 // CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[TMP0]], 10
 120 // CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP]] to i64
 121 // CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], ptr @memmove, ptr @foo_alt
 122 // CHECK-NEXT:    store ptr [[COND]], ptr [[CPY]], align 8
 123 // CHECK-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[CPY]], align 8
 124 // CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 125 // CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 8
 126 // CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR]], align 8
 127 // CHECK-NEXT:    [[CALL:%.*]] = call ptr [[TMP2]](ptr noundef [[TMP3]], ptr noundef [[TMP4]], i64 noundef [[TMP5]])
 128 // CHECK-NEXT:    ret void
 129 //
 130 void bar_alt(void *a, const void *b, size_t c) {
 131   void *(*cpy)(void *, const void *, size_t) = c > 10 ? memmove : foo_alt;
 132   cpy(a, b, c);
 133 }