Revert "[llvm] Improve llvm.objectsize computation by computing GEP, alloca and mallo...
[llvm-project.git] / clang / test / CodeGen / stack-protector-guard.c
blob82616ae800c4263f9f6d4d83da8825438bb28dfb
1 // RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple x86_64-linux-gnu \
2 // RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
3 // RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple powerpc64le-linux-gnu \
4 // RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
5 // RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple arm-linux-gnueabi \
6 // RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
7 // RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple thumbv7-linux-gnueabi \
8 // RUN: -mstack-protector-guard-offset=1024 -emit-llvm %s -o - | FileCheck %s
9 // RUN: %clang_cc1 -mstack-protector-guard=sysreg -triple aarch64-linux-gnu \
10 // RUN: -mstack-protector-guard-offset=1024 -mstack-protector-guard-reg=sp_el0 \
11 // RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=AARCH64
12 // RUN: %clang_cc1 -mstack-protector-guard=tls -triple riscv64-unknown-elf \
13 // RUN: -mstack-protector-guard-offset=44 -mstack-protector-guard-reg=tp \
14 // RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=RISCV
15 // RUN: %clang_cc1 -mstack-protector-guard=tls -triple powerpc64-unknown-elf \
16 // RUN: -mstack-protector-guard-offset=52 -mstack-protector-guard-reg=r13 \
17 // RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=POWERPC64
18 // RUN: %clang_cc1 -mstack-protector-guard=tls -triple ppc32-unknown-elf \
19 // RUN: -mstack-protector-guard-offset=16 -mstack-protector-guard-reg=r2 \
20 // RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=POWERPC32
21 void foo(int*);
22 void bar(int x) {
23 int baz[x];
24 foo(baz);
27 // CHECK: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]]}
28 // CHECK: [[ATTR1]] = !{i32 1, !"stack-protector-guard", !"sysreg"}
29 // CHECK: [[ATTR2]] = !{i32 1, !"stack-protector-guard-offset", i32 1024}
31 // AARCH64: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]]}
32 // AARCH64: [[ATTR1]] = !{i32 1, !"stack-protector-guard", !"sysreg"}
33 // AARCH64: [[ATTR2]] = !{i32 1, !"stack-protector-guard-reg", !"sp_el0"}
34 // AARCH64: [[ATTR3]] = !{i32 1, !"stack-protector-guard-offset", i32 1024}
36 // RISCV: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]], [[ATTR4:![0-9]+]]}
37 // RISCV: [[ATTR1]] = !{i32 1, !"stack-protector-guard", !"tls"}
38 // RISCV: [[ATTR2]] = !{i32 1, !"stack-protector-guard-reg", !"tp"}
39 // RISCV: [[ATTR3]] = !{i32 1, !"stack-protector-guard-offset", i32 44}
41 // POWERPC64: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]], [[ATTR4:![0-9]+]]}
42 // POWERPC64: [[ATTR2]] = !{i32 1, !"stack-protector-guard", !"tls"}
43 // POWERPC64: [[ATTR3]] = !{i32 1, !"stack-protector-guard-reg", !"r13"}
44 // POWERPC64: [[ATTR4]] = !{i32 1, !"stack-protector-guard-offset", i32 52}
46 // POWERPC32: !llvm.module.flags = !{{{.*}}[[ATTR1:![0-9]+]], [[ATTR2:![0-9]+]], [[ATTR3:![0-9]+]], [[ATTR4:![0-9]+]]}
47 // POWERPC32: [[ATTR2]] = !{i32 1, !"stack-protector-guard", !"tls"}
48 // POWERPC32: [[ATTR3]] = !{i32 1, !"stack-protector-guard-reg", !"r2"}
49 // POWERPC32: [[ATTR4]] = !{i32 1, !"stack-protector-guard-offset", i32 16}