| blob | 7ed6556ce1eb7e5b68862446fd48cbaf4d19d37b |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc %s -o - -mtriple=thumbv8m.base | \
3 ; RUN: FileCheck %s --check-prefix=CHECK-8B
4 ; RUN: llc %s -o - -mtriple=thumbebv8m.base | \
5 ; RUN: FileCheck %s --check-prefix=CHECK-8B
6 ; RUN: llc %s -o - -mtriple=thumbv8m.main | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-8M
8 ; RUN: llc %s -o - -mtriple=thumbebv8m.main | \
9 ; RUN: FileCheck %s --check-prefix=CHECK-8M
11 ; RUN: llc %s -o - -mtriple=thumbv8.1m.main | \
12 ; RUN: FileCheck %s --check-prefix=CHECK-81M
13 ; RUN: llc %s -o - -mtriple=thumbebv8.1m.main | \
14 ; RUN: FileCheck %s --check-prefix=CHECK-81M
16 define void @func1(ptr nocapture %fptr) #0 {
17 ; CHECK-8B-LABEL: func1:
18 ; CHECK-8B: @ %bb.0: @ %entry
19 ; CHECK-8B-NEXT: push {r7, lr}
20 ; CHECK-8B-NEXT: push {r4, r5, r6, r7}
21 ; CHECK-8B-NEXT: mov r7, r11
22 ; CHECK-8B-NEXT: mov r6, r10
23 ; CHECK-8B-NEXT: mov r5, r9
24 ; CHECK-8B-NEXT: mov r4, r8
25 ; CHECK-8B-NEXT: push {r4, r5, r6, r7}
26 ; CHECK-8B-NEXT: mov r1, #1
27 ; CHECK-8B-NEXT: bics r0, r1
28 ; CHECK-8B-NEXT: mov r1, r0
29 ; CHECK-8B-NEXT: mov r2, r0
30 ; CHECK-8B-NEXT: mov r3, r0
31 ; CHECK-8B-NEXT: mov r4, r0
32 ; CHECK-8B-NEXT: mov r5, r0
33 ; CHECK-8B-NEXT: mov r6, r0
34 ; CHECK-8B-NEXT: mov r7, r0
35 ; CHECK-8B-NEXT: mov r8, r0
36 ; CHECK-8B-NEXT: mov r9, r0
37 ; CHECK-8B-NEXT: mov r10, r0
38 ; CHECK-8B-NEXT: mov r11, r0
39 ; CHECK-8B-NEXT: mov r12, r0
40 ; CHECK-8B-NEXT: msr apsr, r0
41 ; CHECK-8B-NEXT: blxns r0
42 ; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
43 ; CHECK-8B-NEXT: mov r8, r4
44 ; CHECK-8B-NEXT: mov r9, r5
45 ; CHECK-8B-NEXT: mov r10, r6
46 ; CHECK-8B-NEXT: mov r11, r7
47 ; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
48 ; CHECK-8B-NEXT: pop {r7}
49 ; CHECK-8B-NEXT: pop {r0}
50 ; CHECK-8B-NEXT: mov lr, r0
51 ; CHECK-8B-NEXT: mov r0, lr
52 ; CHECK-8B-NEXT: mov r1, lr
53 ; CHECK-8B-NEXT: mov r2, lr
54 ; CHECK-8B-NEXT: mov r3, lr
55 ; CHECK-8B-NEXT: mov r12, lr
56 ; CHECK-8B-NEXT: msr apsr, lr
57 ; CHECK-8B-NEXT: bxns lr
58 ;
59 ; CHECK-8M-LABEL: func1:
60 ; CHECK-8M: @ %bb.0: @ %entry
61 ; CHECK-8M-NEXT: push {r7, lr}
62 ; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
63 ; CHECK-8M-NEXT: bic r0, r0, #1
64 ; CHECK-8M-NEXT: sub sp, #136
65 ; CHECK-8M-NEXT: vlstm sp
66 ; CHECK-8M-NEXT: mov r1, r0
67 ; CHECK-8M-NEXT: mov r2, r0
68 ; CHECK-8M-NEXT: mov r3, r0
69 ; CHECK-8M-NEXT: mov r4, r0
70 ; CHECK-8M-NEXT: mov r5, r0
71 ; CHECK-8M-NEXT: mov r6, r0
72 ; CHECK-8M-NEXT: mov r7, r0
73 ; CHECK-8M-NEXT: mov r8, r0
74 ; CHECK-8M-NEXT: mov r9, r0
75 ; CHECK-8M-NEXT: mov r10, r0
76 ; CHECK-8M-NEXT: mov r11, r0
77 ; CHECK-8M-NEXT: mov r12, r0
78 ; CHECK-8M-NEXT: msr apsr_nzcvq, r0
79 ; CHECK-8M-NEXT: blxns r0
80 ; CHECK-8M-NEXT: vlldm sp
81 ; CHECK-8M-NEXT: add sp, #136
82 ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
83 ; CHECK-8M-NEXT: pop.w {r7, lr}
84 ; CHECK-8M-NEXT: mov r0, lr
85 ; CHECK-8M-NEXT: mov r1, lr
86 ; CHECK-8M-NEXT: mov r2, lr
87 ; CHECK-8M-NEXT: mov r3, lr
88 ; CHECK-8M-NEXT: mov r12, lr
89 ; CHECK-8M-NEXT: msr apsr_nzcvq, lr
90 ; CHECK-8M-NEXT: bxns lr
91 ;
92 ; CHECK-81M-LABEL: func1:
93 ; CHECK-81M: @ %bb.0: @ %entry
94 ; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
95 ; CHECK-81M-NEXT: push {r7, lr}
96 ; CHECK-81M-NEXT: sub sp, #4
97 ; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
98 ; CHECK-81M-NEXT: bic r0, r0, #1
99 ; CHECK-81M-NEXT: sub sp, #136
100 ; CHECK-81M-NEXT: vlstm sp
101 ; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}
102 ; CHECK-81M-NEXT: blxns r0
103 ; CHECK-81M-NEXT: vlldm sp
104 ; CHECK-81M-NEXT: add sp, #136
105 ; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
106 ; CHECK-81M-NEXT: add sp, #4
107 ; CHECK-81M-NEXT: pop.w {r7, lr}
108 ; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
109 ; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
110 ; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
111 ; CHECK-81M-NEXT: bxns lr
112 entry:
113 call void %fptr() #1
114 ret void
115 }
117 attributes #0 = { "cmse_nonsecure_entry" nounwind }
118 attributes #1 = { "cmse_nonsecure_call" nounwind }
120 define void @func2(ptr nocapture %fptr) #2 {
121 ; CHECK-8B-LABEL: func2:
122 ; CHECK-8B: @ %bb.0: @ %entry
123 ; CHECK-8B-NEXT: push {r7, lr}
124 ; CHECK-8B-NEXT: push {r4, r5, r6, r7}
125 ; CHECK-8B-NEXT: mov r7, r11
126 ; CHECK-8B-NEXT: mov r6, r10
127 ; CHECK-8B-NEXT: mov r5, r9
128 ; CHECK-8B-NEXT: mov r4, r8
129 ; CHECK-8B-NEXT: push {r4, r5, r6, r7}
130 ; CHECK-8B-NEXT: mov r1, #1
131 ; CHECK-8B-NEXT: bics r0, r1
132 ; CHECK-8B-NEXT: mov r1, r0
133 ; CHECK-8B-NEXT: mov r2, r0
134 ; CHECK-8B-NEXT: mov r3, r0
135 ; CHECK-8B-NEXT: mov r4, r0
136 ; CHECK-8B-NEXT: mov r5, r0
137 ; CHECK-8B-NEXT: mov r6, r0
138 ; CHECK-8B-NEXT: mov r7, r0
139 ; CHECK-8B-NEXT: mov r8, r0
140 ; CHECK-8B-NEXT: mov r9, r0
141 ; CHECK-8B-NEXT: mov r10, r0
142 ; CHECK-8B-NEXT: mov r11, r0
143 ; CHECK-8B-NEXT: mov r12, r0
144 ; CHECK-8B-NEXT: msr apsr, r0
145 ; CHECK-8B-NEXT: blxns r0
146 ; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
147 ; CHECK-8B-NEXT: mov r8, r4
148 ; CHECK-8B-NEXT: mov r9, r5
149 ; CHECK-8B-NEXT: mov r10, r6
150 ; CHECK-8B-NEXT: mov r11, r7
151 ; CHECK-8B-NEXT: pop {r4, r5, r6, r7}
152 ; CHECK-8B-NEXT: pop {r7, pc}
153 ;
154 ; CHECK-8M-LABEL: func2:
155 ; CHECK-8M: @ %bb.0: @ %entry
156 ; CHECK-8M-NEXT: push {r7, lr}
157 ; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
158 ; CHECK-8M-NEXT: bic r0, r0, #1
159 ; CHECK-8M-NEXT: sub sp, #136
160 ; CHECK-8M-NEXT: vlstm sp
161 ; CHECK-8M-NEXT: mov r1, r0
162 ; CHECK-8M-NEXT: mov r2, r0
163 ; CHECK-8M-NEXT: mov r3, r0
164 ; CHECK-8M-NEXT: mov r4, r0
165 ; CHECK-8M-NEXT: mov r5, r0
166 ; CHECK-8M-NEXT: mov r6, r0
167 ; CHECK-8M-NEXT: mov r7, r0
168 ; CHECK-8M-NEXT: mov r8, r0
169 ; CHECK-8M-NEXT: mov r9, r0
170 ; CHECK-8M-NEXT: mov r10, r0
171 ; CHECK-8M-NEXT: mov r11, r0
172 ; CHECK-8M-NEXT: mov r12, r0
173 ; CHECK-8M-NEXT: msr apsr_nzcvq, r0
174 ; CHECK-8M-NEXT: blxns r0
175 ; CHECK-8M-NEXT: vlldm sp
176 ; CHECK-8M-NEXT: add sp, #136
177 ; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
178 ; CHECK-8M-NEXT: pop {r7, pc}
179 ;
180 ; CHECK-81M-LABEL: func2:
181 ; CHECK-81M: @ %bb.0: @ %entry
182 ; CHECK-81M-NEXT: push {r7, lr}
183 ; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}
184 ; CHECK-81M-NEXT: bic r0, r0, #1
185 ; CHECK-81M-NEXT: sub sp, #136
186 ; CHECK-81M-NEXT: vlstm sp
187 ; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}
188 ; CHECK-81M-NEXT: blxns r0
189 ; CHECK-81M-NEXT: vlldm sp
190 ; CHECK-81M-NEXT: add sp, #136
191 ; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}
192 ; CHECK-81M-NEXT: pop {r7, pc}
193 entry:
194 tail call void %fptr() #3
195 ret void
196 }
198 attributes #2 = { nounwind }
199 attributes #3 = { "cmse_nonsecure_call" nounwind }
201 define void @func3() #4 {
202 ; CHECK-8B-LABEL: func3:
203 ; CHECK-8B: @ %bb.0: @ %entry
204 ; CHECK-8B-NEXT: mov r0, lr
205 ; CHECK-8B-NEXT: mov r1, lr
206 ; CHECK-8B-NEXT: mov r2, lr
207 ; CHECK-8B-NEXT: mov r3, lr
208 ; CHECK-8B-NEXT: mov r12, lr
209 ; CHECK-8B-NEXT: msr apsr, lr
210 ; CHECK-8B-NEXT: bxns lr
211 ;
212 ; CHECK-8M-LABEL: func3:
213 ; CHECK-8M: @ %bb.0: @ %entry
214 ; CHECK-8M-NEXT: mov r0, lr
215 ; CHECK-8M-NEXT: mov r1, lr
216 ; CHECK-8M-NEXT: mov r2, lr
217 ; CHECK-8M-NEXT: mov r3, lr
218 ; CHECK-8M-NEXT: mov r12, lr
219 ; CHECK-8M-NEXT: msr apsr_nzcvq, lr
220 ; CHECK-8M-NEXT: bxns lr
221 ;
222 ; CHECK-81M-LABEL: func3:
223 ; CHECK-81M: @ %bb.0: @ %entry
224 ; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
225 ; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
226 ; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
227 ; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
228 ; CHECK-81M-NEXT: bxns lr
229 entry:
230 ret void
231 }
233 define void @func4() #4 {
234 ; CHECK-8B-LABEL: func4:
235 ; CHECK-8B: @ %bb.0: @ %entry
236 ; CHECK-8B-NEXT: push {r7, lr}
237 ; CHECK-8B-NEXT: bl func3
238 ; CHECK-8B-NEXT: pop {r7}
239 ; CHECK-8B-NEXT: pop {r0}
240 ; CHECK-8B-NEXT: mov lr, r0
241 ; CHECK-8B-NEXT: mov r0, lr
242 ; CHECK-8B-NEXT: mov r1, lr
243 ; CHECK-8B-NEXT: mov r2, lr
244 ; CHECK-8B-NEXT: mov r3, lr
245 ; CHECK-8B-NEXT: mov r12, lr
246 ; CHECK-8B-NEXT: msr apsr, lr
247 ; CHECK-8B-NEXT: bxns lr
248 ;
249 ; CHECK-8M-LABEL: func4:
250 ; CHECK-8M: @ %bb.0: @ %entry
251 ; CHECK-8M-NEXT: push {r7, lr}
252 ; CHECK-8M-NEXT: bl func3
253 ; CHECK-8M-NEXT: pop.w {r7, lr}
254 ; CHECK-8M-NEXT: mov r0, lr
255 ; CHECK-8M-NEXT: mov r1, lr
256 ; CHECK-8M-NEXT: mov r2, lr
257 ; CHECK-8M-NEXT: mov r3, lr
258 ; CHECK-8M-NEXT: mov r12, lr
259 ; CHECK-8M-NEXT: msr apsr_nzcvq, lr
260 ; CHECK-8M-NEXT: bxns lr
261 ;
262 ; CHECK-81M-LABEL: func4:
263 ; CHECK-81M: @ %bb.0: @ %entry
264 ; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
265 ; CHECK-81M-NEXT: push {r7, lr}
266 ; CHECK-81M-NEXT: sub sp, #4
267 ; CHECK-81M-NEXT: bl func3
268 ; CHECK-81M-NEXT: add sp, #4
269 ; CHECK-81M-NEXT: pop.w {r7, lr}
270 ; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
271 ; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
272 ; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
273 ; CHECK-81M-NEXT: bxns lr
274 entry:
275 tail call void @func3() #5
276 ret void
277 }
279 declare void @func51(ptr);
281 define void @func5() #4 {
282 ; CHECK-8B-LABEL: func5:
283 ; CHECK-8B: @ %bb.0:
284 ; CHECK-8B-NEXT: push {r4, r6, r7, lr}
285 ; CHECK-8B-NEXT: add r7, sp, #8
286 ; CHECK-8B-NEXT: sub sp, #16
287 ; CHECK-8B-NEXT: mov r4, sp
288 ; CHECK-8B-NEXT: lsrs r4, r4, #4
289 ; CHECK-8B-NEXT: lsls r4, r4, #4
290 ; CHECK-8B-NEXT: mov sp, r4
291 ; CHECK-8B-NEXT: mov r0, sp
292 ; CHECK-8B-NEXT: bl func51
293 ; CHECK-8B-NEXT: subs r6, r7, #7
294 ; CHECK-8B-NEXT: subs r6, #1
295 ; CHECK-8B-NEXT: mov sp, r6
296 ; CHECK-8B-NEXT: pop {r4, r6, r7}
297 ; CHECK-8B-NEXT: pop {r0}
298 ; CHECK-8B-NEXT: mov lr, r0
299 ; CHECK-8B-NEXT: mov r0, lr
300 ; CHECK-8B-NEXT: mov r1, lr
301 ; CHECK-8B-NEXT: mov r2, lr
302 ; CHECK-8B-NEXT: mov r3, lr
303 ; CHECK-8B-NEXT: mov r12, lr
304 ; CHECK-8B-NEXT: msr apsr, lr
305 ; CHECK-8B-NEXT: bxns lr
306 ;
307 ; CHECK-8M-LABEL: func5:
308 ; CHECK-8M: @ %bb.0:
309 ; CHECK-8M-NEXT: push {r4, r6, r7, lr}
310 ; CHECK-8M-NEXT: add r7, sp, #8
311 ; CHECK-8M-NEXT: sub sp, #16
312 ; CHECK-8M-NEXT: mov r4, sp
313 ; CHECK-8M-NEXT: bfc r4, #0, #4
314 ; CHECK-8M-NEXT: mov sp, r4
315 ; CHECK-8M-NEXT: mov r0, sp
316 ; CHECK-8M-NEXT: bl func51
317 ; CHECK-8M-NEXT: sub.w r4, r7, #8
318 ; CHECK-8M-NEXT: mov sp, r4
319 ; CHECK-8M-NEXT: pop.w {r4, r6, r7, lr}
320 ; CHECK-8M-NEXT: mov r0, lr
321 ; CHECK-8M-NEXT: mov r1, lr
322 ; CHECK-8M-NEXT: mov r2, lr
323 ; CHECK-8M-NEXT: mov r3, lr
324 ; CHECK-8M-NEXT: mov r12, lr
325 ; CHECK-8M-NEXT: msr apsr_nzcvq, lr
326 ; CHECK-8M-NEXT: bxns lr
327 ;
328 ; CHECK-81M-LABEL: func5:
329 ; CHECK-81M: @ %bb.0:
330 ; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!
331 ; CHECK-81M-NEXT: push {r4, r6, r7, lr}
332 ; CHECK-81M-NEXT: add r7, sp, #8
333 ; CHECK-81M-NEXT: sub sp, #12
334 ; CHECK-81M-NEXT: mov r4, sp
335 ; CHECK-81M-NEXT: bfc r4, #0, #4
336 ; CHECK-81M-NEXT: mov sp, r4
337 ; CHECK-81M-NEXT: mov r0, sp
338 ; CHECK-81M-NEXT: bl func51
339 ; CHECK-81M-NEXT: sub.w r4, r7, #8
340 ; CHECK-81M-NEXT: mov sp, r4
341 ; CHECK-81M-NEXT: pop.w {r4, r6, r7, lr}
342 ; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}
343 ; CHECK-81M-NEXT: vldr fpcxtns, [sp], #4
344 ; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}
345 ; CHECK-81M-NEXT: bxns lr
346 %1 = alloca i8, align 16
347 call void @func51(ptr nonnull %1) #5
348 ret void
349 }
352 attributes #4 = { "cmse_nonsecure_entry" nounwind }
353 attributes #5 = { nounwind }