| blob | be741f536ac757fb81d6ad1a37ac98c02e192706 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=armv7 -mattr=+neon %s -o - | FileCheck %s --check-prefix=ARMV7
3 ; RUN: llc -mtriple=armv7 -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=ARMV8
4 ; RUN: llc -mtriple=armv8.2a -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=ARMV8
5 ; RUN: llc -mtriple=armv8.1m-none-none-eabi -mattr=+mve.fp,+fp64 %s -o - | FileCheck %s --check-prefix=ARMV8M
7 declare float @llvm.minnum.f32(float, float)
8 declare float @llvm.maxnum.f32(float, float)
9 declare double @llvm.minnum.f64(double, double)
10 declare double @llvm.maxnum.f64(double, double)
11 declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
12 declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
13 declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
14 declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)
16 define float @fminnum32_intrinsic(float %x, float %y) {
17 ; ARMV7-LABEL: fminnum32_intrinsic:
18 ; ARMV7: @ %bb.0:
19 ; ARMV7-NEXT: vmov s0, r0
20 ; ARMV7-NEXT: vmov s2, r1
21 ; ARMV7-NEXT: vcmp.f32 s0, s2
22 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
23 ; ARMV7-NEXT: vmovlt.f32 s2, s0
24 ; ARMV7-NEXT: vmov r0, s2
25 ; ARMV7-NEXT: bx lr
26 ;
27 ; ARMV8-LABEL: fminnum32_intrinsic:
28 ; ARMV8: @ %bb.0:
29 ; ARMV8-NEXT: vmov s0, r1
30 ; ARMV8-NEXT: vmov s2, r0
31 ; ARMV8-NEXT: vminnm.f32 s0, s2, s0
32 ; ARMV8-NEXT: vmov r0, s0
33 ; ARMV8-NEXT: bx lr
34 ;
35 ; ARMV8M-LABEL: fminnum32_intrinsic:
36 ; ARMV8M: @ %bb.0:
37 ; ARMV8M-NEXT: vmov s0, r1
38 ; ARMV8M-NEXT: vmov s2, r0
39 ; ARMV8M-NEXT: vminnm.f32 s0, s2, s0
40 ; ARMV8M-NEXT: vmov r0, s0
41 ; ARMV8M-NEXT: bx lr
42 %a = call nnan float @llvm.minnum.f32(float %x, float %y)
43 ret float %a
44 }
46 define float @fminnum32_nsz_intrinsic(float %x, float %y) {
47 ; ARMV7-LABEL: fminnum32_nsz_intrinsic:
48 ; ARMV7: @ %bb.0:
49 ; ARMV7-NEXT: vmov s0, r0
50 ; ARMV7-NEXT: vmov s2, r1
51 ; ARMV7-NEXT: vcmp.f32 s0, s2
52 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
53 ; ARMV7-NEXT: vmovlt.f32 s2, s0
54 ; ARMV7-NEXT: vmov r0, s2
55 ; ARMV7-NEXT: bx lr
56 ;
57 ; ARMV8-LABEL: fminnum32_nsz_intrinsic:
58 ; ARMV8: @ %bb.0:
59 ; ARMV8-NEXT: vmov s0, r1
60 ; ARMV8-NEXT: vmov s2, r0
61 ; ARMV8-NEXT: vminnm.f32 s0, s2, s0
62 ; ARMV8-NEXT: vmov r0, s0
63 ; ARMV8-NEXT: bx lr
64 ;
65 ; ARMV8M-LABEL: fminnum32_nsz_intrinsic:
66 ; ARMV8M: @ %bb.0:
67 ; ARMV8M-NEXT: vmov s0, r1
68 ; ARMV8M-NEXT: vmov s2, r0
69 ; ARMV8M-NEXT: vminnm.f32 s0, s2, s0
70 ; ARMV8M-NEXT: vmov r0, s0
71 ; ARMV8M-NEXT: bx lr
72 %a = call nnan nsz float @llvm.minnum.f32(float %x, float %y)
73 ret float %a
74 }
76 define float @fminnum32_non_zero_intrinsic(float %x) {
77 ; ARMV7-LABEL: fminnum32_non_zero_intrinsic:
78 ; ARMV7: @ %bb.0:
79 ; ARMV7-NEXT: vmov.f32 s0, #-1.000000e+00
80 ; ARMV7-NEXT: vmov s2, r0
81 ; ARMV7-NEXT: vcmp.f32 s2, s0
82 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
83 ; ARMV7-NEXT: vmovlt.f32 s0, s2
84 ; ARMV7-NEXT: vmov r0, s0
85 ; ARMV7-NEXT: bx lr
86 ;
87 ; ARMV8-LABEL: fminnum32_non_zero_intrinsic:
88 ; ARMV8: @ %bb.0:
89 ; ARMV8-NEXT: vmov.f32 s0, #-1.000000e+00
90 ; ARMV8-NEXT: vmov s2, r0
91 ; ARMV8-NEXT: vminnm.f32 s0, s2, s0
92 ; ARMV8-NEXT: vmov r0, s0
93 ; ARMV8-NEXT: bx lr
94 ;
95 ; ARMV8M-LABEL: fminnum32_non_zero_intrinsic:
96 ; ARMV8M: @ %bb.0:
97 ; ARMV8M-NEXT: vmov.f32 s0, #-1.000000e+00
98 ; ARMV8M-NEXT: vmov s2, r0
99 ; ARMV8M-NEXT: vminnm.f32 s0, s2, s0
100 ; ARMV8M-NEXT: vmov r0, s0
101 ; ARMV8M-NEXT: bx lr
102 %a = call nnan float @llvm.minnum.f32(float %x, float -1.0)
103 ret float %a
104 }
106 define float @fmaxnum32_intrinsic(float %x, float %y) {
107 ; ARMV7-LABEL: fmaxnum32_intrinsic:
108 ; ARMV7: @ %bb.0:
109 ; ARMV7-NEXT: vmov s0, r0
110 ; ARMV7-NEXT: vmov s2, r1
111 ; ARMV7-NEXT: vcmp.f32 s0, s2
112 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
113 ; ARMV7-NEXT: vmovgt.f32 s2, s0
114 ; ARMV7-NEXT: vmov r0, s2
115 ; ARMV7-NEXT: bx lr
116 ;
117 ; ARMV8-LABEL: fmaxnum32_intrinsic:
118 ; ARMV8: @ %bb.0:
119 ; ARMV8-NEXT: vmov s0, r1
120 ; ARMV8-NEXT: vmov s2, r0
121 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
122 ; ARMV8-NEXT: vmov r0, s0
123 ; ARMV8-NEXT: bx lr
124 ;
125 ; ARMV8M-LABEL: fmaxnum32_intrinsic:
126 ; ARMV8M: @ %bb.0:
127 ; ARMV8M-NEXT: vmov s0, r1
128 ; ARMV8M-NEXT: vmov s2, r0
129 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
130 ; ARMV8M-NEXT: vmov r0, s0
131 ; ARMV8M-NEXT: bx lr
132 %a = call nnan float @llvm.maxnum.f32(float %x, float %y)
133 ret float %a
134 }
136 define float @fmaxnum32_nsz_intrinsic(float %x, float %y) {
137 ; ARMV7-LABEL: fmaxnum32_nsz_intrinsic:
138 ; ARMV7: @ %bb.0:
139 ; ARMV7-NEXT: vmov s0, r0
140 ; ARMV7-NEXT: vmov s2, r1
141 ; ARMV7-NEXT: vcmp.f32 s0, s2
142 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
143 ; ARMV7-NEXT: vmovgt.f32 s2, s0
144 ; ARMV7-NEXT: vmov r0, s2
145 ; ARMV7-NEXT: bx lr
146 ;
147 ; ARMV8-LABEL: fmaxnum32_nsz_intrinsic:
148 ; ARMV8: @ %bb.0:
149 ; ARMV8-NEXT: vmov s0, r1
150 ; ARMV8-NEXT: vmov s2, r0
151 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
152 ; ARMV8-NEXT: vmov r0, s0
153 ; ARMV8-NEXT: bx lr
154 ;
155 ; ARMV8M-LABEL: fmaxnum32_nsz_intrinsic:
156 ; ARMV8M: @ %bb.0:
157 ; ARMV8M-NEXT: vmov s0, r1
158 ; ARMV8M-NEXT: vmov s2, r0
159 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
160 ; ARMV8M-NEXT: vmov r0, s0
161 ; ARMV8M-NEXT: bx lr
162 %a = call nnan nsz float @llvm.maxnum.f32(float %x, float %y)
163 ret float %a
164 }
166 define float @fmaxnum32_zero_intrinsic(float %x) {
167 ; ARMV7-LABEL: fmaxnum32_zero_intrinsic:
168 ; ARMV7: @ %bb.0:
169 ; ARMV7-NEXT: vmov s2, r0
170 ; ARMV7-NEXT: vldr s0, .LCPI5_0
171 ; ARMV7-NEXT: vcmp.f32 s2, #0
172 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
173 ; ARMV7-NEXT: vmovgt.f32 s0, s2
174 ; ARMV7-NEXT: vmov r0, s0
175 ; ARMV7-NEXT: bx lr
176 ; ARMV7-NEXT: .p2align 2
177 ; ARMV7-NEXT: @ %bb.1:
178 ; ARMV7-NEXT: .LCPI5_0:
179 ; ARMV7-NEXT: .long 0x00000000 @ float 0
180 ;
181 ; ARMV8-LABEL: fmaxnum32_zero_intrinsic:
182 ; ARMV8: @ %bb.0:
183 ; ARMV8-NEXT: vldr s0, .LCPI5_0
184 ; ARMV8-NEXT: vmov s2, r0
185 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
186 ; ARMV8-NEXT: vmov r0, s0
187 ; ARMV8-NEXT: bx lr
188 ; ARMV8-NEXT: .p2align 2
189 ; ARMV8-NEXT: @ %bb.1:
190 ; ARMV8-NEXT: .LCPI5_0:
191 ; ARMV8-NEXT: .long 0x00000000 @ float 0
192 ;
193 ; ARMV8M-LABEL: fmaxnum32_zero_intrinsic:
194 ; ARMV8M: @ %bb.0:
195 ; ARMV8M-NEXT: vldr s0, .LCPI5_0
196 ; ARMV8M-NEXT: vmov s2, r0
197 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
198 ; ARMV8M-NEXT: vmov r0, s0
199 ; ARMV8M-NEXT: bx lr
200 ; ARMV8M-NEXT: .p2align 2
201 ; ARMV8M-NEXT: @ %bb.1:
202 ; ARMV8M-NEXT: .LCPI5_0:
203 ; ARMV8M-NEXT: .long 0x00000000 @ float 0
204 %a = call nnan float @llvm.maxnum.f32(float %x, float 0.0)
205 ret float %a
206 }
208 define float @fmaxnum32_non_zero_intrinsic(float %x) {
209 ; ARMV7-LABEL: fmaxnum32_non_zero_intrinsic:
210 ; ARMV7: @ %bb.0:
211 ; ARMV7-NEXT: vmov.f32 s0, #1.000000e+00
212 ; ARMV7-NEXT: vmov s2, r0
213 ; ARMV7-NEXT: vcmp.f32 s2, s0
214 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
215 ; ARMV7-NEXT: vmovgt.f32 s0, s2
216 ; ARMV7-NEXT: vmov r0, s0
217 ; ARMV7-NEXT: bx lr
218 ;
219 ; ARMV8-LABEL: fmaxnum32_non_zero_intrinsic:
220 ; ARMV8: @ %bb.0:
221 ; ARMV8-NEXT: vmov.f32 s0, #1.000000e+00
222 ; ARMV8-NEXT: vmov s2, r0
223 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
224 ; ARMV8-NEXT: vmov r0, s0
225 ; ARMV8-NEXT: bx lr
226 ;
227 ; ARMV8M-LABEL: fmaxnum32_non_zero_intrinsic:
228 ; ARMV8M: @ %bb.0:
229 ; ARMV8M-NEXT: vmov.f32 s0, #1.000000e+00
230 ; ARMV8M-NEXT: vmov s2, r0
231 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
232 ; ARMV8M-NEXT: vmov r0, s0
233 ; ARMV8M-NEXT: bx lr
234 %a = call nnan float @llvm.maxnum.f32(float %x, float 1.0)
235 ret float %a
236 }
238 define double @fminnum64_intrinsic(double %x, double %y) {
239 ; ARMV7-LABEL: fminnum64_intrinsic:
240 ; ARMV7: @ %bb.0:
241 ; ARMV7-NEXT: vmov d16, r2, r3
242 ; ARMV7-NEXT: vmov d17, r0, r1
243 ; ARMV7-NEXT: vcmp.f64 d17, d16
244 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
245 ; ARMV7-NEXT: vmovlt.f64 d16, d17
246 ; ARMV7-NEXT: vmov r0, r1, d16
247 ; ARMV7-NEXT: bx lr
248 ;
249 ; ARMV8-LABEL: fminnum64_intrinsic:
250 ; ARMV8: @ %bb.0:
251 ; ARMV8-NEXT: vmov d16, r2, r3
252 ; ARMV8-NEXT: vmov d17, r0, r1
253 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
254 ; ARMV8-NEXT: vmov r0, r1, d16
255 ; ARMV8-NEXT: bx lr
256 ;
257 ; ARMV8M-LABEL: fminnum64_intrinsic:
258 ; ARMV8M: @ %bb.0:
259 ; ARMV8M-NEXT: vmov d0, r2, r3
260 ; ARMV8M-NEXT: vmov d1, r0, r1
261 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
262 ; ARMV8M-NEXT: vmov r0, r1, d0
263 ; ARMV8M-NEXT: bx lr
264 %a = call nnan double @llvm.minnum.f64(double %x, double %y)
265 ret double %a
266 }
268 define double @fminnum64_nsz_intrinsic(double %x, double %y) {
269 ; ARMV7-LABEL: fminnum64_nsz_intrinsic:
270 ; ARMV7: @ %bb.0:
271 ; ARMV7-NEXT: vmov d16, r2, r3
272 ; ARMV7-NEXT: vmov d17, r0, r1
273 ; ARMV7-NEXT: vcmp.f64 d17, d16
274 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
275 ; ARMV7-NEXT: vmovlt.f64 d16, d17
276 ; ARMV7-NEXT: vmov r0, r1, d16
277 ; ARMV7-NEXT: bx lr
278 ;
279 ; ARMV8-LABEL: fminnum64_nsz_intrinsic:
280 ; ARMV8: @ %bb.0:
281 ; ARMV8-NEXT: vmov d16, r2, r3
282 ; ARMV8-NEXT: vmov d17, r0, r1
283 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
284 ; ARMV8-NEXT: vmov r0, r1, d16
285 ; ARMV8-NEXT: bx lr
286 ;
287 ; ARMV8M-LABEL: fminnum64_nsz_intrinsic:
288 ; ARMV8M: @ %bb.0:
289 ; ARMV8M-NEXT: vmov d0, r2, r3
290 ; ARMV8M-NEXT: vmov d1, r0, r1
291 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
292 ; ARMV8M-NEXT: vmov r0, r1, d0
293 ; ARMV8M-NEXT: bx lr
294 %a = call nnan nsz double @llvm.minnum.f64(double %x, double %y)
295 ret double %a
296 }
298 define double @fminnum64_zero_intrinsic(double %x) {
299 ; ARMV7-LABEL: fminnum64_zero_intrinsic:
300 ; ARMV7: @ %bb.0:
301 ; ARMV7-NEXT: vldr d16, .LCPI9_0
302 ; ARMV7-NEXT: vmov d17, r0, r1
303 ; ARMV7-NEXT: vcmp.f64 d17, d16
304 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
305 ; ARMV7-NEXT: vmovlt.f64 d16, d17
306 ; ARMV7-NEXT: vmov r0, r1, d16
307 ; ARMV7-NEXT: bx lr
308 ; ARMV7-NEXT: .p2align 3
309 ; ARMV7-NEXT: @ %bb.1:
310 ; ARMV7-NEXT: .LCPI9_0:
311 ; ARMV7-NEXT: .long 0 @ double -0
312 ; ARMV7-NEXT: .long 2147483648
313 ;
314 ; ARMV8-LABEL: fminnum64_zero_intrinsic:
315 ; ARMV8: @ %bb.0:
316 ; ARMV8-NEXT: vldr d16, .LCPI9_0
317 ; ARMV8-NEXT: vmov d17, r0, r1
318 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
319 ; ARMV8-NEXT: vmov r0, r1, d16
320 ; ARMV8-NEXT: bx lr
321 ; ARMV8-NEXT: .p2align 3
322 ; ARMV8-NEXT: @ %bb.1:
323 ; ARMV8-NEXT: .LCPI9_0:
324 ; ARMV8-NEXT: .long 0 @ double -0
325 ; ARMV8-NEXT: .long 2147483648
326 ;
327 ; ARMV8M-LABEL: fminnum64_zero_intrinsic:
328 ; ARMV8M: @ %bb.0:
329 ; ARMV8M-NEXT: vldr d0, .LCPI9_0
330 ; ARMV8M-NEXT: vmov d1, r0, r1
331 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
332 ; ARMV8M-NEXT: vmov r0, r1, d0
333 ; ARMV8M-NEXT: bx lr
334 ; ARMV8M-NEXT: .p2align 3
335 ; ARMV8M-NEXT: @ %bb.1:
336 ; ARMV8M-NEXT: .LCPI9_0:
337 ; ARMV8M-NEXT: .long 0 @ double -0
338 ; ARMV8M-NEXT: .long 2147483648
339 %a = call nnan double @llvm.minnum.f64(double %x, double -0.0)
340 ret double %a
341 }
343 define double @fminnum64_non_zero_intrinsic(double %x) {
344 ; ARMV7-LABEL: fminnum64_non_zero_intrinsic:
345 ; ARMV7: @ %bb.0:
346 ; ARMV7-NEXT: vmov.f64 d16, #-1.000000e+00
347 ; ARMV7-NEXT: vmov d17, r0, r1
348 ; ARMV7-NEXT: vcmp.f64 d17, d16
349 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
350 ; ARMV7-NEXT: vmovlt.f64 d16, d17
351 ; ARMV7-NEXT: vmov r0, r1, d16
352 ; ARMV7-NEXT: bx lr
353 ;
354 ; ARMV8-LABEL: fminnum64_non_zero_intrinsic:
355 ; ARMV8: @ %bb.0:
356 ; ARMV8-NEXT: vmov.f64 d16, #-1.000000e+00
357 ; ARMV8-NEXT: vmov d17, r0, r1
358 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
359 ; ARMV8-NEXT: vmov r0, r1, d16
360 ; ARMV8-NEXT: bx lr
361 ;
362 ; ARMV8M-LABEL: fminnum64_non_zero_intrinsic:
363 ; ARMV8M: @ %bb.0:
364 ; ARMV8M-NEXT: vmov.f64 d0, #-1.000000e+00
365 ; ARMV8M-NEXT: vmov d1, r0, r1
366 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
367 ; ARMV8M-NEXT: vmov r0, r1, d0
368 ; ARMV8M-NEXT: bx lr
369 %a = call nnan double @llvm.minnum.f64(double %x, double -1.0)
370 ret double %a
371 }
373 define double@fmaxnum64_intrinsic(double %x, double %y) {
374 ; ARMV7-LABEL: fmaxnum64_intrinsic:
375 ; ARMV7: @ %bb.0:
376 ; ARMV7-NEXT: vmov d16, r2, r3
377 ; ARMV7-NEXT: vmov d17, r0, r1
378 ; ARMV7-NEXT: vcmp.f64 d17, d16
379 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
380 ; ARMV7-NEXT: vmovgt.f64 d16, d17
381 ; ARMV7-NEXT: vmov r0, r1, d16
382 ; ARMV7-NEXT: bx lr
383 ;
384 ; ARMV8-LABEL: fmaxnum64_intrinsic:
385 ; ARMV8: @ %bb.0:
386 ; ARMV8-NEXT: vmov d16, r2, r3
387 ; ARMV8-NEXT: vmov d17, r0, r1
388 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
389 ; ARMV8-NEXT: vmov r0, r1, d16
390 ; ARMV8-NEXT: bx lr
391 ;
392 ; ARMV8M-LABEL: fmaxnum64_intrinsic:
393 ; ARMV8M: @ %bb.0:
394 ; ARMV8M-NEXT: vmov d0, r2, r3
395 ; ARMV8M-NEXT: vmov d1, r0, r1
396 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
397 ; ARMV8M-NEXT: vmov r0, r1, d0
398 ; ARMV8M-NEXT: bx lr
399 %a = call nnan double @llvm.maxnum.f64(double %x, double %y)
400 ret double %a
401 }
403 define double@fmaxnum64_nsz_intrinsic(double %x, double %y) {
404 ; ARMV7-LABEL: fmaxnum64_nsz_intrinsic:
405 ; ARMV7: @ %bb.0:
406 ; ARMV7-NEXT: vmov d16, r2, r3
407 ; ARMV7-NEXT: vmov d17, r0, r1
408 ; ARMV7-NEXT: vcmp.f64 d17, d16
409 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
410 ; ARMV7-NEXT: vmovgt.f64 d16, d17
411 ; ARMV7-NEXT: vmov r0, r1, d16
412 ; ARMV7-NEXT: bx lr
413 ;
414 ; ARMV8-LABEL: fmaxnum64_nsz_intrinsic:
415 ; ARMV8: @ %bb.0:
416 ; ARMV8-NEXT: vmov d16, r2, r3
417 ; ARMV8-NEXT: vmov d17, r0, r1
418 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
419 ; ARMV8-NEXT: vmov r0, r1, d16
420 ; ARMV8-NEXT: bx lr
421 ;
422 ; ARMV8M-LABEL: fmaxnum64_nsz_intrinsic:
423 ; ARMV8M: @ %bb.0:
424 ; ARMV8M-NEXT: vmov d0, r2, r3
425 ; ARMV8M-NEXT: vmov d1, r0, r1
426 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
427 ; ARMV8M-NEXT: vmov r0, r1, d0
428 ; ARMV8M-NEXT: bx lr
429 %a = call nnan nsz double @llvm.maxnum.f64(double %x, double %y)
430 ret double %a
431 }
433 define double @fmaxnum64_zero_intrinsic(double %x) {
434 ; ARMV7-LABEL: fmaxnum64_zero_intrinsic:
435 ; ARMV7: @ %bb.0:
436 ; ARMV7-NEXT: vmov d17, r0, r1
437 ; ARMV7-NEXT: vcmp.f64 d17, #0
438 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
439 ; ARMV7-NEXT: vmov.i32 d16, #0x0
440 ; ARMV7-NEXT: vmovgt.f64 d16, d17
441 ; ARMV7-NEXT: vmov r0, r1, d16
442 ; ARMV7-NEXT: bx lr
443 ;
444 ; ARMV8-LABEL: fmaxnum64_zero_intrinsic:
445 ; ARMV8: @ %bb.0:
446 ; ARMV8-NEXT: vmov.i32 d16, #0x0
447 ; ARMV8-NEXT: vmov d17, r0, r1
448 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
449 ; ARMV8-NEXT: vmov r0, r1, d16
450 ; ARMV8-NEXT: bx lr
451 ;
452 ; ARMV8M-LABEL: fmaxnum64_zero_intrinsic:
453 ; ARMV8M: @ %bb.0:
454 ; ARMV8M-NEXT: vldr d0, .LCPI13_0
455 ; ARMV8M-NEXT: vmov d1, r0, r1
456 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
457 ; ARMV8M-NEXT: vmov r0, r1, d0
458 ; ARMV8M-NEXT: bx lr
459 ; ARMV8M-NEXT: .p2align 3
460 ; ARMV8M-NEXT: @ %bb.1:
461 ; ARMV8M-NEXT: .LCPI13_0:
462 ; ARMV8M-NEXT: .long 0 @ double 0
463 ; ARMV8M-NEXT: .long 0
464 %a = call nnan double @llvm.maxnum.f64(double %x, double 0.0)
465 ret double %a
466 }
468 define double @fmaxnum64_non_zero_intrinsic(double %x) {
469 ; ARMV7-LABEL: fmaxnum64_non_zero_intrinsic:
470 ; ARMV7: @ %bb.0:
471 ; ARMV7-NEXT: vmov.f64 d16, #1.000000e+00
472 ; ARMV7-NEXT: vmov d17, r0, r1
473 ; ARMV7-NEXT: vcmp.f64 d17, d16
474 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
475 ; ARMV7-NEXT: vmovgt.f64 d16, d17
476 ; ARMV7-NEXT: vmov r0, r1, d16
477 ; ARMV7-NEXT: bx lr
478 ;
479 ; ARMV8-LABEL: fmaxnum64_non_zero_intrinsic:
480 ; ARMV8: @ %bb.0:
481 ; ARMV8-NEXT: vmov.f64 d16, #1.000000e+00
482 ; ARMV8-NEXT: vmov d17, r0, r1
483 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
484 ; ARMV8-NEXT: vmov r0, r1, d16
485 ; ARMV8-NEXT: bx lr
486 ;
487 ; ARMV8M-LABEL: fmaxnum64_non_zero_intrinsic:
488 ; ARMV8M: @ %bb.0:
489 ; ARMV8M-NEXT: vmov.f64 d0, #1.000000e+00
490 ; ARMV8M-NEXT: vmov d1, r0, r1
491 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
492 ; ARMV8M-NEXT: vmov r0, r1, d0
493 ; ARMV8M-NEXT: bx lr
494 %a = call nnan double @llvm.maxnum.f64(double %x, double 1.0)
495 ret double %a
496 }
498 define <4 x float> @fminnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
499 ; ARMV7-LABEL: fminnumv432_intrinsic:
500 ; ARMV7: @ %bb.0:
501 ; ARMV7-NEXT: mov r12, sp
502 ; ARMV7-NEXT: vld1.64 {d0, d1}, [r12]
503 ; ARMV7-NEXT: vmov d3, r2, r3
504 ; ARMV7-NEXT: vmov d2, r0, r1
505 ; ARMV7-NEXT: vcmp.f32 s7, s3
506 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
507 ; ARMV7-NEXT: vcmp.f32 s6, s2
508 ; ARMV7-NEXT: vmovlt.f32 s3, s7
509 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
510 ; ARMV7-NEXT: vcmp.f32 s5, s1
511 ; ARMV7-NEXT: vmovlt.f32 s2, s6
512 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
513 ; ARMV7-NEXT: vcmp.f32 s4, s0
514 ; ARMV7-NEXT: vmovlt.f32 s1, s5
515 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
516 ; ARMV7-NEXT: vmovlt.f32 s0, s4
517 ; ARMV7-NEXT: vmov r2, r3, d1
518 ; ARMV7-NEXT: vmov r0, r1, d0
519 ; ARMV7-NEXT: bx lr
520 ;
521 ; ARMV8-LABEL: fminnumv432_intrinsic:
522 ; ARMV8: @ %bb.0:
523 ; ARMV8-NEXT: vmov d17, r2, r3
524 ; ARMV8-NEXT: vmov d16, r0, r1
525 ; ARMV8-NEXT: mov r0, sp
526 ; ARMV8-NEXT: vld1.64 {d18, d19}, [r0]
527 ; ARMV8-NEXT: vminnm.f32 q8, q8, q9
528 ; ARMV8-NEXT: vmov r0, r1, d16
529 ; ARMV8-NEXT: vmov r2, r3, d17
530 ; ARMV8-NEXT: bx lr
531 ;
532 ; ARMV8M-LABEL: fminnumv432_intrinsic:
533 ; ARMV8M: @ %bb.0:
534 ; ARMV8M-NEXT: vmov d0, r0, r1
535 ; ARMV8M-NEXT: mov r0, sp
536 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
537 ; ARMV8M-NEXT: vmov d1, r2, r3
538 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
539 ; ARMV8M-NEXT: vmov r0, r1, d0
540 ; ARMV8M-NEXT: vmov r2, r3, d1
541 ; ARMV8M-NEXT: bx lr
542 %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
543 ret <4 x float> %a
544 }
546 define <4 x float> @fminnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
547 ; ARMV7-LABEL: fminnumv432_nsz_intrinsic:
548 ; ARMV7: @ %bb.0:
549 ; ARMV7-NEXT: vmov d17, r2, r3
550 ; ARMV7-NEXT: vmov d16, r0, r1
551 ; ARMV7-NEXT: mov r0, sp
552 ; ARMV7-NEXT: vld1.64 {d18, d19}, [r0]
553 ; ARMV7-NEXT: vmin.f32 q8, q8, q9
554 ; ARMV7-NEXT: vmov r0, r1, d16
555 ; ARMV7-NEXT: vmov r2, r3, d17
556 ; ARMV7-NEXT: bx lr
557 ;
558 ; ARMV8-LABEL: fminnumv432_nsz_intrinsic:
559 ; ARMV8: @ %bb.0:
560 ; ARMV8-NEXT: vmov d17, r2, r3
561 ; ARMV8-NEXT: vmov d16, r0, r1
562 ; ARMV8-NEXT: mov r0, sp
563 ; ARMV8-NEXT: vld1.64 {d18, d19}, [r0]
564 ; ARMV8-NEXT: vminnm.f32 q8, q8, q9
565 ; ARMV8-NEXT: vmov r0, r1, d16
566 ; ARMV8-NEXT: vmov r2, r3, d17
567 ; ARMV8-NEXT: bx lr
568 ;
569 ; ARMV8M-LABEL: fminnumv432_nsz_intrinsic:
570 ; ARMV8M: @ %bb.0:
571 ; ARMV8M-NEXT: vmov d0, r0, r1
572 ; ARMV8M-NEXT: mov r0, sp
573 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
574 ; ARMV8M-NEXT: vmov d1, r2, r3
575 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
576 ; ARMV8M-NEXT: vmov r0, r1, d0
577 ; ARMV8M-NEXT: vmov r2, r3, d1
578 ; ARMV8M-NEXT: bx lr
579 %a = call nnan nsz <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
580 ret <4 x float> %a
581 }
583 define <4 x float> @fminnumv432_non_zero_intrinsic(<4 x float> %x) {
584 ; ARMV7-LABEL: fminnumv432_non_zero_intrinsic:
585 ; ARMV7: @ %bb.0:
586 ; ARMV7-NEXT: vmov d19, r2, r3
587 ; ARMV7-NEXT: vmov.f32 q8, #-1.000000e+00
588 ; ARMV7-NEXT: vmov d18, r0, r1
589 ; ARMV7-NEXT: vmin.f32 q8, q9, q8
590 ; ARMV7-NEXT: vmov r0, r1, d16
591 ; ARMV7-NEXT: vmov r2, r3, d17
592 ; ARMV7-NEXT: bx lr
593 ;
594 ; ARMV8-LABEL: fminnumv432_non_zero_intrinsic:
595 ; ARMV8: @ %bb.0:
596 ; ARMV8-NEXT: vmov d17, r2, r3
597 ; ARMV8-NEXT: vmov d16, r0, r1
598 ; ARMV8-NEXT: vmov.f32 q9, #-1.000000e+00
599 ; ARMV8-NEXT: vminnm.f32 q8, q8, q9
600 ; ARMV8-NEXT: vmov r0, r1, d16
601 ; ARMV8-NEXT: vmov r2, r3, d17
602 ; ARMV8-NEXT: bx lr
603 ;
604 ; ARMV8M-LABEL: fminnumv432_non_zero_intrinsic:
605 ; ARMV8M: @ %bb.0:
606 ; ARMV8M-NEXT: vmov d1, r2, r3
607 ; ARMV8M-NEXT: vmov.f32 q1, #-1.000000e+00
608 ; ARMV8M-NEXT: vmov d0, r0, r1
609 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
610 ; ARMV8M-NEXT: vmov r0, r1, d0
611 ; ARMV8M-NEXT: vmov r2, r3, d1
612 ; ARMV8M-NEXT: bx lr
613 %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float -1.0, float -1.0, float -1.0>)
614 ret <4 x float> %a
615 }
617 define <4 x float> @fminnumv432_one_zero_intrinsic(<4 x float> %x) {
618 ; ARMV7-LABEL: fminnumv432_one_zero_intrinsic:
619 ; ARMV7: @ %bb.0:
620 ; ARMV7-NEXT: vmov d3, r2, r3
621 ; ARMV7-NEXT: vmov d2, r0, r1
622 ; ARMV7-NEXT: vmov.f32 s0, #-1.000000e+00
623 ; ARMV7-NEXT: vcmp.f32 s5, #0
624 ; ARMV7-NEXT: vldr s1, .LCPI18_0
625 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
626 ; ARMV7-NEXT: vcmp.f32 s7, s0
627 ; ARMV7-NEXT: vmovlt.f32 s1, s5
628 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
629 ; ARMV7-NEXT: vmov.f32 s3, s0
630 ; ARMV7-NEXT: vcmp.f32 s6, s0
631 ; ARMV7-NEXT: vmovlt.f32 s3, s7
632 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
633 ; ARMV7-NEXT: vmov.f32 s2, s0
634 ; ARMV7-NEXT: vcmp.f32 s4, s0
635 ; ARMV7-NEXT: vmovlt.f32 s2, s6
636 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
637 ; ARMV7-NEXT: vmovlt.f32 s0, s4
638 ; ARMV7-NEXT: vmov r2, r3, d1
639 ; ARMV7-NEXT: vmov r0, r1, d0
640 ; ARMV7-NEXT: bx lr
641 ; ARMV7-NEXT: .p2align 2
642 ; ARMV7-NEXT: @ %bb.1:
643 ; ARMV7-NEXT: .LCPI18_0:
644 ; ARMV7-NEXT: .long 0x00000000 @ float 0
645 ;
646 ; ARMV8-LABEL: fminnumv432_one_zero_intrinsic:
647 ; ARMV8: @ %bb.0:
648 ; ARMV8-NEXT: vmov d17, r2, r3
649 ; ARMV8-NEXT: vmov d16, r0, r1
650 ; ARMV8-NEXT: adr r0, .LCPI18_0
651 ; ARMV8-NEXT: vld1.64 {d18, d19}, [r0:128]
652 ; ARMV8-NEXT: vminnm.f32 q8, q8, q9
653 ; ARMV8-NEXT: vmov r0, r1, d16
654 ; ARMV8-NEXT: vmov r2, r3, d17
655 ; ARMV8-NEXT: bx lr
656 ; ARMV8-NEXT: .p2align 4
657 ; ARMV8-NEXT: @ %bb.1:
658 ; ARMV8-NEXT: .LCPI18_0:
659 ; ARMV8-NEXT: .long 0xbf800000 @ float -1
660 ; ARMV8-NEXT: .long 0x00000000 @ float 0
661 ; ARMV8-NEXT: .long 0xbf800000 @ float -1
662 ; ARMV8-NEXT: .long 0xbf800000 @ float -1
663 ;
664 ; ARMV8M-LABEL: fminnumv432_one_zero_intrinsic:
665 ; ARMV8M: @ %bb.0:
666 ; ARMV8M-NEXT: vmov d0, r0, r1
667 ; ARMV8M-NEXT: adr r0, .LCPI18_0
668 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
669 ; ARMV8M-NEXT: vmov d1, r2, r3
670 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
671 ; ARMV8M-NEXT: vmov r0, r1, d0
672 ; ARMV8M-NEXT: vmov r2, r3, d1
673 ; ARMV8M-NEXT: bx lr
674 ; ARMV8M-NEXT: .p2align 4
675 ; ARMV8M-NEXT: @ %bb.1:
676 ; ARMV8M-NEXT: .LCPI18_0:
677 ; ARMV8M-NEXT: .long 0xbf800000 @ float -1
678 ; ARMV8M-NEXT: .long 0x00000000 @ float 0
679 ; ARMV8M-NEXT: .long 0xbf800000 @ float -1
680 ; ARMV8M-NEXT: .long 0xbf800000 @ float -1
681 %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float 0.0, float -1.0, float -1.0>)
682 ret <4 x float> %a
683 }
685 define <4 x float> @fmaxnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
686 ; ARMV7-LABEL: fmaxnumv432_intrinsic:
687 ; ARMV7: @ %bb.0:
688 ; ARMV7-NEXT: mov r12, sp
689 ; ARMV7-NEXT: vld1.64 {d0, d1}, [r12]
690 ; ARMV7-NEXT: vmov d3, r2, r3
691 ; ARMV7-NEXT: vmov d2, r0, r1
692 ; ARMV7-NEXT: vcmp.f32 s7, s3
693 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
694 ; ARMV7-NEXT: vcmp.f32 s6, s2
695 ; ARMV7-NEXT: vmovgt.f32 s3, s7
696 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
697 ; ARMV7-NEXT: vcmp.f32 s5, s1
698 ; ARMV7-NEXT: vmovgt.f32 s2, s6
699 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
700 ; ARMV7-NEXT: vcmp.f32 s4, s0
701 ; ARMV7-NEXT: vmovgt.f32 s1, s5
702 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
703 ; ARMV7-NEXT: vmovgt.f32 s0, s4
704 ; ARMV7-NEXT: vmov r2, r3, d1
705 ; ARMV7-NEXT: vmov r0, r1, d0
706 ; ARMV7-NEXT: bx lr
707 ;
708 ; ARMV8-LABEL: fmaxnumv432_intrinsic:
709 ; ARMV8: @ %bb.0:
710 ; ARMV8-NEXT: vmov d17, r2, r3
711 ; ARMV8-NEXT: vmov d16, r0, r1
712 ; ARMV8-NEXT: mov r0, sp
713 ; ARMV8-NEXT: vld1.64 {d18, d19}, [r0]
714 ; ARMV8-NEXT: vmaxnm.f32 q8, q8, q9
715 ; ARMV8-NEXT: vmov r0, r1, d16
716 ; ARMV8-NEXT: vmov r2, r3, d17
717 ; ARMV8-NEXT: bx lr
718 ;
719 ; ARMV8M-LABEL: fmaxnumv432_intrinsic:
720 ; ARMV8M: @ %bb.0:
721 ; ARMV8M-NEXT: vmov d0, r0, r1
722 ; ARMV8M-NEXT: mov r0, sp
723 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
724 ; ARMV8M-NEXT: vmov d1, r2, r3
725 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
726 ; ARMV8M-NEXT: vmov r0, r1, d0
727 ; ARMV8M-NEXT: vmov r2, r3, d1
728 ; ARMV8M-NEXT: bx lr
729 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
730 ret <4 x float> %a
731 }
733 define <4 x float> @fmaxnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
734 ; ARMV7-LABEL: fmaxnumv432_nsz_intrinsic:
735 ; ARMV7: @ %bb.0:
736 ; ARMV7-NEXT: vmov d17, r2, r3
737 ; ARMV7-NEXT: vmov d16, r0, r1
738 ; ARMV7-NEXT: mov r0, sp
739 ; ARMV7-NEXT: vld1.64 {d18, d19}, [r0]
740 ; ARMV7-NEXT: vmax.f32 q8, q8, q9
741 ; ARMV7-NEXT: vmov r0, r1, d16
742 ; ARMV7-NEXT: vmov r2, r3, d17
743 ; ARMV7-NEXT: bx lr
744 ;
745 ; ARMV8-LABEL: fmaxnumv432_nsz_intrinsic:
746 ; ARMV8: @ %bb.0:
747 ; ARMV8-NEXT: vmov d17, r2, r3
748 ; ARMV8-NEXT: vmov d16, r0, r1
749 ; ARMV8-NEXT: mov r0, sp
750 ; ARMV8-NEXT: vld1.64 {d18, d19}, [r0]
751 ; ARMV8-NEXT: vmaxnm.f32 q8, q8, q9
752 ; ARMV8-NEXT: vmov r0, r1, d16
753 ; ARMV8-NEXT: vmov r2, r3, d17
754 ; ARMV8-NEXT: bx lr
755 ;
756 ; ARMV8M-LABEL: fmaxnumv432_nsz_intrinsic:
757 ; ARMV8M: @ %bb.0:
758 ; ARMV8M-NEXT: vmov d0, r0, r1
759 ; ARMV8M-NEXT: mov r0, sp
760 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
761 ; ARMV8M-NEXT: vmov d1, r2, r3
762 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
763 ; ARMV8M-NEXT: vmov r0, r1, d0
764 ; ARMV8M-NEXT: vmov r2, r3, d1
765 ; ARMV8M-NEXT: bx lr
766 %a = call nnan nsz <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
767 ret <4 x float> %a
768 }
770 define <4 x float> @fmaxnumv432_zero_intrinsic(<4 x float> %x) {
771 ; ARMV7-LABEL: fmaxnumv432_zero_intrinsic:
772 ; ARMV7: @ %bb.0:
773 ; ARMV7-NEXT: vmov d3, r2, r3
774 ; ARMV7-NEXT: vldr s0, .LCPI21_0
775 ; ARMV7-NEXT: vmov d2, r0, r1
776 ; ARMV7-NEXT: vcmp.f32 s7, #0
777 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
778 ; ARMV7-NEXT: vmov.f32 s3, s0
779 ; ARMV7-NEXT: vcmp.f32 s6, #0
780 ; ARMV7-NEXT: vmovgt.f32 s3, s7
781 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
782 ; ARMV7-NEXT: vmov.f32 s2, s0
783 ; ARMV7-NEXT: vcmp.f32 s5, #0
784 ; ARMV7-NEXT: vmovgt.f32 s2, s6
785 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
786 ; ARMV7-NEXT: vmov.f32 s1, s0
787 ; ARMV7-NEXT: vcmp.f32 s4, #0
788 ; ARMV7-NEXT: vmovgt.f32 s1, s5
789 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
790 ; ARMV7-NEXT: vmovgt.f32 s0, s4
791 ; ARMV7-NEXT: vmov r2, r3, d1
792 ; ARMV7-NEXT: vmov r0, r1, d0
793 ; ARMV7-NEXT: bx lr
794 ; ARMV7-NEXT: .p2align 2
795 ; ARMV7-NEXT: @ %bb.1:
796 ; ARMV7-NEXT: .LCPI21_0:
797 ; ARMV7-NEXT: .long 0x00000000 @ float 0
798 ;
799 ; ARMV8-LABEL: fmaxnumv432_zero_intrinsic:
800 ; ARMV8: @ %bb.0:
801 ; ARMV8-NEXT: vmov d17, r2, r3
802 ; ARMV8-NEXT: vmov d16, r0, r1
803 ; ARMV8-NEXT: vmov.i32 q9, #0x0
804 ; ARMV8-NEXT: vmaxnm.f32 q8, q8, q9
805 ; ARMV8-NEXT: vmov r0, r1, d16
806 ; ARMV8-NEXT: vmov r2, r3, d17
807 ; ARMV8-NEXT: bx lr
808 ;
809 ; ARMV8M-LABEL: fmaxnumv432_zero_intrinsic:
810 ; ARMV8M: @ %bb.0:
811 ; ARMV8M-NEXT: vmov d1, r2, r3
812 ; ARMV8M-NEXT: vmov.i32 q1, #0x0
813 ; ARMV8M-NEXT: vmov d0, r0, r1
814 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
815 ; ARMV8M-NEXT: vmov r0, r1, d0
816 ; ARMV8M-NEXT: vmov r2, r3, d1
817 ; ARMV8M-NEXT: bx lr
818 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 0.0, float 0.0, float 0.0, float 0.0>)
819 ret <4 x float> %a
820 }
822 define <4 x float> @fmaxnumv432_minus_zero_intrinsic(<4 x float> %x) {
823 ; ARMV7-LABEL: fmaxnumv432_minus_zero_intrinsic:
824 ; ARMV7: @ %bb.0:
825 ; ARMV7-NEXT: vldr s0, .LCPI22_0
826 ; ARMV7-NEXT: vmov d3, r2, r3
827 ; ARMV7-NEXT: vmov d2, r0, r1
828 ; ARMV7-NEXT: vcmp.f32 s7, s0
829 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
830 ; ARMV7-NEXT: vmov.f32 s3, s0
831 ; ARMV7-NEXT: vcmp.f32 s6, s0
832 ; ARMV7-NEXT: vmovgt.f32 s3, s7
833 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
834 ; ARMV7-NEXT: vmov.f32 s2, s0
835 ; ARMV7-NEXT: vcmp.f32 s5, s0
836 ; ARMV7-NEXT: vmovgt.f32 s2, s6
837 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
838 ; ARMV7-NEXT: vmov.f32 s1, s0
839 ; ARMV7-NEXT: vcmp.f32 s4, s0
840 ; ARMV7-NEXT: vmovgt.f32 s1, s5
841 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
842 ; ARMV7-NEXT: vmovgt.f32 s0, s4
843 ; ARMV7-NEXT: vmov r2, r3, d1
844 ; ARMV7-NEXT: vmov r0, r1, d0
845 ; ARMV7-NEXT: bx lr
846 ; ARMV7-NEXT: .p2align 2
847 ; ARMV7-NEXT: @ %bb.1:
848 ; ARMV7-NEXT: .LCPI22_0:
849 ; ARMV7-NEXT: .long 0x80000000 @ float -0
850 ;
851 ; ARMV8-LABEL: fmaxnumv432_minus_zero_intrinsic:
852 ; ARMV8: @ %bb.0:
853 ; ARMV8-NEXT: vmov d17, r2, r3
854 ; ARMV8-NEXT: vmov d16, r0, r1
855 ; ARMV8-NEXT: vmov.i32 q9, #0x80000000
856 ; ARMV8-NEXT: vmaxnm.f32 q8, q8, q9
857 ; ARMV8-NEXT: vmov r0, r1, d16
858 ; ARMV8-NEXT: vmov r2, r3, d17
859 ; ARMV8-NEXT: bx lr
860 ;
861 ; ARMV8M-LABEL: fmaxnumv432_minus_zero_intrinsic:
862 ; ARMV8M: @ %bb.0:
863 ; ARMV8M-NEXT: vmov d1, r2, r3
864 ; ARMV8M-NEXT: vmov.i32 q1, #0x80000000
865 ; ARMV8M-NEXT: vmov d0, r0, r1
866 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
867 ; ARMV8M-NEXT: vmov r0, r1, d0
868 ; ARMV8M-NEXT: vmov r2, r3, d1
869 ; ARMV8M-NEXT: bx lr
870 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float -0.0, float -0.0, float -0.0, float -0.0>)
871 ret <4 x float> %a
872 }
874 define <4 x float> @fmaxnumv432_non_zero_intrinsic(<4 x float> %x) {
875 ; ARMV7-LABEL: fmaxnumv432_non_zero_intrinsic:
876 ; ARMV7: @ %bb.0:
877 ; ARMV7-NEXT: vmov d19, r2, r3
878 ; ARMV7-NEXT: vmov.f32 q8, #1.000000e+00
879 ; ARMV7-NEXT: vmov d18, r0, r1
880 ; ARMV7-NEXT: vmax.f32 q8, q9, q8
881 ; ARMV7-NEXT: vmov r0, r1, d16
882 ; ARMV7-NEXT: vmov r2, r3, d17
883 ; ARMV7-NEXT: bx lr
884 ;
885 ; ARMV8-LABEL: fmaxnumv432_non_zero_intrinsic:
886 ; ARMV8: @ %bb.0:
887 ; ARMV8-NEXT: vmov d17, r2, r3
888 ; ARMV8-NEXT: vmov d16, r0, r1
889 ; ARMV8-NEXT: vmov.f32 q9, #1.000000e+00
890 ; ARMV8-NEXT: vmaxnm.f32 q8, q8, q9
891 ; ARMV8-NEXT: vmov r0, r1, d16
892 ; ARMV8-NEXT: vmov r2, r3, d17
893 ; ARMV8-NEXT: bx lr
894 ;
895 ; ARMV8M-LABEL: fmaxnumv432_non_zero_intrinsic:
896 ; ARMV8M: @ %bb.0:
897 ; ARMV8M-NEXT: vmov d1, r2, r3
898 ; ARMV8M-NEXT: vmov.f32 q1, #1.000000e+00
899 ; ARMV8M-NEXT: vmov d0, r0, r1
900 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
901 ; ARMV8M-NEXT: vmov r0, r1, d0
902 ; ARMV8M-NEXT: vmov r2, r3, d1
903 ; ARMV8M-NEXT: bx lr
904 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 1.0, float 1.0, float 1.0, float 1.0>)
905 ret <4 x float> %a
906 }
908 define <2 x double> @fminnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
909 ; ARMV7-LABEL: fminnumv264_intrinsic:
910 ; ARMV7: @ %bb.0:
911 ; ARMV7-NEXT: mov r12, sp
912 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
913 ; ARMV7-NEXT: vmov d18, r0, r1
914 ; ARMV7-NEXT: vcmp.f64 d18, d16
915 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
916 ; ARMV7-NEXT: vmov d19, r2, r3
917 ; ARMV7-NEXT: vcmp.f64 d19, d17
918 ; ARMV7-NEXT: vmovlt.f64 d16, d18
919 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
920 ; ARMV7-NEXT: vmov r0, r1, d16
921 ; ARMV7-NEXT: vmovlt.f64 d17, d19
922 ; ARMV7-NEXT: vmov r2, r3, d17
923 ; ARMV7-NEXT: bx lr
924 ;
925 ; ARMV8-LABEL: fminnumv264_intrinsic:
926 ; ARMV8: @ %bb.0:
927 ; ARMV8-NEXT: mov r12, sp
928 ; ARMV8-NEXT: vld1.64 {d16, d17}, [r12]
929 ; ARMV8-NEXT: vmov d18, r0, r1
930 ; ARMV8-NEXT: vmov d19, r2, r3
931 ; ARMV8-NEXT: vcmp.f64 d16, d18
932 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
933 ; ARMV8-NEXT: vcmp.f64 d17, d19
934 ; ARMV8-NEXT: vselgt.f64 d18, d18, d16
935 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
936 ; ARMV8-NEXT: vmov r0, r1, d18
937 ; ARMV8-NEXT: vselgt.f64 d16, d19, d17
938 ; ARMV8-NEXT: vmov r2, r3, d16
939 ; ARMV8-NEXT: bx lr
940 ;
941 ; ARMV8M-LABEL: fminnumv264_intrinsic:
942 ; ARMV8M: @ %bb.0:
943 ; ARMV8M-NEXT: mov r12, sp
944 ; ARMV8M-NEXT: vmov d0, r0, r1
945 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
946 ; ARMV8M-NEXT: vmov d1, r2, r3
947 ; ARMV8M-NEXT: vcmp.f64 d2, d0
948 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
949 ; ARMV8M-NEXT: vcmp.f64 d3, d1
950 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d2
951 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
952 ; ARMV8M-NEXT: vmov r0, r1, d0
953 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d3
954 ; ARMV8M-NEXT: vmov r2, r3, d1
955 ; ARMV8M-NEXT: bx lr
956 %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
957 ret <2 x double> %a
958 }
960 define <2 x double> @fminnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
961 ; ARMV7-LABEL: fminnumv264_nsz_intrinsic:
962 ; ARMV7: @ %bb.0:
963 ; ARMV7-NEXT: mov r12, sp
964 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
965 ; ARMV7-NEXT: vmov d18, r0, r1
966 ; ARMV7-NEXT: vcmp.f64 d18, d16
967 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
968 ; ARMV7-NEXT: vmov d19, r2, r3
969 ; ARMV7-NEXT: vcmp.f64 d19, d17
970 ; ARMV7-NEXT: vmovlt.f64 d16, d18
971 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
972 ; ARMV7-NEXT: vmov r0, r1, d16
973 ; ARMV7-NEXT: vmovlt.f64 d17, d19
974 ; ARMV7-NEXT: vmov r2, r3, d17
975 ; ARMV7-NEXT: bx lr
976 ;
977 ; ARMV8-LABEL: fminnumv264_nsz_intrinsic:
978 ; ARMV8: @ %bb.0:
979 ; ARMV8-NEXT: mov r12, sp
980 ; ARMV8-NEXT: vld1.64 {d16, d17}, [r12]
981 ; ARMV8-NEXT: vmov d18, r0, r1
982 ; ARMV8-NEXT: vmov d19, r2, r3
983 ; ARMV8-NEXT: vcmp.f64 d16, d18
984 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
985 ; ARMV8-NEXT: vcmp.f64 d17, d19
986 ; ARMV8-NEXT: vselgt.f64 d18, d18, d16
987 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
988 ; ARMV8-NEXT: vmov r0, r1, d18
989 ; ARMV8-NEXT: vselgt.f64 d16, d19, d17
990 ; ARMV8-NEXT: vmov r2, r3, d16
991 ; ARMV8-NEXT: bx lr
992 ;
993 ; ARMV8M-LABEL: fminnumv264_nsz_intrinsic:
994 ; ARMV8M: @ %bb.0:
995 ; ARMV8M-NEXT: mov r12, sp
996 ; ARMV8M-NEXT: vmov d0, r0, r1
997 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
998 ; ARMV8M-NEXT: vmov d1, r2, r3
999 ; ARMV8M-NEXT: vcmp.f64 d2, d0
1000 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1001 ; ARMV8M-NEXT: vcmp.f64 d3, d1
1002 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d2
1003 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1004 ; ARMV8M-NEXT: vmov r0, r1, d0
1005 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d3
1006 ; ARMV8M-NEXT: vmov r2, r3, d1
1007 ; ARMV8M-NEXT: bx lr
1008 %a = call nnan nsz <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
1009 ret <2 x double> %a
1010 }
1012 define <2 x double> @fminnumv264_non_zero_intrinsic(<2 x double> %x) {
1013 ; ARMV7-LABEL: fminnumv264_non_zero_intrinsic:
1014 ; ARMV7: @ %bb.0:
1015 ; ARMV7-NEXT: vmov.f64 d16, #1.000000e+00
1016 ; ARMV7-NEXT: vmov d17, r0, r1
1017 ; ARMV7-NEXT: vcmp.f64 d17, d16
1018 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1019 ; ARMV7-NEXT: vmov d18, r2, r3
1020 ; ARMV7-NEXT: vcmp.f64 d18, d16
1021 ; ARMV7-NEXT: vmov.f64 d19, d16
1022 ; ARMV7-NEXT: vmovlt.f64 d19, d17
1023 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1024 ; ARMV7-NEXT: vmov r0, r1, d19
1025 ; ARMV7-NEXT: vmovlt.f64 d16, d18
1026 ; ARMV7-NEXT: vmov r2, r3, d16
1027 ; ARMV7-NEXT: bx lr
1028 ;
1029 ; ARMV8-LABEL: fminnumv264_non_zero_intrinsic:
1030 ; ARMV8: @ %bb.0:
1031 ; ARMV8-NEXT: vmov d17, r0, r1
1032 ; ARMV8-NEXT: vmov.f64 d16, #1.000000e+00
1033 ; ARMV8-NEXT: vcmp.f64 d16, d17
1034 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1035 ; ARMV8-NEXT: vmov d18, r2, r3
1036 ; ARMV8-NEXT: vcmp.f64 d16, d18
1037 ; ARMV8-NEXT: vselgt.f64 d17, d17, d16
1038 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1039 ; ARMV8-NEXT: vmov r0, r1, d17
1040 ; ARMV8-NEXT: vselgt.f64 d16, d18, d16
1041 ; ARMV8-NEXT: vmov r2, r3, d16
1042 ; ARMV8-NEXT: bx lr
1043 ;
1044 ; ARMV8M-LABEL: fminnumv264_non_zero_intrinsic:
1045 ; ARMV8M: @ %bb.0:
1046 ; ARMV8M-NEXT: vmov d1, r0, r1
1047 ; ARMV8M-NEXT: vmov.f64 d0, #1.000000e+00
1048 ; ARMV8M-NEXT: vcmp.f64 d0, d1
1049 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1050 ; ARMV8M-NEXT: vmov d2, r2, r3
1051 ; ARMV8M-NEXT: vcmp.f64 d0, d2
1052 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d0
1053 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1054 ; ARMV8M-NEXT: vmov r0, r1, d1
1055 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1056 ; ARMV8M-NEXT: vmov r2, r3, d0
1057 ; ARMV8M-NEXT: bx lr
1058 %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1059 ret <2 x double> %a
1060 }
1062 define <2 x double> @fminnumv264_one_zero_intrinsic(<2 x double> %x) {
1063 ; ARMV7-LABEL: fminnumv264_one_zero_intrinsic:
1064 ; ARMV7: @ %bb.0:
1065 ; ARMV7-NEXT: vmov d18, r2, r3
1066 ; ARMV7-NEXT: vcmp.f64 d18, #0
1067 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1068 ; ARMV7-NEXT: vmov d19, r0, r1
1069 ; ARMV7-NEXT: vmov.f64 d16, #-1.000000e+00
1070 ; ARMV7-NEXT: vcmp.f64 d19, d16
1071 ; ARMV7-NEXT: vmov.i32 d17, #0x0
1072 ; ARMV7-NEXT: vmovlt.f64 d17, d18
1073 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1074 ; ARMV7-NEXT: vmov r2, r3, d17
1075 ; ARMV7-NEXT: vmovlt.f64 d16, d19
1076 ; ARMV7-NEXT: vmov r0, r1, d16
1077 ; ARMV7-NEXT: bx lr
1078 ;
1079 ; ARMV8-LABEL: fminnumv264_one_zero_intrinsic:
1080 ; ARMV8: @ %bb.0:
1081 ; ARMV8-NEXT: vmov d19, r2, r3
1082 ; ARMV8-NEXT: vcmp.f64 d19, #0
1083 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1084 ; ARMV8-NEXT: vmov d18, r0, r1
1085 ; ARMV8-NEXT: vmov.f64 d16, #-1.000000e+00
1086 ; ARMV8-NEXT: vcmp.f64 d16, d18
1087 ; ARMV8-NEXT: vmov.i32 d17, #0x0
1088 ; ARMV8-NEXT: vmovlt.f64 d17, d19
1089 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1090 ; ARMV8-NEXT: vmov r2, r3, d17
1091 ; ARMV8-NEXT: vselgt.f64 d16, d18, d16
1092 ; ARMV8-NEXT: vmov r0, r1, d16
1093 ; ARMV8-NEXT: bx lr
1094 ;
1095 ; ARMV8M-LABEL: fminnumv264_one_zero_intrinsic:
1096 ; ARMV8M: @ %bb.0:
1097 ; ARMV8M-NEXT: vmov d3, r2, r3
1098 ; ARMV8M-NEXT: vldr d1, .LCPI27_0
1099 ; ARMV8M-NEXT: vcmp.f64 d3, #0
1100 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1101 ; ARMV8M-NEXT: vmov d2, r0, r1
1102 ; ARMV8M-NEXT: vmov.f64 d0, #-1.000000e+00
1103 ; ARMV8M-NEXT: vcmp.f64 d0, d2
1104 ; ARMV8M-NEXT: vmovlt.f64 d1, d3
1105 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1106 ; ARMV8M-NEXT: vmov r2, r3, d1
1107 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1108 ; ARMV8M-NEXT: vmov r0, r1, d0
1109 ; ARMV8M-NEXT: bx lr
1110 ; ARMV8M-NEXT: .p2align 3
1111 ; ARMV8M-NEXT: @ %bb.1:
1112 ; ARMV8M-NEXT: .LCPI27_0:
1113 ; ARMV8M-NEXT: .long 0 @ double 0
1114 ; ARMV8M-NEXT: .long 0
1115 %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double -1.0, double 0.0>)
1116 ret <2 x double> %a
1117 }
1119 define <2 x double> @fmaxnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
1120 ; ARMV7-LABEL: fmaxnumv264_intrinsic:
1121 ; ARMV7: @ %bb.0:
1122 ; ARMV7-NEXT: mov r12, sp
1123 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
1124 ; ARMV7-NEXT: vmov d18, r0, r1
1125 ; ARMV7-NEXT: vcmp.f64 d18, d16
1126 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1127 ; ARMV7-NEXT: vmov d19, r2, r3
1128 ; ARMV7-NEXT: vcmp.f64 d19, d17
1129 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1130 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1131 ; ARMV7-NEXT: vmov r0, r1, d16
1132 ; ARMV7-NEXT: vmovgt.f64 d17, d19
1133 ; ARMV7-NEXT: vmov r2, r3, d17
1134 ; ARMV7-NEXT: bx lr
1135 ;
1136 ; ARMV8-LABEL: fmaxnumv264_intrinsic:
1137 ; ARMV8: @ %bb.0:
1138 ; ARMV8-NEXT: mov r12, sp
1139 ; ARMV8-NEXT: vld1.64 {d16, d17}, [r12]
1140 ; ARMV8-NEXT: vmov d18, r0, r1
1141 ; ARMV8-NEXT: vcmp.f64 d18, d16
1142 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1143 ; ARMV8-NEXT: vmov d19, r2, r3
1144 ; ARMV8-NEXT: vcmp.f64 d19, d17
1145 ; ARMV8-NEXT: vselgt.f64 d18, d18, d16
1146 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1147 ; ARMV8-NEXT: vmov r0, r1, d18
1148 ; ARMV8-NEXT: vselgt.f64 d16, d19, d17
1149 ; ARMV8-NEXT: vmov r2, r3, d16
1150 ; ARMV8-NEXT: bx lr
1151 ;
1152 ; ARMV8M-LABEL: fmaxnumv264_intrinsic:
1153 ; ARMV8M: @ %bb.0:
1154 ; ARMV8M-NEXT: mov r12, sp
1155 ; ARMV8M-NEXT: vmov d1, r0, r1
1156 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
1157 ; ARMV8M-NEXT: vmov d0, r2, r3
1158 ; ARMV8M-NEXT: vcmp.f64 d1, d2
1159 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1160 ; ARMV8M-NEXT: vcmp.f64 d0, d3
1161 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d2
1162 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1163 ; ARMV8M-NEXT: vmov r0, r1, d1
1164 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d3
1165 ; ARMV8M-NEXT: vmov r2, r3, d0
1166 ; ARMV8M-NEXT: bx lr
1167 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1168 ret <2 x double> %a
1169 }
1171 define <2 x double> @fmaxnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
1172 ; ARMV7-LABEL: fmaxnumv264_nsz_intrinsic:
1173 ; ARMV7: @ %bb.0:
1174 ; ARMV7-NEXT: mov r12, sp
1175 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
1176 ; ARMV7-NEXT: vmov d18, r0, r1
1177 ; ARMV7-NEXT: vcmp.f64 d18, d16
1178 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1179 ; ARMV7-NEXT: vmov d19, r2, r3
1180 ; ARMV7-NEXT: vcmp.f64 d19, d17
1181 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1182 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1183 ; ARMV7-NEXT: vmov r0, r1, d16
1184 ; ARMV7-NEXT: vmovgt.f64 d17, d19
1185 ; ARMV7-NEXT: vmov r2, r3, d17
1186 ; ARMV7-NEXT: bx lr
1187 ;
1188 ; ARMV8-LABEL: fmaxnumv264_nsz_intrinsic:
1189 ; ARMV8: @ %bb.0:
1190 ; ARMV8-NEXT: mov r12, sp
1191 ; ARMV8-NEXT: vld1.64 {d16, d17}, [r12]
1192 ; ARMV8-NEXT: vmov d18, r0, r1
1193 ; ARMV8-NEXT: vcmp.f64 d18, d16
1194 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1195 ; ARMV8-NEXT: vmov d19, r2, r3
1196 ; ARMV8-NEXT: vcmp.f64 d19, d17
1197 ; ARMV8-NEXT: vselgt.f64 d18, d18, d16
1198 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1199 ; ARMV8-NEXT: vmov r0, r1, d18
1200 ; ARMV8-NEXT: vselgt.f64 d16, d19, d17
1201 ; ARMV8-NEXT: vmov r2, r3, d16
1202 ; ARMV8-NEXT: bx lr
1203 ;
1204 ; ARMV8M-LABEL: fmaxnumv264_nsz_intrinsic:
1205 ; ARMV8M: @ %bb.0:
1206 ; ARMV8M-NEXT: mov r12, sp
1207 ; ARMV8M-NEXT: vmov d1, r0, r1
1208 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
1209 ; ARMV8M-NEXT: vmov d0, r2, r3
1210 ; ARMV8M-NEXT: vcmp.f64 d1, d2
1211 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1212 ; ARMV8M-NEXT: vcmp.f64 d0, d3
1213 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d2
1214 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1215 ; ARMV8M-NEXT: vmov r0, r1, d1
1216 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d3
1217 ; ARMV8M-NEXT: vmov r2, r3, d0
1218 ; ARMV8M-NEXT: bx lr
1219 %a = call nnan nsz <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1220 ret <2 x double> %a
1221 }
1223 define <2 x double> @fmaxnumv264_zero_intrinsic(<2 x double> %x) {
1224 ; ARMV7-LABEL: fmaxnumv264_zero_intrinsic:
1225 ; ARMV7: @ %bb.0:
1226 ; ARMV7-NEXT: vldr d17, .LCPI30_0
1227 ; ARMV7-NEXT: vmov d18, r2, r3
1228 ; ARMV7-NEXT: vmov d19, r0, r1
1229 ; ARMV7-NEXT: vcmp.f64 d18, d17
1230 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1231 ; ARMV7-NEXT: vmov.i32 d16, #0x0
1232 ; ARMV7-NEXT: vcmp.f64 d19, #0
1233 ; ARMV7-NEXT: vmovgt.f64 d17, d18
1234 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1235 ; ARMV7-NEXT: vmov r2, r3, d17
1236 ; ARMV7-NEXT: vmovgt.f64 d16, d19
1237 ; ARMV7-NEXT: vmov r0, r1, d16
1238 ; ARMV7-NEXT: bx lr
1239 ; ARMV7-NEXT: .p2align 3
1240 ; ARMV7-NEXT: @ %bb.1:
1241 ; ARMV7-NEXT: .LCPI30_0:
1242 ; ARMV7-NEXT: .long 0 @ double -0
1243 ; ARMV7-NEXT: .long 2147483648
1244 ;
1245 ; ARMV8-LABEL: fmaxnumv264_zero_intrinsic:
1246 ; ARMV8: @ %bb.0:
1247 ; ARMV8-NEXT: vmov d18, r0, r1
1248 ; ARMV8-NEXT: vldr d16, .LCPI30_0
1249 ; ARMV8-NEXT: vcmp.f64 d18, #0
1250 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1251 ; ARMV8-NEXT: vmov d19, r2, r3
1252 ; ARMV8-NEXT: vcmp.f64 d19, d16
1253 ; ARMV8-NEXT: vmov.i32 d17, #0x0
1254 ; ARMV8-NEXT: vselgt.f64 d17, d18, d17
1255 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1256 ; ARMV8-NEXT: vmov r0, r1, d17
1257 ; ARMV8-NEXT: vselgt.f64 d16, d19, d16
1258 ; ARMV8-NEXT: vmov r2, r3, d16
1259 ; ARMV8-NEXT: bx lr
1260 ; ARMV8-NEXT: .p2align 3
1261 ; ARMV8-NEXT: @ %bb.1:
1262 ; ARMV8-NEXT: .LCPI30_0:
1263 ; ARMV8-NEXT: .long 0 @ double -0
1264 ; ARMV8-NEXT: .long 2147483648
1265 ;
1266 ; ARMV8M-LABEL: fmaxnumv264_zero_intrinsic:
1267 ; ARMV8M: @ %bb.0:
1268 ; ARMV8M-NEXT: vmov d2, r0, r1
1269 ; ARMV8M-NEXT: vldr d0, .LCPI30_0
1270 ; ARMV8M-NEXT: vcmp.f64 d2, #0
1271 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1272 ; ARMV8M-NEXT: vmov d3, r2, r3
1273 ; ARMV8M-NEXT: vcmp.f64 d3, d0
1274 ; ARMV8M-NEXT: vldr d1, .LCPI30_1
1275 ; ARMV8M-NEXT: vselgt.f64 d1, d2, d1
1276 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1277 ; ARMV8M-NEXT: vmov r0, r1, d1
1278 ; ARMV8M-NEXT: vselgt.f64 d0, d3, d0
1279 ; ARMV8M-NEXT: vmov r2, r3, d0
1280 ; ARMV8M-NEXT: bx lr
1281 ; ARMV8M-NEXT: .p2align 3
1282 ; ARMV8M-NEXT: @ %bb.1:
1283 ; ARMV8M-NEXT: .LCPI30_0:
1284 ; ARMV8M-NEXT: .long 0 @ double -0
1285 ; ARMV8M-NEXT: .long 2147483648
1286 ; ARMV8M-NEXT: .LCPI30_1:
1287 ; ARMV8M-NEXT: .long 0 @ double 0
1288 ; ARMV8M-NEXT: .long 0
1289 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 0.0, double -0.0>)
1290 ret <2 x double> %a
1291 }
1293 define <2 x double> @fmaxnumv264_minus_zero_intrinsic(<2 x double> %x) {
1294 ; ARMV7-LABEL: fmaxnumv264_minus_zero_intrinsic:
1295 ; ARMV7: @ %bb.0:
1296 ; ARMV7-NEXT: vldr d16, .LCPI31_0
1297 ; ARMV7-NEXT: vmov d17, r0, r1
1298 ; ARMV7-NEXT: vmov d18, r2, r3
1299 ; ARMV7-NEXT: vcmp.f64 d17, d16
1300 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1301 ; ARMV7-NEXT: vcmp.f64 d18, d16
1302 ; ARMV7-NEXT: vmov.f64 d19, d16
1303 ; ARMV7-NEXT: vmovgt.f64 d19, d17
1304 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1305 ; ARMV7-NEXT: vmov r0, r1, d19
1306 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1307 ; ARMV7-NEXT: vmov r2, r3, d16
1308 ; ARMV7-NEXT: bx lr
1309 ; ARMV7-NEXT: .p2align 3
1310 ; ARMV7-NEXT: @ %bb.1:
1311 ; ARMV7-NEXT: .LCPI31_0:
1312 ; ARMV7-NEXT: .long 0 @ double -0
1313 ; ARMV7-NEXT: .long 2147483648
1314 ;
1315 ; ARMV8-LABEL: fmaxnumv264_minus_zero_intrinsic:
1316 ; ARMV8: @ %bb.0:
1317 ; ARMV8-NEXT: vldr d16, .LCPI31_0
1318 ; ARMV8-NEXT: vmov d17, r0, r1
1319 ; ARMV8-NEXT: vmov d18, r2, r3
1320 ; ARMV8-NEXT: vcmp.f64 d17, d16
1321 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1322 ; ARMV8-NEXT: vcmp.f64 d18, d16
1323 ; ARMV8-NEXT: vselgt.f64 d17, d17, d16
1324 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1325 ; ARMV8-NEXT: vmov r0, r1, d17
1326 ; ARMV8-NEXT: vselgt.f64 d16, d18, d16
1327 ; ARMV8-NEXT: vmov r2, r3, d16
1328 ; ARMV8-NEXT: bx lr
1329 ; ARMV8-NEXT: .p2align 3
1330 ; ARMV8-NEXT: @ %bb.1:
1331 ; ARMV8-NEXT: .LCPI31_0:
1332 ; ARMV8-NEXT: .long 0 @ double -0
1333 ; ARMV8-NEXT: .long 2147483648
1334 ;
1335 ; ARMV8M-LABEL: fmaxnumv264_minus_zero_intrinsic:
1336 ; ARMV8M: @ %bb.0:
1337 ; ARMV8M-NEXT: vldr d0, .LCPI31_0
1338 ; ARMV8M-NEXT: vmov d1, r0, r1
1339 ; ARMV8M-NEXT: vmov d2, r2, r3
1340 ; ARMV8M-NEXT: vcmp.f64 d1, d0
1341 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1342 ; ARMV8M-NEXT: vcmp.f64 d2, d0
1343 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d0
1344 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1345 ; ARMV8M-NEXT: vmov r0, r1, d1
1346 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1347 ; ARMV8M-NEXT: vmov r2, r3, d0
1348 ; ARMV8M-NEXT: bx lr
1349 ; ARMV8M-NEXT: .p2align 3
1350 ; ARMV8M-NEXT: @ %bb.1:
1351 ; ARMV8M-NEXT: .LCPI31_0:
1352 ; ARMV8M-NEXT: .long 0 @ double -0
1353 ; ARMV8M-NEXT: .long 2147483648
1354 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double -0.0, double -0.0>)
1355 ret <2 x double> %a
1356 }
1358 define <2 x double> @fmaxnumv264_non_zero_intrinsic(<2 x double> %x) {
1359 ; ARMV7-LABEL: fmaxnumv264_non_zero_intrinsic:
1360 ; ARMV7: @ %bb.0:
1361 ; ARMV7-NEXT: vmov.f64 d16, #1.000000e+00
1362 ; ARMV7-NEXT: vmov d17, r0, r1
1363 ; ARMV7-NEXT: vcmp.f64 d17, d16
1364 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1365 ; ARMV7-NEXT: vmov d18, r2, r3
1366 ; ARMV7-NEXT: vcmp.f64 d18, d16
1367 ; ARMV7-NEXT: vmov.f64 d19, d16
1368 ; ARMV7-NEXT: vmovgt.f64 d19, d17
1369 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1370 ; ARMV7-NEXT: vmov r0, r1, d19
1371 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1372 ; ARMV7-NEXT: vmov r2, r3, d16
1373 ; ARMV7-NEXT: bx lr
1374 ;
1375 ; ARMV8-LABEL: fmaxnumv264_non_zero_intrinsic:
1376 ; ARMV8: @ %bb.0:
1377 ; ARMV8-NEXT: vmov.f64 d16, #1.000000e+00
1378 ; ARMV8-NEXT: vmov d17, r0, r1
1379 ; ARMV8-NEXT: vcmp.f64 d17, d16
1380 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1381 ; ARMV8-NEXT: vmov d18, r2, r3
1382 ; ARMV8-NEXT: vcmp.f64 d18, d16
1383 ; ARMV8-NEXT: vselgt.f64 d17, d17, d16
1384 ; ARMV8-NEXT: vmrs APSR_nzcv, fpscr
1385 ; ARMV8-NEXT: vmov r0, r1, d17
1386 ; ARMV8-NEXT: vselgt.f64 d16, d18, d16
1387 ; ARMV8-NEXT: vmov r2, r3, d16
1388 ; ARMV8-NEXT: bx lr
1389 ;
1390 ; ARMV8M-LABEL: fmaxnumv264_non_zero_intrinsic:
1391 ; ARMV8M: @ %bb.0:
1392 ; ARMV8M-NEXT: vmov.f64 d0, #1.000000e+00
1393 ; ARMV8M-NEXT: vmov d1, r0, r1
1394 ; ARMV8M-NEXT: vcmp.f64 d1, d0
1395 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1396 ; ARMV8M-NEXT: vmov d2, r2, r3
1397 ; ARMV8M-NEXT: vcmp.f64 d2, d0
1398 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d0
1399 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1400 ; ARMV8M-NEXT: vmov r0, r1, d1
1401 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1402 ; ARMV8M-NEXT: vmov r2, r3, d0
1403 ; ARMV8M-NEXT: bx lr
1404 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1405 ret <2 x double> %a
1406 }
1408 define void @pr65820(ptr %y, <4 x float> %splat) {
1409 ; ARMV7-LABEL: pr65820:
1410 ; ARMV7: @ %bb.0: @ %entry
1411 ; ARMV7-NEXT: vmov d16, r2, r3
1412 ; ARMV7-NEXT: vdup.32 q8, d16[0]
1413 ; ARMV7-NEXT: vcgt.f32 q9, q8, #0
1414 ; ARMV7-NEXT: vand q8, q8, q9
1415 ; ARMV7-NEXT: vst1.32 {d16, d17}, [r0]
1416 ; ARMV7-NEXT: bx lr
1417 ;
1418 ; ARMV8-LABEL: pr65820:
1419 ; ARMV8: @ %bb.0: @ %entry
1420 ; ARMV8-NEXT: vmov d16, r2, r3
1421 ; ARMV8-NEXT: vmov.i32 q9, #0x0
1422 ; ARMV8-NEXT: vdup.32 q8, d16[0]
1423 ; ARMV8-NEXT: vmaxnm.f32 q8, q8, q9
1424 ; ARMV8-NEXT: vst1.32 {d16, d17}, [r0]
1425 ; ARMV8-NEXT: bx lr
1426 ;
1427 ; ARMV8M-LABEL: pr65820:
1428 ; ARMV8M: @ %bb.0: @ %entry
1429 ; ARMV8M-NEXT: vmov d0, r2, r3
1430 ; ARMV8M-NEXT: vmov r1, s0
1431 ; ARMV8M-NEXT: vmov.i32 q0, #0x0
1432 ; ARMV8M-NEXT: vdup.32 q1, r1
1433 ; ARMV8M-NEXT: vmaxnm.f32 q0, q1, q0
1434 ; ARMV8M-NEXT: vstrw.32 q0, [r0]
1435 ; ARMV8M-NEXT: bx lr
1436 entry:
1437 %broadcast.splat = shufflevector <4 x float> %splat, <4 x float> zeroinitializer, <4 x i32> zeroinitializer
1438 %0 = fcmp ogt <4 x float> %broadcast.splat, zeroinitializer
1439 %1 = select <4 x i1> %0, <4 x float> %broadcast.splat, <4 x float> zeroinitializer
1440 store <4 x float> %1, ptr %y, align 4
1441 ret void
1442 }