| blob | 9f70fd55907377fcb9b865507735c92e2ac7d6b1 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small < %s | FileCheck %s
3 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE
4 ; RUN: llc -mtriple=x86_64 -fast-isel -code-model=large -relocation-model=pic < %s | FileCheck %s --check-prefix=LARGE_PIC
5 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx < %s | FileCheck %s --check-prefix=AVX
6 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx < %s | FileCheck %s --check-prefix=LARGE_AVX
7 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx512f < %s | FileCheck %s --check-prefix=AVX
8 ; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx512f < %s | FileCheck %s --check-prefix=LARGE_AVX
10 ; This large code mode shouldn't mean anything on x86 but it used to
11 ; generate 64-bit only instructions and asserted in the encoder.
12 ; -show-mc-encoding here to assert if this breaks again.
13 ; RUN: llc -mtriple=i686-apple-darwin -fast-isel -code-model=large -mattr=sse2 -show-mc-encoding < %s | FileCheck %s --check-prefix=X86-LARGE
15 ; Make sure fast isel uses rip-relative addressing for the small code model.
16 define float @constpool_float(float %x) {
17 ; CHECK-LABEL: constpool_float:
18 ; CHECK: ## %bb.0:
19 ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
20 ; CHECK-NEXT: addss %xmm1, %xmm0
21 ; CHECK-NEXT: retq
22 ;
23 ; LARGE-LABEL: constpool_float:
24 ; LARGE: ## %bb.0:
25 ; LARGE-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
26 ; LARGE-NEXT: addss (%rax), %xmm0
27 ; LARGE-NEXT: retq
28 ;
29 ; LARGE_PIC-LABEL: constpool_float:
30 ; LARGE_PIC: # %bb.0:
31 ; LARGE_PIC-NEXT: .L0$pb:
32 ; LARGE_PIC-NEXT: leaq .L0$pb(%rip), %rax
33 ; LARGE_PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.L0$pb, %rcx
34 ; LARGE_PIC-NEXT: addq %rax, %rcx
35 ; LARGE_PIC-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}@GOTOFF, %rax
36 ; LARGE_PIC-NEXT: addss (%rax,%rcx), %xmm0
37 ; LARGE_PIC-NEXT: retq
38 ;
39 ; AVX-LABEL: constpool_float:
40 ; AVX: ## %bb.0:
41 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
42 ; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
43 ; AVX-NEXT: retq
44 ;
45 ; LARGE_AVX-LABEL: constpool_float:
46 ; LARGE_AVX: ## %bb.0:
47 ; LARGE_AVX-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
48 ; LARGE_AVX-NEXT: vaddss (%rax), %xmm0, %xmm0
49 ; LARGE_AVX-NEXT: retq
50 ;
51 ; X86-LARGE-LABEL: constpool_float:
52 ; X86-LARGE: ## %bb.0:
53 ; X86-LARGE-NEXT: pushl %eax ## encoding: [0x50]
54 ; X86-LARGE-NEXT: .cfi_def_cfa_offset 8
55 ; X86-LARGE-NEXT: movss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xf3,0x0f,0x10,0x44,0x24,0x08]
56 ; X86-LARGE-NEXT: ## xmm0 = mem[0],zero,zero,zero
57 ; X86-LARGE-NEXT: addss {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 ## encoding: [0xf3,0x0f,0x58,0x05,A,A,A,A]
58 ; X86-LARGE-NEXT: ## fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: FK_Data_4
59 ; X86-LARGE-NEXT: movss %xmm0, (%esp) ## encoding: [0xf3,0x0f,0x11,0x04,0x24]
60 ; X86-LARGE-NEXT: flds (%esp) ## encoding: [0xd9,0x04,0x24]
61 ; X86-LARGE-NEXT: popl %eax ## encoding: [0x58]
62 ; X86-LARGE-NEXT: retl ## encoding: [0xc3]
64 %1 = fadd float %x, 16.50e+01
65 ret float %1
66 }
68 define double @constpool_double(double %x) nounwind {
69 ; CHECK-LABEL: constpool_double:
70 ; CHECK: ## %bb.0:
71 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
72 ; CHECK-NEXT: addsd %xmm1, %xmm0
73 ; CHECK-NEXT: retq
74 ;
75 ; LARGE-LABEL: constpool_double:
76 ; LARGE: ## %bb.0:
77 ; LARGE-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
78 ; LARGE-NEXT: addsd (%rax), %xmm0
79 ; LARGE-NEXT: retq
80 ;
81 ; LARGE_PIC-LABEL: constpool_double:
82 ; LARGE_PIC: # %bb.0:
83 ; LARGE_PIC-NEXT: .L1$pb:
84 ; LARGE_PIC-NEXT: leaq .L1$pb(%rip), %rax
85 ; LARGE_PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.L1$pb, %rcx
86 ; LARGE_PIC-NEXT: addq %rax, %rcx
87 ; LARGE_PIC-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}@GOTOFF, %rax
88 ; LARGE_PIC-NEXT: addsd (%rax,%rcx), %xmm0
89 ; LARGE_PIC-NEXT: retq
90 ;
91 ; AVX-LABEL: constpool_double:
92 ; AVX: ## %bb.0:
93 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
94 ; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0
95 ; AVX-NEXT: retq
96 ;
97 ; LARGE_AVX-LABEL: constpool_double:
98 ; LARGE_AVX: ## %bb.0:
99 ; LARGE_AVX-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
100 ; LARGE_AVX-NEXT: vaddsd (%rax), %xmm0, %xmm0
101 ; LARGE_AVX-NEXT: retq
102 ;
103 ; X86-LARGE-LABEL: constpool_double:
104 ; X86-LARGE: ## %bb.0:
105 ; X86-LARGE-NEXT: subl $12, %esp ## encoding: [0x83,0xec,0x0c]
106 ; X86-LARGE-NEXT: movsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xf2,0x0f,0x10,0x44,0x24,0x10]
107 ; X86-LARGE-NEXT: ## xmm0 = mem[0],zero
108 ; X86-LARGE-NEXT: addsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 ## encoding: [0xf2,0x0f,0x58,0x05,A,A,A,A]
109 ; X86-LARGE-NEXT: ## fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: FK_Data_4
110 ; X86-LARGE-NEXT: movsd %xmm0, (%esp) ## encoding: [0xf2,0x0f,0x11,0x04,0x24]
111 ; X86-LARGE-NEXT: fldl (%esp) ## encoding: [0xdd,0x04,0x24]
112 ; X86-LARGE-NEXT: addl $12, %esp ## encoding: [0x83,0xc4,0x0c]
113 ; X86-LARGE-NEXT: retl ## encoding: [0xc3]
115 %1 = fadd double %x, 8.500000e-01
116 ret double %1
117 }
119 define void @constpool_float_no_fp_args(ptr %x) nounwind {
120 ; CHECK-LABEL: constpool_float_no_fp_args:
121 ; CHECK: ## %bb.0:
122 ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
123 ; CHECK-NEXT: addss (%rdi), %xmm0
124 ; CHECK-NEXT: movss %xmm0, (%rdi)
125 ; CHECK-NEXT: retq
126 ;
127 ; LARGE-LABEL: constpool_float_no_fp_args:
128 ; LARGE: ## %bb.0:
129 ; LARGE-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
130 ; LARGE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
131 ; LARGE-NEXT: addss (%rdi), %xmm0
132 ; LARGE-NEXT: movss %xmm0, (%rdi)
133 ; LARGE-NEXT: retq
134 ;
135 ; LARGE_PIC-LABEL: constpool_float_no_fp_args:
136 ; LARGE_PIC: # %bb.0:
137 ; LARGE_PIC-NEXT: .L2$pb:
138 ; LARGE_PIC-NEXT: leaq .L2$pb(%rip), %rax
139 ; LARGE_PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.L2$pb, %rcx
140 ; LARGE_PIC-NEXT: addq %rax, %rcx
141 ; LARGE_PIC-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}@GOTOFF, %rax
142 ; LARGE_PIC-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
143 ; LARGE_PIC-NEXT: addss (%rdi), %xmm0
144 ; LARGE_PIC-NEXT: movss %xmm0, (%rdi)
145 ; LARGE_PIC-NEXT: retq
146 ;
147 ; AVX-LABEL: constpool_float_no_fp_args:
148 ; AVX: ## %bb.0:
149 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
150 ; AVX-NEXT: vaddss (%rdi), %xmm0, %xmm0
151 ; AVX-NEXT: vmovss %xmm0, (%rdi)
152 ; AVX-NEXT: retq
153 ;
154 ; LARGE_AVX-LABEL: constpool_float_no_fp_args:
155 ; LARGE_AVX: ## %bb.0:
156 ; LARGE_AVX-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
157 ; LARGE_AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
158 ; LARGE_AVX-NEXT: vaddss (%rdi), %xmm0, %xmm0
159 ; LARGE_AVX-NEXT: vmovss %xmm0, (%rdi)
160 ; LARGE_AVX-NEXT: retq
161 ;
162 ; X86-LARGE-LABEL: constpool_float_no_fp_args:
163 ; X86-LARGE: ## %bb.0:
164 ; X86-LARGE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
165 ; X86-LARGE-NEXT: movss {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 ## encoding: [0xf3,0x0f,0x10,0x05,A,A,A,A]
166 ; X86-LARGE-NEXT: ## fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: FK_Data_4
167 ; X86-LARGE-NEXT: ## xmm0 = mem[0],zero,zero,zero
168 ; X86-LARGE-NEXT: addss (%eax), %xmm0 ## encoding: [0xf3,0x0f,0x58,0x00]
169 ; X86-LARGE-NEXT: movss %xmm0, (%eax) ## encoding: [0xf3,0x0f,0x11,0x00]
170 ; X86-LARGE-NEXT: retl ## encoding: [0xc3]
171 %a = load float, ptr %x
172 %b = fadd float %a, 16.50e+01
173 store float %b, ptr %x
174 ret void
175 }
177 define void @constpool_double_no_fp_args(ptr %x) nounwind {
178 ; CHECK-LABEL: constpool_double_no_fp_args:
179 ; CHECK: ## %bb.0:
180 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
181 ; CHECK-NEXT: addsd (%rdi), %xmm0
182 ; CHECK-NEXT: movsd %xmm0, (%rdi)
183 ; CHECK-NEXT: retq
184 ;
185 ; LARGE-LABEL: constpool_double_no_fp_args:
186 ; LARGE: ## %bb.0:
187 ; LARGE-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
188 ; LARGE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
189 ; LARGE-NEXT: addsd (%rdi), %xmm0
190 ; LARGE-NEXT: movsd %xmm0, (%rdi)
191 ; LARGE-NEXT: retq
192 ;
193 ; LARGE_PIC-LABEL: constpool_double_no_fp_args:
194 ; LARGE_PIC: # %bb.0:
195 ; LARGE_PIC-NEXT: .L3$pb:
196 ; LARGE_PIC-NEXT: leaq .L3$pb(%rip), %rax
197 ; LARGE_PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.L3$pb, %rcx
198 ; LARGE_PIC-NEXT: addq %rax, %rcx
199 ; LARGE_PIC-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}@GOTOFF, %rax
200 ; LARGE_PIC-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
201 ; LARGE_PIC-NEXT: addsd (%rdi), %xmm0
202 ; LARGE_PIC-NEXT: movsd %xmm0, (%rdi)
203 ; LARGE_PIC-NEXT: retq
204 ;
205 ; AVX-LABEL: constpool_double_no_fp_args:
206 ; AVX: ## %bb.0:
207 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
208 ; AVX-NEXT: vaddsd (%rdi), %xmm0, %xmm0
209 ; AVX-NEXT: vmovsd %xmm0, (%rdi)
210 ; AVX-NEXT: retq
211 ;
212 ; LARGE_AVX-LABEL: constpool_double_no_fp_args:
213 ; LARGE_AVX: ## %bb.0:
214 ; LARGE_AVX-NEXT: movabsq ${{\.?LCPI[0-9]+_[0-9]+}}, %rax
215 ; LARGE_AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
216 ; LARGE_AVX-NEXT: vaddsd (%rdi), %xmm0, %xmm0
217 ; LARGE_AVX-NEXT: vmovsd %xmm0, (%rdi)
218 ; LARGE_AVX-NEXT: retq
219 ;
220 ; X86-LARGE-LABEL: constpool_double_no_fp_args:
221 ; X86-LARGE: ## %bb.0:
222 ; X86-LARGE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
223 ; X86-LARGE-NEXT: movsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 ## encoding: [0xf2,0x0f,0x10,0x05,A,A,A,A]
224 ; X86-LARGE-NEXT: ## fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: FK_Data_4
225 ; X86-LARGE-NEXT: ## xmm0 = mem[0],zero
226 ; X86-LARGE-NEXT: addsd (%eax), %xmm0 ## encoding: [0xf2,0x0f,0x58,0x00]
227 ; X86-LARGE-NEXT: movsd %xmm0, (%eax) ## encoding: [0xf2,0x0f,0x11,0x00]
228 ; X86-LARGE-NEXT: retl ## encoding: [0xc3]
229 %a = load double, ptr %x
230 %b = fadd double %a, 8.500000e-01
231 store double %b, ptr %x
232 ret void
233 }