| blob | 782c84408f25abcdcbecd815bb1311a9337c40b7 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
3 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX1
4 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
5 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512
7 define i64 @PR62286(i32 %a) {
8 ; SSE-LABEL: PR62286:
9 ; SSE: # %bb.0:
10 ; SSE-NEXT: movd %edi, %xmm0
11 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,1,0]
12 ; SSE-NEXT: paddd %xmm1, %xmm1
13 ; SSE-NEXT: pxor %xmm2, %xmm2
14 ; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
15 ; SSE-NEXT: pxor %xmm3, %xmm3
16 ; SSE-NEXT: pcmpgtd %xmm1, %xmm3
17 ; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
18 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,0]
19 ; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
20 ; SSE-NEXT: pcmpgtd %xmm0, %xmm2
21 ; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
22 ; SSE-NEXT: paddq %xmm1, %xmm0
23 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
24 ; SSE-NEXT: paddq %xmm0, %xmm1
25 ; SSE-NEXT: movq %xmm1, %rax
26 ; SSE-NEXT: retq
27 ;
28 ; AVX1-LABEL: PR62286:
29 ; AVX1: # %bb.0:
30 ; AVX1-NEXT: vmovd %edi, %xmm0
31 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,0]
32 ; AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm1
33 ; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
34 ; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3],ymm1[4],ymm0[5,6,7]
35 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
36 ; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
37 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
38 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
39 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
40 ; AVX1-NEXT: vpaddq %xmm0, %xmm1, %xmm0
41 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
42 ; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0
43 ; AVX1-NEXT: vmovq %xmm0, %rax
44 ; AVX1-NEXT: vzeroupper
45 ; AVX1-NEXT: retq
46 ;
47 ; AVX2-LABEL: PR62286:
48 ; AVX2: # %bb.0:
49 ; AVX2-NEXT: vmovd %edi, %xmm0
50 ; AVX2-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
51 ; AVX2-NEXT: vpaddd %xmm0, %xmm0, %xmm0
52 ; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
53 ; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
54 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
55 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
56 ; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0
57 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
58 ; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0
59 ; AVX2-NEXT: vmovq %xmm0, %rax
60 ; AVX2-NEXT: vzeroupper
61 ; AVX2-NEXT: retq
62 ;
63 ; AVX512-LABEL: PR62286:
64 ; AVX512: # %bb.0:
65 ; AVX512-NEXT: vmovd %edi, %xmm0
66 ; AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,0]
67 ; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm1
68 ; AVX512-NEXT: movw $4369, %ax # imm = 0x1111
69 ; AVX512-NEXT: kmovd %eax, %k1
70 ; AVX512-NEXT: vpaddd %zmm0, %zmm0, %zmm1 {%k1}
71 ; AVX512-NEXT: vpmovsxdq %ymm1, %zmm0
72 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
73 ; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0
74 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
75 ; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0
76 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
77 ; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0
78 ; AVX512-NEXT: vmovq %xmm0, %rax
79 ; AVX512-NEXT: vzeroupper
80 ; AVX512-NEXT: retq
81 %v2 = insertelement <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, i32 %a, i64 0
82 %v3 = insertelement <16 x i32> %v2, i32 0, i64 1
83 %v4 = insertelement <16 x i32> %v3, i32 0, i64 2
84 %v5 = insertelement <16 x i32> %v4, i32 %a, i64 3
85 %v6 = insertelement <16 x i32> %v5, i32 0, i64 4
86 %v7 = shl <16 x i32> %v6, <i32 1, i32 2, i32 3, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
87 %v8 = and <16 x i32> %v6, <i32 1, i32 -384969324, i32 -1073118976, i32 -2147418112, i32 poison, i32 -384969324, i32 -1073118976, i32 -2147418112, i32 456, i32 -384969324, i32 -1073118976, i32 -2147418112, i32 99, i32 -384969324, i32 -1073118976, i32 -2147418112>
88 %v9 = shufflevector <16 x i32> %v7, <16 x i32> %v8, <16 x i32> <i32 0, i32 17, i32 18, i32 19, i32 4, i32 21, i32 22, i32 23, i32 8, i32 25, i32 26, i32 27, i32 12, i32 29, i32 30, i32 31>
89 %v10 = sext <16 x i32> %v9 to <16 x i64>
90 %v12 = call i64 @llvm.vector.reduce.add.v16i64(<16 x i64> %v10)
91 ret i64 %v12
92 }
93 declare i64 @llvm.vector.reduce.add.v16i64(<16 x i64>)