| blob | f2819bcbfe8a05020266155f2d637d7a865fd49d |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86
3 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64
4 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s --check-prefixes=X64,SSE2
5 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.1 < %s | FileCheck %s --check-prefixes=X64,SSE41
6 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s --check-prefixes=X64,AVX1
7 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s --check-prefixes=X64,AVX2
8 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl < %s | FileCheck %s --check-prefixes=X64,AVX512VL
10 define i1 @test_urem_odd(i13 %X) nounwind {
11 ; X86-LABEL: test_urem_odd:
12 ; X86: # %bb.0:
13 ; X86-NEXT: imull $3277, {{[0-9]+}}(%esp), %eax # imm = 0xCCD
14 ; X86-NEXT: andl $8191, %eax # imm = 0x1FFF
15 ; X86-NEXT: cmpl $1639, %eax # imm = 0x667
16 ; X86-NEXT: setb %al
17 ; X86-NEXT: retl
18 ;
19 ; X64-LABEL: test_urem_odd:
20 ; X64: # %bb.0:
21 ; X64-NEXT: imull $3277, %edi, %eax # imm = 0xCCD
22 ; X64-NEXT: andl $8191, %eax # imm = 0x1FFF
23 ; X64-NEXT: cmpl $1639, %eax # imm = 0x667
24 ; X64-NEXT: setb %al
25 ; X64-NEXT: retq
26 %urem = urem i13 %X, 5
27 %cmp = icmp eq i13 %urem, 0
28 ret i1 %cmp
29 }
31 define i1 @test_urem_even(i27 %X) nounwind {
32 ; X86-LABEL: test_urem_even:
33 ; X86: # %bb.0:
34 ; X86-NEXT: imull $115043767, {{[0-9]+}}(%esp), %eax # imm = 0x6DB6DB7
35 ; X86-NEXT: movl %eax, %ecx
36 ; X86-NEXT: shll $26, %ecx
37 ; X86-NEXT: andl $134217726, %eax # imm = 0x7FFFFFE
38 ; X86-NEXT: shrl %eax
39 ; X86-NEXT: orl %ecx, %eax
40 ; X86-NEXT: andl $134217727, %eax # imm = 0x7FFFFFF
41 ; X86-NEXT: cmpl $9586981, %eax # imm = 0x924925
42 ; X86-NEXT: setb %al
43 ; X86-NEXT: retl
44 ;
45 ; X64-LABEL: test_urem_even:
46 ; X64: # %bb.0:
47 ; X64-NEXT: imull $115043767, %edi, %eax # imm = 0x6DB6DB7
48 ; X64-NEXT: movl %eax, %ecx
49 ; X64-NEXT: shll $26, %ecx
50 ; X64-NEXT: andl $134217726, %eax # imm = 0x7FFFFFE
51 ; X64-NEXT: shrl %eax
52 ; X64-NEXT: orl %ecx, %eax
53 ; X64-NEXT: andl $134217727, %eax # imm = 0x7FFFFFF
54 ; X64-NEXT: cmpl $9586981, %eax # imm = 0x924925
55 ; X64-NEXT: setb %al
56 ; X64-NEXT: retq
57 %urem = urem i27 %X, 14
58 %cmp = icmp eq i27 %urem, 0
59 ret i1 %cmp
60 }
62 define i1 @test_urem_odd_setne(i4 %X) nounwind {
63 ; X86-LABEL: test_urem_odd_setne:
64 ; X86: # %bb.0:
65 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
66 ; X86-NEXT: leal (%eax,%eax,2), %ecx
67 ; X86-NEXT: leal (%eax,%ecx,4), %eax
68 ; X86-NEXT: andb $15, %al
69 ; X86-NEXT: cmpb $4, %al
70 ; X86-NEXT: setae %al
71 ; X86-NEXT: retl
72 ;
73 ; X64-LABEL: test_urem_odd_setne:
74 ; X64: # %bb.0:
75 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
76 ; X64-NEXT: leal (%rdi,%rdi,2), %eax
77 ; X64-NEXT: leal (%rdi,%rax,4), %eax
78 ; X64-NEXT: andb $15, %al
79 ; X64-NEXT: cmpb $4, %al
80 ; X64-NEXT: setae %al
81 ; X64-NEXT: retq
82 %urem = urem i4 %X, 5
83 %cmp = icmp ne i4 %urem, 0
84 ret i1 %cmp
85 }
87 define i1 @test_urem_negative_odd(i9 %X) nounwind {
88 ; X86-LABEL: test_urem_negative_odd:
89 ; X86: # %bb.0:
90 ; X86-NEXT: imull $307, {{[0-9]+}}(%esp), %eax # imm = 0x133
91 ; X86-NEXT: andl $511, %eax # imm = 0x1FF
92 ; X86-NEXT: cmpw $2, %ax
93 ; X86-NEXT: setae %al
94 ; X86-NEXT: retl
95 ;
96 ; X64-LABEL: test_urem_negative_odd:
97 ; X64: # %bb.0:
98 ; X64-NEXT: imull $307, %edi, %eax # imm = 0x133
99 ; X64-NEXT: andl $511, %eax # imm = 0x1FF
100 ; X64-NEXT: cmpw $2, %ax
101 ; X64-NEXT: setae %al
102 ; X64-NEXT: retq
103 %urem = urem i9 %X, -5
104 %cmp = icmp ne i9 %urem, 0
105 ret i1 %cmp
106 }
108 define <3 x i1> @test_urem_vec(<3 x i11> %X) nounwind {
109 ; X86-LABEL: test_urem_vec:
110 ; X86: # %bb.0:
111 ; X86-NEXT: imull $683, {{[0-9]+}}(%esp), %eax # imm = 0x2AB
112 ; X86-NEXT: movl %eax, %ecx
113 ; X86-NEXT: shll $10, %ecx
114 ; X86-NEXT: andl $2046, %eax # imm = 0x7FE
115 ; X86-NEXT: shrl %eax
116 ; X86-NEXT: orl %ecx, %eax
117 ; X86-NEXT: andl $2047, %eax # imm = 0x7FF
118 ; X86-NEXT: cmpl $342, %eax # imm = 0x156
119 ; X86-NEXT: setae %al
120 ; X86-NEXT: imull $1463, {{[0-9]+}}(%esp), %ecx # imm = 0x5B7
121 ; X86-NEXT: addl $-1463, %ecx # imm = 0xFA49
122 ; X86-NEXT: andl $2047, %ecx # imm = 0x7FF
123 ; X86-NEXT: cmpl $293, %ecx # imm = 0x125
124 ; X86-NEXT: setae %dl
125 ; X86-NEXT: imull $819, {{[0-9]+}}(%esp), %ecx # imm = 0x333
126 ; X86-NEXT: addl $-1638, %ecx # imm = 0xF99A
127 ; X86-NEXT: andl $2047, %ecx # imm = 0x7FF
128 ; X86-NEXT: cmpw $2, %cx
129 ; X86-NEXT: setae %cl
130 ; X86-NEXT: retl
131 ;
132 ; SSE2-LABEL: test_urem_vec:
133 ; SSE2: # %bb.0:
134 ; SSE2-NEXT: movd %esi, %xmm0
135 ; SSE2-NEXT: movd %edi, %xmm1
136 ; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
137 ; SSE2-NEXT: movd %edx, %xmm0
138 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
139 ; SSE2-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
140 ; SSE2-NEXT: movdqa {{.*#+}} xmm0 = <683,u,819,u>
141 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
142 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
143 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
144 ; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
145 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
146 ; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
147 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2047,2047,2047,2047]
148 ; SSE2-NEXT: movdqa %xmm0, %xmm3
149 ; SSE2-NEXT: pand %xmm1, %xmm3
150 ; SSE2-NEXT: psrld $1, %xmm3
151 ; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm3[0],xmm2[1,2,3]
152 ; SSE2-NEXT: pslld $10, %xmm0
153 ; SSE2-NEXT: xorps %xmm3, %xmm3
154 ; SSE2-NEXT: movss {{.*#+}} xmm3 = xmm0[0],xmm3[1,2,3]
155 ; SSE2-NEXT: orps %xmm2, %xmm3
156 ; SSE2-NEXT: andps %xmm1, %xmm3
157 ; SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
158 ; SSE2-NEXT: movdqa %xmm3, -{{[0-9]+}}(%rsp)
159 ; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
160 ; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx
161 ; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx
162 ; SSE2-NEXT: retq
163 ;
164 ; SSE41-LABEL: test_urem_vec:
165 ; SSE41: # %bb.0:
166 ; SSE41-NEXT: movd %edi, %xmm0
167 ; SSE41-NEXT: pinsrd $1, %esi, %xmm0
168 ; SSE41-NEXT: pinsrd $2, %edx, %xmm0
169 ; SSE41-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
170 ; SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
171 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [2047,2047,2047,2047]
172 ; SSE41-NEXT: movdqa %xmm0, %xmm2
173 ; SSE41-NEXT: pand %xmm1, %xmm2
174 ; SSE41-NEXT: psrld $1, %xmm2
175 ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm0[2,3,4,5,6,7]
176 ; SSE41-NEXT: pslld $10, %xmm0
177 ; SSE41-NEXT: pxor %xmm3, %xmm3
178 ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm0[0,1],xmm3[2,3,4,5,6,7]
179 ; SSE41-NEXT: por %xmm2, %xmm3
180 ; SSE41-NEXT: pand %xmm1, %xmm3
181 ; SSE41-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
182 ; SSE41-NEXT: movd %xmm3, %eax
183 ; SSE41-NEXT: pextrb $4, %xmm3, %edx
184 ; SSE41-NEXT: pextrb $8, %xmm3, %ecx
185 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
186 ; SSE41-NEXT: # kill: def $dl killed $dl killed $edx
187 ; SSE41-NEXT: # kill: def $cl killed $cl killed $ecx
188 ; SSE41-NEXT: retq
189 ;
190 ; AVX1-LABEL: test_urem_vec:
191 ; AVX1: # %bb.0:
192 ; AVX1-NEXT: vmovd %edi, %xmm0
193 ; AVX1-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
194 ; AVX1-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
195 ; AVX1-NEXT: vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
196 ; AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
197 ; AVX1-NEXT: vbroadcastss {{.*#+}} xmm1 = [2047,2047,2047,2047]
198 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm2
199 ; AVX1-NEXT: vpsrld $1, %xmm2, %xmm2
200 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm0[2,3,4,5,6,7]
201 ; AVX1-NEXT: vpslld $10, %xmm0, %xmm0
202 ; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
203 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm3[2,3,4,5,6,7]
204 ; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
205 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
206 ; AVX1-NEXT: vpcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
207 ; AVX1-NEXT: vmovd %xmm0, %eax
208 ; AVX1-NEXT: vpextrb $4, %xmm0, %edx
209 ; AVX1-NEXT: vpextrb $8, %xmm0, %ecx
210 ; AVX1-NEXT: # kill: def $al killed $al killed $eax
211 ; AVX1-NEXT: # kill: def $dl killed $dl killed $edx
212 ; AVX1-NEXT: # kill: def $cl killed $cl killed $ecx
213 ; AVX1-NEXT: retq
214 ;
215 ; AVX2-LABEL: test_urem_vec:
216 ; AVX2: # %bb.0:
217 ; AVX2-NEXT: vmovd %edi, %xmm0
218 ; AVX2-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
219 ; AVX2-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
220 ; AVX2-NEXT: vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
221 ; AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
222 ; AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
223 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2047,2047,2047,2047]
224 ; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
225 ; AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
226 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
227 ; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
228 ; AVX2-NEXT: vpcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
229 ; AVX2-NEXT: vmovd %xmm0, %eax
230 ; AVX2-NEXT: vpextrb $4, %xmm0, %edx
231 ; AVX2-NEXT: vpextrb $8, %xmm0, %ecx
232 ; AVX2-NEXT: # kill: def $al killed $al killed $eax
233 ; AVX2-NEXT: # kill: def $dl killed $dl killed $edx
234 ; AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
235 ; AVX2-NEXT: retq
236 ;
237 ; AVX512VL-LABEL: test_urem_vec:
238 ; AVX512VL: # %bb.0:
239 ; AVX512VL-NEXT: vmovd %edi, %xmm0
240 ; AVX512VL-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
241 ; AVX512VL-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
242 ; AVX512VL-NEXT: vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
243 ; AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
244 ; AVX512VL-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
245 ; AVX512VL-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2047,2047,2047,2047]
246 ; AVX512VL-NEXT: vpand %xmm2, %xmm0, %xmm0
247 ; AVX512VL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
248 ; AVX512VL-NEXT: vpternlogd $200, %xmm1, %xmm2, %xmm0
249 ; AVX512VL-NEXT: vpcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k0
250 ; AVX512VL-NEXT: kshiftrw $1, %k0, %k1
251 ; AVX512VL-NEXT: kmovw %k1, %edx
252 ; AVX512VL-NEXT: kshiftrw $2, %k0, %k1
253 ; AVX512VL-NEXT: kmovw %k1, %ecx
254 ; AVX512VL-NEXT: kmovw %k0, %eax
255 ; AVX512VL-NEXT: # kill: def $al killed $al killed $eax
256 ; AVX512VL-NEXT: # kill: def $dl killed $dl killed $edx
257 ; AVX512VL-NEXT: # kill: def $cl killed $cl killed $ecx
258 ; AVX512VL-NEXT: retq
259 %urem = urem <3 x i11> %X, <i11 6, i11 7, i11 -5>
260 %cmp = icmp ne <3 x i11> %urem, <i11 0, i11 1, i11 2>
261 ret <3 x i1> %cmp
262 }