| blob | a76d0b36fa1aa59f0bd2e02e0b3e910ead1a9b47 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2 ; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3 ; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4 ; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5 ; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
8 ; CHECK-GI: warning: Instruction selection used fallback path for f128_fp128
9 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for f128_i128
10 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for f128_double
11 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for f128_float
12 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for f128_i32
13 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for f128_half
14 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for v2f128_fp128
15 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for v3f128_fp128
16 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for v2f128_double
17 ; CHECK-GI-NEXT: warning: Instruction selection used fallback path for v3f128_double
20 define fp128 @f128_fp128(fp128 %a, fp128 %b, fp128 %d, fp128 %e) {
21 ; CHECK-LABEL: f128_fp128:
22 ; CHECK: // %bb.0: // %entry
23 ; CHECK-NEXT: sub sp, sp, #48
24 ; CHECK-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
25 ; CHECK-NEXT: .cfi_def_cfa_offset 48
26 ; CHECK-NEXT: .cfi_offset w30, -16
27 ; CHECK-NEXT: stp q2, q3, [sp] // 32-byte Folded Spill
28 ; CHECK-NEXT: bl __lttf2
29 ; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
30 ; CHECK-NEXT: cmp w0, #0
31 ; CHECK-NEXT: b.ge .LBB0_2
32 ; CHECK-NEXT: // %bb.1: // %entry
33 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
34 ; CHECK-NEXT: .LBB0_2: // %entry
35 ; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
36 ; CHECK-NEXT: add sp, sp, #48
37 ; CHECK-NEXT: ret
38 entry:
39 %c = fcmp olt fp128 %a, %b
40 %s = select i1 %c, fp128 %d, fp128 %e
41 ret fp128 %s
42 }
44 define i128 @f128_i128(fp128 %a, fp128 %b, i128 %d, i128 %e) {
45 ; CHECK-LABEL: f128_i128:
46 ; CHECK: // %bb.0: // %entry
47 ; CHECK-NEXT: sub sp, sp, #80
48 ; CHECK-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
49 ; CHECK-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
50 ; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
51 ; CHECK-NEXT: .cfi_def_cfa_offset 80
52 ; CHECK-NEXT: .cfi_offset w19, -8
53 ; CHECK-NEXT: .cfi_offset w20, -16
54 ; CHECK-NEXT: .cfi_offset w21, -24
55 ; CHECK-NEXT: .cfi_offset w22, -32
56 ; CHECK-NEXT: .cfi_offset w30, -48
57 ; CHECK-NEXT: mov x19, x3
58 ; CHECK-NEXT: mov x20, x2
59 ; CHECK-NEXT: mov x21, x1
60 ; CHECK-NEXT: mov x22, x0
61 ; CHECK-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
62 ; CHECK-NEXT: bl __lttf2
63 ; CHECK-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload
64 ; CHECK-NEXT: cmp w0, #0
65 ; CHECK-NEXT: csel x20, x22, x20, lt
66 ; CHECK-NEXT: bl __lttf2
67 ; CHECK-NEXT: mov w8, w0
68 ; CHECK-NEXT: mov x0, x20
69 ; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
70 ; CHECK-NEXT: cmp w8, #0
71 ; CHECK-NEXT: csel x1, x21, x19, lt
72 ; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
73 ; CHECK-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
74 ; CHECK-NEXT: add sp, sp, #80
75 ; CHECK-NEXT: ret
76 entry:
77 %c = fcmp olt fp128 %a, %b
78 %s = select i1 %c, i128 %d, i128 %e
79 ret i128 %s
80 }
82 define double @f128_double(fp128 %a, fp128 %b, double %d, double %e) {
83 ; CHECK-LABEL: f128_double:
84 ; CHECK: // %bb.0: // %entry
85 ; CHECK-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill
86 ; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
87 ; CHECK-NEXT: .cfi_def_cfa_offset 32
88 ; CHECK-NEXT: .cfi_offset w30, -16
89 ; CHECK-NEXT: .cfi_offset b8, -24
90 ; CHECK-NEXT: .cfi_offset b9, -32
91 ; CHECK-NEXT: fmov d8, d3
92 ; CHECK-NEXT: fmov d9, d2
93 ; CHECK-NEXT: bl __lttf2
94 ; CHECK-NEXT: cmp w0, #0
95 ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
96 ; CHECK-NEXT: fcsel d0, d9, d8, lt
97 ; CHECK-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload
98 ; CHECK-NEXT: ret
99 entry:
100 %c = fcmp olt fp128 %a, %b
101 %s = select i1 %c, double %d, double %e
102 ret double %s
103 }
105 define float @f128_float(fp128 %a, fp128 %b, float %d, float %e) {
106 ; CHECK-LABEL: f128_float:
107 ; CHECK: // %bb.0: // %entry
108 ; CHECK-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill
109 ; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
110 ; CHECK-NEXT: .cfi_def_cfa_offset 32
111 ; CHECK-NEXT: .cfi_offset w30, -16
112 ; CHECK-NEXT: .cfi_offset b8, -24
113 ; CHECK-NEXT: .cfi_offset b9, -32
114 ; CHECK-NEXT: fmov s8, s3
115 ; CHECK-NEXT: fmov s9, s2
116 ; CHECK-NEXT: bl __lttf2
117 ; CHECK-NEXT: cmp w0, #0
118 ; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
119 ; CHECK-NEXT: fcsel s0, s9, s8, lt
120 ; CHECK-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload
121 ; CHECK-NEXT: ret
122 entry:
123 %c = fcmp olt fp128 %a, %b
124 %s = select i1 %c, float %d, float %e
125 ret float %s
126 }
128 define i32 @f128_i32(fp128 %a, fp128 %b, i32 %d, i32 %e) {
129 ; CHECK-LABEL: f128_i32:
130 ; CHECK: // %bb.0: // %entry
131 ; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
132 ; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
133 ; CHECK-NEXT: .cfi_def_cfa_offset 32
134 ; CHECK-NEXT: .cfi_offset w19, -8
135 ; CHECK-NEXT: .cfi_offset w20, -16
136 ; CHECK-NEXT: .cfi_offset w30, -32
137 ; CHECK-NEXT: mov w19, w1
138 ; CHECK-NEXT: mov w20, w0
139 ; CHECK-NEXT: bl __lttf2
140 ; CHECK-NEXT: cmp w0, #0
141 ; CHECK-NEXT: csel w0, w20, w19, lt
142 ; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
143 ; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
144 ; CHECK-NEXT: ret
145 entry:
146 %c = fcmp olt fp128 %a, %b
147 %s = select i1 %c, i32 %d, i32 %e
148 ret i32 %s
149 }
151 define half @f128_half(fp128 %a, fp128 %b, half %d, half %e) {
152 ; CHECK-SD-NOFP16-LABEL: f128_half:
153 ; CHECK-SD-NOFP16: // %bb.0: // %entry
154 ; CHECK-SD-NOFP16-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill
155 ; CHECK-SD-NOFP16-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
156 ; CHECK-SD-NOFP16-NEXT: .cfi_def_cfa_offset 32
157 ; CHECK-SD-NOFP16-NEXT: .cfi_offset w30, -16
158 ; CHECK-SD-NOFP16-NEXT: .cfi_offset b8, -24
159 ; CHECK-SD-NOFP16-NEXT: .cfi_offset b9, -32
160 ; CHECK-SD-NOFP16-NEXT: fmov s8, s3
161 ; CHECK-SD-NOFP16-NEXT: fmov s9, s2
162 ; CHECK-SD-NOFP16-NEXT: bl __lttf2
163 ; CHECK-SD-NOFP16-NEXT: cmp w0, #0
164 ; CHECK-SD-NOFP16-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
165 ; CHECK-SD-NOFP16-NEXT: fcsel s0, s9, s8, lt
166 ; CHECK-SD-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
167 ; CHECK-SD-NOFP16-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload
168 ; CHECK-SD-NOFP16-NEXT: ret
169 ;
170 ; CHECK-SD-FP16-LABEL: f128_half:
171 ; CHECK-SD-FP16: // %bb.0: // %entry
172 ; CHECK-SD-FP16-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill
173 ; CHECK-SD-FP16-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
174 ; CHECK-SD-FP16-NEXT: .cfi_def_cfa_offset 32
175 ; CHECK-SD-FP16-NEXT: .cfi_offset w30, -16
176 ; CHECK-SD-FP16-NEXT: .cfi_offset b8, -24
177 ; CHECK-SD-FP16-NEXT: .cfi_offset b9, -32
178 ; CHECK-SD-FP16-NEXT: fmov s8, s3
179 ; CHECK-SD-FP16-NEXT: fmov s9, s2
180 ; CHECK-SD-FP16-NEXT: bl __lttf2
181 ; CHECK-SD-FP16-NEXT: cmp w0, #0
182 ; CHECK-SD-FP16-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
183 ; CHECK-SD-FP16-NEXT: fcsel h0, h9, h8, lt
184 ; CHECK-SD-FP16-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload
185 ; CHECK-SD-FP16-NEXT: ret
186 ;
187 ; CHECK-GI-NOFP16-LABEL: f128_half:
188 ; CHECK-GI-NOFP16: // %bb.0: // %entry
189 ; CHECK-GI-NOFP16-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill
190 ; CHECK-GI-NOFP16-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
191 ; CHECK-GI-NOFP16-NEXT: .cfi_def_cfa_offset 32
192 ; CHECK-GI-NOFP16-NEXT: .cfi_offset w30, -16
193 ; CHECK-GI-NOFP16-NEXT: .cfi_offset b8, -24
194 ; CHECK-GI-NOFP16-NEXT: .cfi_offset b9, -32
195 ; CHECK-GI-NOFP16-NEXT: fmov s8, s3
196 ; CHECK-GI-NOFP16-NEXT: fmov s9, s2
197 ; CHECK-GI-NOFP16-NEXT: bl __lttf2
198 ; CHECK-GI-NOFP16-NEXT: cmp w0, #0
199 ; CHECK-GI-NOFP16-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
200 ; CHECK-GI-NOFP16-NEXT: fcsel s0, s9, s8, lt
201 ; CHECK-GI-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
202 ; CHECK-GI-NOFP16-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload
203 ; CHECK-GI-NOFP16-NEXT: ret
204 ;
205 ; CHECK-GI-FP16-LABEL: f128_half:
206 ; CHECK-GI-FP16: // %bb.0: // %entry
207 ; CHECK-GI-FP16-NEXT: stp d9, d8, [sp, #-32]! // 16-byte Folded Spill
208 ; CHECK-GI-FP16-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
209 ; CHECK-GI-FP16-NEXT: .cfi_def_cfa_offset 32
210 ; CHECK-GI-FP16-NEXT: .cfi_offset w30, -16
211 ; CHECK-GI-FP16-NEXT: .cfi_offset b8, -24
212 ; CHECK-GI-FP16-NEXT: .cfi_offset b9, -32
213 ; CHECK-GI-FP16-NEXT: fmov s8, s3
214 ; CHECK-GI-FP16-NEXT: fmov s9, s2
215 ; CHECK-GI-FP16-NEXT: bl __lttf2
216 ; CHECK-GI-FP16-NEXT: cmp w0, #0
217 ; CHECK-GI-FP16-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
218 ; CHECK-GI-FP16-NEXT: fcsel h0, h9, h8, lt
219 ; CHECK-GI-FP16-NEXT: ldp d9, d8, [sp], #32 // 16-byte Folded Reload
220 ; CHECK-GI-FP16-NEXT: ret
221 entry:
222 %c = fcmp olt fp128 %a, %b
223 %s = select i1 %c, half %d, half %e
224 ret half %s
225 }
227 define double @f64_double(double %a, double %b, double %d, double %e) {
228 ; CHECK-LABEL: f64_double:
229 ; CHECK: // %bb.0: // %entry
230 ; CHECK-NEXT: fcmp d0, d1
231 ; CHECK-NEXT: fcsel d0, d2, d3, mi
232 ; CHECK-NEXT: ret
233 entry:
234 %c = fcmp olt double %a, %b
235 %s = select i1 %c, double %d, double %e
236 ret double %s
237 }
239 define i32 @f64_i32(double %a, double %b, i32 %d, i32 %e) {
240 ; CHECK-LABEL: f64_i32:
241 ; CHECK: // %bb.0: // %entry
242 ; CHECK-NEXT: fcmp d0, d1
243 ; CHECK-NEXT: csel w0, w0, w1, mi
244 ; CHECK-NEXT: ret
245 entry:
246 %c = fcmp olt double %a, %b
247 %s = select i1 %c, i32 %d, i32 %e
248 ret i32 %s
249 }
251 define float @f32_float(float %a, float %b, float %d, float %e) {
252 ; CHECK-LABEL: f32_float:
253 ; CHECK: // %bb.0: // %entry
254 ; CHECK-NEXT: fcmp s0, s1
255 ; CHECK-NEXT: fcsel s0, s2, s3, mi
256 ; CHECK-NEXT: ret
257 entry:
258 %c = fcmp olt float %a, %b
259 %s = select i1 %c, float %d, float %e
260 ret float %s
261 }
263 define i32 @f32_i32(float %a, float %b, i32 %d, i32 %e) {
264 ; CHECK-LABEL: f32_i32:
265 ; CHECK: // %bb.0: // %entry
266 ; CHECK-NEXT: fcmp s0, s1
267 ; CHECK-NEXT: csel w0, w0, w1, mi
268 ; CHECK-NEXT: ret
269 entry:
270 %c = fcmp olt float %a, %b
271 %s = select i1 %c, i32 %d, i32 %e
272 ret i32 %s
273 }
275 define half @f16_half(half %a, half %b, half %d, half %e) {
276 ; CHECK-SD-NOFP16-LABEL: f16_half:
277 ; CHECK-SD-NOFP16: // %bb.0: // %entry
278 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
279 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
280 ; CHECK-SD-NOFP16-NEXT: // kill: def $h3 killed $h3 def $s3
281 ; CHECK-SD-NOFP16-NEXT: // kill: def $h2 killed $h2 def $s2
282 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s1
283 ; CHECK-SD-NOFP16-NEXT: fcsel s0, s2, s3, mi
284 ; CHECK-SD-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
285 ; CHECK-SD-NOFP16-NEXT: ret
286 ;
287 ; CHECK-SD-FP16-LABEL: f16_half:
288 ; CHECK-SD-FP16: // %bb.0: // %entry
289 ; CHECK-SD-FP16-NEXT: fcmp h0, h1
290 ; CHECK-SD-FP16-NEXT: fcsel h0, h2, h3, mi
291 ; CHECK-SD-FP16-NEXT: ret
292 ;
293 ; CHECK-GI-NOFP16-LABEL: f16_half:
294 ; CHECK-GI-NOFP16: // %bb.0: // %entry
295 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
296 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
297 ; CHECK-GI-NOFP16-NEXT: // kill: def $h2 killed $h2 def $s2
298 ; CHECK-GI-NOFP16-NEXT: // kill: def $h3 killed $h3 def $s3
299 ; CHECK-GI-NOFP16-NEXT: fmov w8, s2
300 ; CHECK-GI-NOFP16-NEXT: fmov w9, s3
301 ; CHECK-GI-NOFP16-NEXT: fcmp s0, s1
302 ; CHECK-GI-NOFP16-NEXT: csel w8, w8, w9, mi
303 ; CHECK-GI-NOFP16-NEXT: fmov s0, w8
304 ; CHECK-GI-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
305 ; CHECK-GI-NOFP16-NEXT: ret
306 ;
307 ; CHECK-GI-FP16-LABEL: f16_half:
308 ; CHECK-GI-FP16: // %bb.0: // %entry
309 ; CHECK-GI-FP16-NEXT: // kill: def $h2 killed $h2 def $s2
310 ; CHECK-GI-FP16-NEXT: // kill: def $h3 killed $h3 def $s3
311 ; CHECK-GI-FP16-NEXT: fcmp h0, h1
312 ; CHECK-GI-FP16-NEXT: fmov w8, s2
313 ; CHECK-GI-FP16-NEXT: fmov w9, s3
314 ; CHECK-GI-FP16-NEXT: csel w8, w8, w9, mi
315 ; CHECK-GI-FP16-NEXT: fmov s0, w8
316 ; CHECK-GI-FP16-NEXT: // kill: def $h0 killed $h0 killed $s0
317 ; CHECK-GI-FP16-NEXT: ret
318 entry:
319 %c = fcmp olt half %a, %b
320 %s = select i1 %c, half %d, half %e
321 ret half %s
322 }
324 define i32 @f16_i32(half %a, half %b, i32 %d, i32 %e) {
325 ; CHECK-SD-NOFP16-LABEL: f16_i32:
326 ; CHECK-SD-NOFP16: // %bb.0: // %entry
327 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
328 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
329 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s1
330 ; CHECK-SD-NOFP16-NEXT: csel w0, w0, w1, mi
331 ; CHECK-SD-NOFP16-NEXT: ret
332 ;
333 ; CHECK-SD-FP16-LABEL: f16_i32:
334 ; CHECK-SD-FP16: // %bb.0: // %entry
335 ; CHECK-SD-FP16-NEXT: fcmp h0, h1
336 ; CHECK-SD-FP16-NEXT: csel w0, w0, w1, mi
337 ; CHECK-SD-FP16-NEXT: ret
338 ;
339 ; CHECK-GI-NOFP16-LABEL: f16_i32:
340 ; CHECK-GI-NOFP16: // %bb.0: // %entry
341 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
342 ; CHECK-GI-NOFP16-NEXT: fcvt s1, h1
343 ; CHECK-GI-NOFP16-NEXT: fcmp s0, s1
344 ; CHECK-GI-NOFP16-NEXT: csel w0, w0, w1, mi
345 ; CHECK-GI-NOFP16-NEXT: ret
346 ;
347 ; CHECK-GI-FP16-LABEL: f16_i32:
348 ; CHECK-GI-FP16: // %bb.0: // %entry
349 ; CHECK-GI-FP16-NEXT: fcmp h0, h1
350 ; CHECK-GI-FP16-NEXT: csel w0, w0, w1, mi
351 ; CHECK-GI-FP16-NEXT: ret
352 entry:
353 %c = fcmp olt half %a, %b
354 %s = select i1 %c, i32 %d, i32 %e
355 ret i32 %s
356 }
358 define <2 x fp128> @v2f128_fp128(<2 x fp128> %a, <2 x fp128> %b, <2 x fp128> %d, <2 x fp128> %e) {
359 ; CHECK-LABEL: v2f128_fp128:
360 ; CHECK: // %bb.0: // %entry
361 ; CHECK-NEXT: sub sp, sp, #112
362 ; CHECK-NEXT: str x30, [sp, #96] // 8-byte Folded Spill
363 ; CHECK-NEXT: .cfi_def_cfa_offset 112
364 ; CHECK-NEXT: .cfi_offset w30, -16
365 ; CHECK-NEXT: stp q4, q5, [sp] // 32-byte Folded Spill
366 ; CHECK-NEXT: stp q1, q3, [sp, #32] // 32-byte Folded Spill
367 ; CHECK-NEXT: mov v1.16b, v2.16b
368 ; CHECK-NEXT: stp q7, q6, [sp, #64] // 32-byte Folded Spill
369 ; CHECK-NEXT: bl __lttf2
370 ; CHECK-NEXT: cmp w0, #0
371 ; CHECK-NEXT: b.ge .LBB12_2
372 ; CHECK-NEXT: // %bb.1: // %entry
373 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
374 ; CHECK-NEXT: str q0, [sp, #80] // 16-byte Folded Spill
375 ; CHECK-NEXT: .LBB12_2: // %entry
376 ; CHECK-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload
377 ; CHECK-NEXT: bl __lttf2
378 ; CHECK-NEXT: ldr q1, [sp, #64] // 16-byte Folded Reload
379 ; CHECK-NEXT: cmp w0, #0
380 ; CHECK-NEXT: b.ge .LBB12_4
381 ; CHECK-NEXT: // %bb.3: // %entry
382 ; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
383 ; CHECK-NEXT: .LBB12_4: // %entry
384 ; CHECK-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload
385 ; CHECK-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
386 ; CHECK-NEXT: add sp, sp, #112
387 ; CHECK-NEXT: ret
388 entry:
389 %c = fcmp olt <2 x fp128> %a, %b
390 %s = select <2 x i1> %c, <2 x fp128> %d, <2 x fp128> %e
391 ret <2 x fp128> %s
392 }
394 define <3 x fp128> @v3f128_fp128(<3 x fp128> %a, <3 x fp128> %b, <3 x fp128> %d, <3 x fp128> %e) {
395 ; CHECK-LABEL: v3f128_fp128:
396 ; CHECK: // %bb.0: // %entry
397 ; CHECK-NEXT: sub sp, sp, #112
398 ; CHECK-NEXT: str x30, [sp, #96] // 8-byte Folded Spill
399 ; CHECK-NEXT: .cfi_def_cfa_offset 112
400 ; CHECK-NEXT: .cfi_offset w30, -16
401 ; CHECK-NEXT: stp q1, q4, [sp] // 32-byte Folded Spill
402 ; CHECK-NEXT: mov v1.16b, v3.16b
403 ; CHECK-NEXT: stp q2, q5, [sp, #32] // 32-byte Folded Spill
404 ; CHECK-NEXT: stp q6, q7, [sp, #64] // 32-byte Folded Spill
405 ; CHECK-NEXT: bl __lttf2
406 ; CHECK-NEXT: cmp w0, #0
407 ; CHECK-NEXT: b.lt .LBB13_2
408 ; CHECK-NEXT: // %bb.1:
409 ; CHECK-NEXT: ldr q0, [sp, #128]
410 ; CHECK-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
411 ; CHECK-NEXT: .LBB13_2: // %entry
412 ; CHECK-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload
413 ; CHECK-NEXT: bl __lttf2
414 ; CHECK-NEXT: cmp w0, #0
415 ; CHECK-NEXT: b.lt .LBB13_4
416 ; CHECK-NEXT: // %bb.3:
417 ; CHECK-NEXT: ldr q0, [sp, #144]
418 ; CHECK-NEXT: str q0, [sp, #80] // 16-byte Folded Spill
419 ; CHECK-NEXT: .LBB13_4: // %entry
420 ; CHECK-NEXT: ldp q0, q1, [sp, #32] // 32-byte Folded Reload
421 ; CHECK-NEXT: bl __lttf2
422 ; CHECK-NEXT: add x8, sp, #160
423 ; CHECK-NEXT: cmp w0, #0
424 ; CHECK-NEXT: add x9, sp, #112
425 ; CHECK-NEXT: csel x8, x9, x8, lt
426 ; CHECK-NEXT: ldp q0, q1, [sp, #64] // 32-byte Folded Reload
427 ; CHECK-NEXT: ldr q2, [x8]
428 ; CHECK-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
429 ; CHECK-NEXT: add sp, sp, #112
430 ; CHECK-NEXT: ret
431 entry:
432 %c = fcmp olt <3 x fp128> %a, %b
433 %s = select <3 x i1> %c, <3 x fp128> %d, <3 x fp128> %e
434 ret <3 x fp128> %s
435 }
438 define <2 x double> @v2f128_double(<2 x fp128> %a, <2 x fp128> %b, <2 x double> %d, <2 x double> %e) {
439 ; CHECK-LABEL: v2f128_double:
440 ; CHECK: // %bb.0: // %entry
441 ; CHECK-NEXT: sub sp, sp, #96
442 ; CHECK-NEXT: str x30, [sp, #80] // 8-byte Folded Spill
443 ; CHECK-NEXT: .cfi_def_cfa_offset 96
444 ; CHECK-NEXT: .cfi_offset w30, -16
445 ; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
446 ; CHECK-NEXT: mov v0.16b, v1.16b
447 ; CHECK-NEXT: mov v1.16b, v3.16b
448 ; CHECK-NEXT: stp q4, q5, [sp, #48] // 32-byte Folded Spill
449 ; CHECK-NEXT: str q2, [sp, #32] // 16-byte Folded Spill
450 ; CHECK-NEXT: bl __lttf2
451 ; CHECK-NEXT: cmp w0, #0
452 ; CHECK-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
453 ; CHECK-NEXT: cset w8, lt
454 ; CHECK-NEXT: sbfx x8, x8, #0, #1
455 ; CHECK-NEXT: fmov d0, x8
456 ; CHECK-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
457 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
458 ; CHECK-NEXT: bl __lttf2
459 ; CHECK-NEXT: cmp w0, #0
460 ; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
461 ; CHECK-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload
462 ; CHECK-NEXT: cset w8, lt
463 ; CHECK-NEXT: sbfx x8, x8, #0, #1
464 ; CHECK-NEXT: fmov d0, x8
465 ; CHECK-NEXT: mov v0.d[1], v1.d[0]
466 ; CHECK-NEXT: ldp q2, q1, [sp, #48] // 32-byte Folded Reload
467 ; CHECK-NEXT: bsl v0.16b, v2.16b, v1.16b
468 ; CHECK-NEXT: add sp, sp, #96
469 ; CHECK-NEXT: ret
470 entry:
471 %c = fcmp olt <2 x fp128> %a, %b
472 %s = select <2 x i1> %c, <2 x double> %d, <2 x double> %e
473 ret <2 x double> %s
474 }
476 define <3 x double> @v3f128_double(<3 x fp128> %a, <3 x fp128> %b, <3 x double> %d, <3 x double> %e) {
477 ; CHECK-LABEL: v3f128_double:
478 ; CHECK: // %bb.0: // %entry
479 ; CHECK-NEXT: sub sp, sp, #160
480 ; CHECK-NEXT: str x30, [sp, #144] // 8-byte Folded Spill
481 ; CHECK-NEXT: .cfi_def_cfa_offset 160
482 ; CHECK-NEXT: .cfi_offset w30, -16
483 ; CHECK-NEXT: stp q2, q5, [sp, #112] // 32-byte Folded Spill
484 ; CHECK-NEXT: // kill: def $d6 killed $d6 def $q6
485 ; CHECK-NEXT: // kill: def $d7 killed $d7 def $q7
486 ; CHECK-NEXT: ldr d5, [sp, #184]
487 ; CHECK-NEXT: str q3, [sp, #64] // 16-byte Folded Spill
488 ; CHECK-NEXT: ldp d3, d2, [sp, #168]
489 ; CHECK-NEXT: mov v6.d[1], v7.d[0]
490 ; CHECK-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
491 ; CHECK-NEXT: mov v0.16b, v1.16b
492 ; CHECK-NEXT: mov v1.16b, v4.16b
493 ; CHECK-NEXT: str q5, [sp, #96] // 16-byte Folded Spill
494 ; CHECK-NEXT: ldr d5, [sp, #160]
495 ; CHECK-NEXT: mov v3.d[1], v2.d[0]
496 ; CHECK-NEXT: str q5, [sp, #80] // 16-byte Folded Spill
497 ; CHECK-NEXT: stp q6, q3, [sp, #32] // 32-byte Folded Spill
498 ; CHECK-NEXT: bl __lttf2
499 ; CHECK-NEXT: cmp w0, #0
500 ; CHECK-NEXT: ldr q1, [sp, #64] // 16-byte Folded Reload
501 ; CHECK-NEXT: cset w8, lt
502 ; CHECK-NEXT: sbfx x8, x8, #0, #1
503 ; CHECK-NEXT: fmov d0, x8
504 ; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
505 ; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
506 ; CHECK-NEXT: bl __lttf2
507 ; CHECK-NEXT: cmp w0, #0
508 ; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
509 ; CHECK-NEXT: cset w8, lt
510 ; CHECK-NEXT: sbfx x8, x8, #0, #1
511 ; CHECK-NEXT: fmov d1, x8
512 ; CHECK-NEXT: mov v1.d[1], v0.d[0]
513 ; CHECK-NEXT: str q1, [sp, #64] // 16-byte Folded Spill
514 ; CHECK-NEXT: ldp q0, q1, [sp, #112] // 32-byte Folded Reload
515 ; CHECK-NEXT: bl __lttf2
516 ; CHECK-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload
517 ; CHECK-NEXT: cmp w0, #0
518 ; CHECK-NEXT: ldp q2, q4, [sp, #64] // 32-byte Folded Reload
519 ; CHECK-NEXT: cset w8, lt
520 ; CHECK-NEXT: sbfx x8, x8, #0, #1
521 ; CHECK-NEXT: ldr q3, [sp, #96] // 16-byte Folded Reload
522 ; CHECK-NEXT: ldr x30, [sp, #144] // 8-byte Folded Reload
523 ; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b
524 ; CHECK-NEXT: fmov d2, x8
525 ; CHECK-NEXT: bsl v2.16b, v4.16b, v3.16b
526 ; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
527 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
528 ; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
529 ; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
530 ; CHECK-NEXT: add sp, sp, #160
531 ; CHECK-NEXT: ret
532 entry:
533 %c = fcmp olt <3 x fp128> %a, %b
534 %s = select <3 x i1> %c, <3 x double> %d, <3 x double> %e
535 ret <3 x double> %s
536 }
538 define <2 x double> @v2f64_double(<2 x double> %a, <2 x double> %b, <2 x double> %d, <2 x double> %e) {
539 ; CHECK-LABEL: v2f64_double:
540 ; CHECK: // %bb.0: // %entry
541 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
542 ; CHECK-NEXT: bsl v0.16b, v2.16b, v3.16b
543 ; CHECK-NEXT: ret
544 entry:
545 %c = fcmp olt <2 x double> %a, %b
546 %s = select <2 x i1> %c, <2 x double> %d, <2 x double> %e
547 ret <2 x double> %s
548 }
550 define <3 x double> @v3f64_double(<3 x double> %a, <3 x double> %b, <3 x double> %d, <3 x double> %e) {
551 ; CHECK-SD-LABEL: v3f64_double:
552 ; CHECK-SD: // %bb.0: // %entry
553 ; CHECK-SD-NEXT: // kill: def $d3 killed $d3 def $q3
554 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
555 ; CHECK-SD-NEXT: // kill: def $d4 killed $d4 def $q4
556 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
557 ; CHECK-SD-NEXT: // kill: def $d6 killed $d6 def $q6
558 ; CHECK-SD-NEXT: // kill: def $d7 killed $d7 def $q7
559 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
560 ; CHECK-SD-NEXT: // kill: def $d5 killed $d5 def $q5
561 ; CHECK-SD-NEXT: ldr d16, [sp, #24]
562 ; CHECK-SD-NEXT: ldr d17, [sp]
563 ; CHECK-SD-NEXT: mov v3.d[1], v4.d[0]
564 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
565 ; CHECK-SD-NEXT: mov v6.d[1], v7.d[0]
566 ; CHECK-SD-NEXT: ldp d1, d4, [sp, #8]
567 ; CHECK-SD-NEXT: fcmgt v2.2d, v5.2d, v2.2d
568 ; CHECK-SD-NEXT: mov v1.d[1], v4.d[0]
569 ; CHECK-SD-NEXT: fcmgt v0.2d, v3.2d, v0.2d
570 ; CHECK-SD-NEXT: bsl v2.16b, v17.16b, v16.16b
571 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
572 ; CHECK-SD-NEXT: bsl v0.16b, v6.16b, v1.16b
573 ; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
574 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
575 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
576 ; CHECK-SD-NEXT: ret
577 ;
578 ; CHECK-GI-LABEL: v3f64_double:
579 ; CHECK-GI: // %bb.0: // %entry
580 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
581 ; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3
582 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
583 ; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4
584 ; CHECK-GI-NEXT: // kill: def $d6 killed $d6 def $q6
585 ; CHECK-GI-NEXT: // kill: def $d7 killed $d7 def $q7
586 ; CHECK-GI-NEXT: fcmp d2, d5
587 ; CHECK-GI-NEXT: ldr x8, [sp]
588 ; CHECK-GI-NEXT: ldr x10, [sp, #24]
589 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
590 ; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]
591 ; CHECK-GI-NEXT: mov v6.d[1], v7.d[0]
592 ; CHECK-GI-NEXT: ldp d1, d4, [sp, #8]
593 ; CHECK-GI-NEXT: cset w9, mi
594 ; CHECK-GI-NEXT: sbfx x9, x9, #0, #1
595 ; CHECK-GI-NEXT: fcmgt v0.2d, v3.2d, v0.2d
596 ; CHECK-GI-NEXT: mov v1.d[1], v4.d[0]
597 ; CHECK-GI-NEXT: and x8, x8, x9
598 ; CHECK-GI-NEXT: bic x9, x10, x9
599 ; CHECK-GI-NEXT: orr x8, x8, x9
600 ; CHECK-GI-NEXT: fmov d2, x8
601 ; CHECK-GI-NEXT: bsl v0.16b, v6.16b, v1.16b
602 ; CHECK-GI-NEXT: mov d1, v0.d[1]
603 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
604 ; CHECK-GI-NEXT: ret
605 entry:
606 %c = fcmp olt <3 x double> %a, %b
607 %s = select <3 x i1> %c, <3 x double> %d, <3 x double> %e
608 ret <3 x double> %s
609 }
611 define <4 x double> @v4f64_double(<4 x double> %a, <4 x double> %b, <4 x double> %d, <4 x double> %e) {
612 ; CHECK-SD-LABEL: v4f64_double:
613 ; CHECK-SD: // %bb.0: // %entry
614 ; CHECK-SD-NEXT: fcmgt v1.2d, v3.2d, v1.2d
615 ; CHECK-SD-NEXT: fcmgt v0.2d, v2.2d, v0.2d
616 ; CHECK-SD-NEXT: bsl v1.16b, v5.16b, v7.16b
617 ; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v6.16b
618 ; CHECK-SD-NEXT: ret
619 ;
620 ; CHECK-GI-LABEL: v4f64_double:
621 ; CHECK-GI: // %bb.0: // %entry
622 ; CHECK-GI-NEXT: fcmgt v0.2d, v2.2d, v0.2d
623 ; CHECK-GI-NEXT: fcmgt v1.2d, v3.2d, v1.2d
624 ; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v6.16b
625 ; CHECK-GI-NEXT: bsl v1.16b, v5.16b, v7.16b
626 ; CHECK-GI-NEXT: ret
627 entry:
628 %c = fcmp olt <4 x double> %a, %b
629 %s = select <4 x i1> %c, <4 x double> %d, <4 x double> %e
630 ret <4 x double> %s
631 }
633 define <2 x i32> @v2f64_i32(<2 x double> %a, <2 x double> %b, <2 x i32> %d, <2 x i32> %e) {
634 ; CHECK-LABEL: v2f64_i32:
635 ; CHECK: // %bb.0: // %entry
636 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
637 ; CHECK-NEXT: xtn v0.2s, v0.2d
638 ; CHECK-NEXT: bsl v0.8b, v2.8b, v3.8b
639 ; CHECK-NEXT: ret
640 entry:
641 %c = fcmp olt <2 x double> %a, %b
642 %s = select <2 x i1> %c, <2 x i32> %d, <2 x i32> %e
643 ret <2 x i32> %s
644 }
646 define <3 x i32> @v3f64_i32(<3 x double> %a, <3 x double> %b, <3 x i32> %d, <3 x i32> %e) {
647 ; CHECK-SD-LABEL: v3f64_i32:
648 ; CHECK-SD: // %bb.0: // %entry
649 ; CHECK-SD-NEXT: // kill: def $d3 killed $d3 def $q3
650 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
651 ; CHECK-SD-NEXT: // kill: def $d4 killed $d4 def $q4
652 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
653 ; CHECK-SD-NEXT: // kill: def $d5 killed $d5 def $q5
654 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
655 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
656 ; CHECK-SD-NEXT: mov v3.d[1], v4.d[0]
657 ; CHECK-SD-NEXT: fcmgt v1.2d, v5.2d, v2.2d
658 ; CHECK-SD-NEXT: fcmgt v0.2d, v3.2d, v0.2d
659 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
660 ; CHECK-SD-NEXT: bsl v0.16b, v6.16b, v7.16b
661 ; CHECK-SD-NEXT: ret
662 ;
663 ; CHECK-GI-LABEL: v3f64_i32:
664 ; CHECK-GI: // %bb.0: // %entry
665 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
666 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
667 ; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3
668 ; CHECK-GI-NEXT: mov w8, #31 // =0x1f
669 ; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4
670 ; CHECK-GI-NEXT: fcmp d2, d5
671 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
672 ; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]
673 ; CHECK-GI-NEXT: fmov s1, w8
674 ; CHECK-GI-NEXT: cset w9, mi
675 ; CHECK-GI-NEXT: mov v1.s[1], w8
676 ; CHECK-GI-NEXT: fmov d2, x9
677 ; CHECK-GI-NEXT: fcmgt v0.2d, v3.2d, v0.2d
678 ; CHECK-GI-NEXT: mov v1.s[2], w8
679 ; CHECK-GI-NEXT: mov w8, #-1 // =0xffffffff
680 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v2.4s
681 ; CHECK-GI-NEXT: fmov s2, w8
682 ; CHECK-GI-NEXT: mov v2.s[1], w8
683 ; CHECK-GI-NEXT: ushl v0.4s, v0.4s, v1.4s
684 ; CHECK-GI-NEXT: neg v1.4s, v1.4s
685 ; CHECK-GI-NEXT: mov v2.s[2], w8
686 ; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v1.4s
687 ; CHECK-GI-NEXT: eor v1.16b, v0.16b, v2.16b
688 ; CHECK-GI-NEXT: and v0.16b, v6.16b, v0.16b
689 ; CHECK-GI-NEXT: and v1.16b, v7.16b, v1.16b
690 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
691 ; CHECK-GI-NEXT: ret
692 entry:
693 %c = fcmp olt <3 x double> %a, %b
694 %s = select <3 x i1> %c, <3 x i32> %d, <3 x i32> %e
695 ret <3 x i32> %s
696 }
698 define <4 x i32> @v4f64_i32(<4 x double> %a, <4 x double> %b, <4 x i32> %d, <4 x i32> %e) {
699 ; CHECK-SD-LABEL: v4f64_i32:
700 ; CHECK-SD: // %bb.0: // %entry
701 ; CHECK-SD-NEXT: fcmgt v1.2d, v3.2d, v1.2d
702 ; CHECK-SD-NEXT: fcmgt v0.2d, v2.2d, v0.2d
703 ; CHECK-SD-NEXT: uzp1 v0.4s, v0.4s, v1.4s
704 ; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v5.16b
705 ; CHECK-SD-NEXT: ret
706 ;
707 ; CHECK-GI-LABEL: v4f64_i32:
708 ; CHECK-GI: // %bb.0: // %entry
709 ; CHECK-GI-NEXT: fcmgt v0.2d, v2.2d, v0.2d
710 ; CHECK-GI-NEXT: fcmgt v1.2d, v3.2d, v1.2d
711 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v1.4s
712 ; CHECK-GI-NEXT: shl v0.4s, v0.4s, #31
713 ; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #31
714 ; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v5.16b
715 ; CHECK-GI-NEXT: ret
716 entry:
717 %c = fcmp olt <4 x double> %a, %b
718 %s = select <4 x i1> %c, <4 x i32> %d, <4 x i32> %e
719 ret <4 x i32> %s
720 }
722 define <2 x float> @v2f32_float(<2 x float> %a, <2 x float> %b, <2 x float> %d, <2 x float> %e) {
723 ; CHECK-LABEL: v2f32_float:
724 ; CHECK: // %bb.0: // %entry
725 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
726 ; CHECK-NEXT: bsl v0.8b, v2.8b, v3.8b
727 ; CHECK-NEXT: ret
728 entry:
729 %c = fcmp olt <2 x float> %a, %b
730 %s = select <2 x i1> %c, <2 x float> %d, <2 x float> %e
731 ret <2 x float> %s
732 }
734 define <3 x float> @v3f32_float(<3 x float> %a, <3 x float> %b, <3 x float> %d, <3 x float> %e) {
735 ; CHECK-SD-LABEL: v3f32_float:
736 ; CHECK-SD: // %bb.0: // %entry
737 ; CHECK-SD-NEXT: fcmgt v0.4s, v1.4s, v0.4s
738 ; CHECK-SD-NEXT: bsl v0.16b, v2.16b, v3.16b
739 ; CHECK-SD-NEXT: ret
740 ;
741 ; CHECK-GI-LABEL: v3f32_float:
742 ; CHECK-GI: // %bb.0: // %entry
743 ; CHECK-GI-NEXT: mov w8, #31 // =0x1f
744 ; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
745 ; CHECK-GI-NEXT: fmov s4, w8
746 ; CHECK-GI-NEXT: mov v4.s[1], w8
747 ; CHECK-GI-NEXT: mov v4.s[2], w8
748 ; CHECK-GI-NEXT: mov w8, #-1 // =0xffffffff
749 ; CHECK-GI-NEXT: fmov s1, w8
750 ; CHECK-GI-NEXT: mov v1.s[1], w8
751 ; CHECK-GI-NEXT: ushl v0.4s, v0.4s, v4.4s
752 ; CHECK-GI-NEXT: neg v4.4s, v4.4s
753 ; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v4.4s
754 ; CHECK-GI-NEXT: mov v1.s[2], w8
755 ; CHECK-GI-NEXT: eor v1.16b, v0.16b, v1.16b
756 ; CHECK-GI-NEXT: and v0.16b, v2.16b, v0.16b
757 ; CHECK-GI-NEXT: and v1.16b, v3.16b, v1.16b
758 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
759 ; CHECK-GI-NEXT: ret
760 entry:
761 %c = fcmp olt <3 x float> %a, %b
762 %s = select <3 x i1> %c, <3 x float> %d, <3 x float> %e
763 ret <3 x float> %s
764 }
766 define <4 x float> @v4f32_float(<4 x float> %a, <4 x float> %b, <4 x float> %d, <4 x float> %e) {
767 ; CHECK-LABEL: v4f32_float:
768 ; CHECK: // %bb.0: // %entry
769 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
770 ; CHECK-NEXT: bsl v0.16b, v2.16b, v3.16b
771 ; CHECK-NEXT: ret
772 entry:
773 %c = fcmp olt <4 x float> %a, %b
774 %s = select <4 x i1> %c, <4 x float> %d, <4 x float> %e
775 ret <4 x float> %s
776 }
778 define <8 x float> @v8f32_float(<8 x float> %a, <8 x float> %b, <8 x float> %d, <8 x float> %e) {
779 ; CHECK-SD-LABEL: v8f32_float:
780 ; CHECK-SD: // %bb.0: // %entry
781 ; CHECK-SD-NEXT: fcmgt v1.4s, v3.4s, v1.4s
782 ; CHECK-SD-NEXT: fcmgt v0.4s, v2.4s, v0.4s
783 ; CHECK-SD-NEXT: bsl v1.16b, v5.16b, v7.16b
784 ; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v6.16b
785 ; CHECK-SD-NEXT: ret
786 ;
787 ; CHECK-GI-LABEL: v8f32_float:
788 ; CHECK-GI: // %bb.0: // %entry
789 ; CHECK-GI-NEXT: fcmgt v0.4s, v2.4s, v0.4s
790 ; CHECK-GI-NEXT: fcmgt v1.4s, v3.4s, v1.4s
791 ; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v6.16b
792 ; CHECK-GI-NEXT: bsl v1.16b, v5.16b, v7.16b
793 ; CHECK-GI-NEXT: ret
794 entry:
795 %c = fcmp olt <8 x float> %a, %b
796 %s = select <8 x i1> %c, <8 x float> %d, <8 x float> %e
797 ret <8 x float> %s
798 }
800 define <2 x i32> @v2f32_i32(<2 x float> %a, <2 x float> %b, <2 x i32> %d, <2 x i32> %e) {
801 ; CHECK-LABEL: v2f32_i32:
802 ; CHECK: // %bb.0: // %entry
803 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
804 ; CHECK-NEXT: bsl v0.8b, v2.8b, v3.8b
805 ; CHECK-NEXT: ret
806 entry:
807 %c = fcmp olt <2 x float> %a, %b
808 %s = select <2 x i1> %c, <2 x i32> %d, <2 x i32> %e
809 ret <2 x i32> %s
810 }
812 define <3 x i32> @v3f32_i32(<3 x float> %a, <3 x float> %b, <3 x i32> %d, <3 x i32> %e) {
813 ; CHECK-SD-LABEL: v3f32_i32:
814 ; CHECK-SD: // %bb.0: // %entry
815 ; CHECK-SD-NEXT: fcmgt v0.4s, v1.4s, v0.4s
816 ; CHECK-SD-NEXT: bsl v0.16b, v2.16b, v3.16b
817 ; CHECK-SD-NEXT: ret
818 ;
819 ; CHECK-GI-LABEL: v3f32_i32:
820 ; CHECK-GI: // %bb.0: // %entry
821 ; CHECK-GI-NEXT: mov w8, #31 // =0x1f
822 ; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
823 ; CHECK-GI-NEXT: fmov s4, w8
824 ; CHECK-GI-NEXT: mov v4.s[1], w8
825 ; CHECK-GI-NEXT: mov v4.s[2], w8
826 ; CHECK-GI-NEXT: mov w8, #-1 // =0xffffffff
827 ; CHECK-GI-NEXT: fmov s1, w8
828 ; CHECK-GI-NEXT: mov v1.s[1], w8
829 ; CHECK-GI-NEXT: ushl v0.4s, v0.4s, v4.4s
830 ; CHECK-GI-NEXT: neg v4.4s, v4.4s
831 ; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v4.4s
832 ; CHECK-GI-NEXT: mov v1.s[2], w8
833 ; CHECK-GI-NEXT: eor v1.16b, v0.16b, v1.16b
834 ; CHECK-GI-NEXT: and v0.16b, v2.16b, v0.16b
835 ; CHECK-GI-NEXT: and v1.16b, v3.16b, v1.16b
836 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
837 ; CHECK-GI-NEXT: ret
838 entry:
839 %c = fcmp olt <3 x float> %a, %b
840 %s = select <3 x i1> %c, <3 x i32> %d, <3 x i32> %e
841 ret <3 x i32> %s
842 }
844 define <4 x i32> @v4f32_i32(<4 x float> %a, <4 x float> %b, <4 x i32> %d, <4 x i32> %e) {
845 ; CHECK-LABEL: v4f32_i32:
846 ; CHECK: // %bb.0: // %entry
847 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
848 ; CHECK-NEXT: bsl v0.16b, v2.16b, v3.16b
849 ; CHECK-NEXT: ret
850 entry:
851 %c = fcmp olt <4 x float> %a, %b
852 %s = select <4 x i1> %c, <4 x i32> %d, <4 x i32> %e
853 ret <4 x i32> %s
854 }
856 define <8 x i32> @v8f32_i32(<8 x float> %a, <8 x float> %b, <8 x i32> %d, <8 x i32> %e) {
857 ; CHECK-SD-LABEL: v8f32_i32:
858 ; CHECK-SD: // %bb.0: // %entry
859 ; CHECK-SD-NEXT: fcmgt v1.4s, v3.4s, v1.4s
860 ; CHECK-SD-NEXT: fcmgt v0.4s, v2.4s, v0.4s
861 ; CHECK-SD-NEXT: bsl v1.16b, v5.16b, v7.16b
862 ; CHECK-SD-NEXT: bsl v0.16b, v4.16b, v6.16b
863 ; CHECK-SD-NEXT: ret
864 ;
865 ; CHECK-GI-LABEL: v8f32_i32:
866 ; CHECK-GI: // %bb.0: // %entry
867 ; CHECK-GI-NEXT: fcmgt v0.4s, v2.4s, v0.4s
868 ; CHECK-GI-NEXT: fcmgt v1.4s, v3.4s, v1.4s
869 ; CHECK-GI-NEXT: bsl v0.16b, v4.16b, v6.16b
870 ; CHECK-GI-NEXT: bsl v1.16b, v5.16b, v7.16b
871 ; CHECK-GI-NEXT: ret
872 entry:
873 %c = fcmp olt <8 x float> %a, %b
874 %s = select <8 x i1> %c, <8 x i32> %d, <8 x i32> %e
875 ret <8 x i32> %s
876 }
878 define <7 x half> @v7f16_half(<7 x half> %a, <7 x half> %b, <7 x half> %d, <7 x half> %e) {
879 ; CHECK-SD-NOFP16-LABEL: v7f16_half:
880 ; CHECK-SD-NOFP16: // %bb.0: // %entry
881 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[1]
882 ; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[1]
883 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h1
884 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h0
885 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
886 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
887 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
888 ; CHECK-SD-NOFP16-NEXT: fcmp s5, s4
889 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
890 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[3]
891 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
892 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
893 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
894 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
895 ; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[3]
896 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
897 ; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[4]
898 ; CHECK-SD-NOFP16-NEXT: csetm w9, mi
899 ; CHECK-SD-NOFP16-NEXT: fcmp s4, s7
900 ; CHECK-SD-NOFP16-NEXT: fmov s4, w9
901 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
902 ; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[4]
903 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
904 ; CHECK-SD-NOFP16-NEXT: mov v4.h[1], w8
905 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
906 ; CHECK-SD-NOFP16-NEXT: fcmp s6, s5
907 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[5]
908 ; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[5]
909 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
910 ; CHECK-SD-NOFP16-NEXT: mov v4.h[2], w8
911 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
912 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
913 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
914 ; CHECK-SD-NOFP16-NEXT: fcmp s16, s7
915 ; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[6]
916 ; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[6]
917 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7]
918 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]
919 ; CHECK-SD-NOFP16-NEXT: mov v4.h[3], w8
920 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
921 ; CHECK-SD-NOFP16-NEXT: fcmp s6, s5
922 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h7
923 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h16
924 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
925 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
926 ; CHECK-SD-NOFP16-NEXT: mov v4.h[4], w8
927 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
928 ; CHECK-SD-NOFP16-NEXT: fcmp s6, s5
929 ; CHECK-SD-NOFP16-NEXT: mov v4.h[5], w8
930 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
931 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s1
932 ; CHECK-SD-NOFP16-NEXT: mov v4.h[6], w8
933 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
934 ; CHECK-SD-NOFP16-NEXT: mov v4.h[7], w8
935 ; CHECK-SD-NOFP16-NEXT: mov v0.16b, v4.16b
936 ; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b
937 ; CHECK-SD-NOFP16-NEXT: ret
938 ;
939 ; CHECK-SD-FP16-LABEL: v7f16_half:
940 ; CHECK-SD-FP16: // %bb.0: // %entry
941 ; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
942 ; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b
943 ; CHECK-SD-FP16-NEXT: ret
944 ;
945 ; CHECK-GI-NOFP16-LABEL: v7f16_half:
946 ; CHECK-GI-NOFP16: // %bb.0: // %entry
947 ; CHECK-GI-NOFP16-NEXT: mov w8, #15 // =0xf
948 ; CHECK-GI-NOFP16-NEXT: mov h5, v0.h[4]
949 ; CHECK-GI-NOFP16-NEXT: mov h6, v0.h[5]
950 ; CHECK-GI-NOFP16-NEXT: fmov s4, w8
951 ; CHECK-GI-NOFP16-NEXT: mov h16, v1.h[4]
952 ; CHECK-GI-NOFP16-NEXT: mov w8, #65535 // =0xffff
953 ; CHECK-GI-NOFP16-NEXT: mov h17, v1.h[5]
954 ; CHECK-GI-NOFP16-NEXT: mov h18, v0.h[6]
955 ; CHECK-GI-NOFP16-NEXT: mov h19, v1.h[6]
956 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
957 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
958 ; CHECK-GI-NOFP16-NEXT: mov v7.16b, v4.16b
959 ; CHECK-GI-NOFP16-NEXT: mov v5.h[1], v6.h[0]
960 ; CHECK-GI-NOFP16-NEXT: fmov s6, w8
961 ; CHECK-GI-NOFP16-NEXT: mov v16.h[1], v17.h[0]
962 ; CHECK-GI-NOFP16-NEXT: mov v7.h[1], v4.h[0]
963 ; CHECK-GI-NOFP16-NEXT: mov v17.16b, v6.16b
964 ; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s
965 ; CHECK-GI-NOFP16-NEXT: mov v5.h[2], v18.h[0]
966 ; CHECK-GI-NOFP16-NEXT: mov v17.h[1], v6.h[0]
967 ; CHECK-GI-NOFP16-NEXT: mov v16.h[2], v19.h[0]
968 ; CHECK-GI-NOFP16-NEXT: mov v7.h[2], v4.h[0]
969 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v5.4h
970 ; CHECK-GI-NOFP16-NEXT: mov v17.h[2], v6.h[0]
971 ; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v16.4h
972 ; CHECK-GI-NOFP16-NEXT: mov v7.h[3], v4.h[0]
973 ; CHECK-GI-NOFP16-NEXT: mov v17.h[3], v6.h[0]
974 ; CHECK-GI-NOFP16-NEXT: fcmgt v1.4s, v16.4s, v5.4s
975 ; CHECK-GI-NOFP16-NEXT: mov v7.h[4], v4.h[0]
976 ; CHECK-GI-NOFP16-NEXT: mov v17.h[4], v6.h[0]
977 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v0.8h, v1.8h
978 ; CHECK-GI-NOFP16-NEXT: mov v7.h[5], v4.h[0]
979 ; CHECK-GI-NOFP16-NEXT: mov v17.h[5], v6.h[0]
980 ; CHECK-GI-NOFP16-NEXT: mov v7.h[6], v4.h[0]
981 ; CHECK-GI-NOFP16-NEXT: mov v17.h[6], v6.h[0]
982 ; CHECK-GI-NOFP16-NEXT: ushl v0.8h, v0.8h, v7.8h
983 ; CHECK-GI-NOFP16-NEXT: neg v1.8h, v7.8h
984 ; CHECK-GI-NOFP16-NEXT: sshl v0.8h, v0.8h, v1.8h
985 ; CHECK-GI-NOFP16-NEXT: eor v1.16b, v0.16b, v17.16b
986 ; CHECK-GI-NOFP16-NEXT: and v0.16b, v2.16b, v0.16b
987 ; CHECK-GI-NOFP16-NEXT: and v1.16b, v3.16b, v1.16b
988 ; CHECK-GI-NOFP16-NEXT: orr v0.16b, v0.16b, v1.16b
989 ; CHECK-GI-NOFP16-NEXT: ret
990 ;
991 ; CHECK-GI-FP16-LABEL: v7f16_half:
992 ; CHECK-GI-FP16: // %bb.0: // %entry
993 ; CHECK-GI-FP16-NEXT: mov w8, #15 // =0xf
994 ; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
995 ; CHECK-GI-FP16-NEXT: fmov s4, w8
996 ; CHECK-GI-FP16-NEXT: mov w8, #65535 // =0xffff
997 ; CHECK-GI-FP16-NEXT: fmov s6, w8
998 ; CHECK-GI-FP16-NEXT: mov v5.16b, v4.16b
999 ; CHECK-GI-FP16-NEXT: mov v7.16b, v6.16b
1000 ; CHECK-GI-FP16-NEXT: mov v5.h[1], v4.h[0]
1001 ; CHECK-GI-FP16-NEXT: mov v7.h[1], v6.h[0]
1002 ; CHECK-GI-FP16-NEXT: mov v5.h[2], v4.h[0]
1003 ; CHECK-GI-FP16-NEXT: mov v7.h[2], v6.h[0]
1004 ; CHECK-GI-FP16-NEXT: mov v5.h[3], v4.h[0]
1005 ; CHECK-GI-FP16-NEXT: mov v7.h[3], v6.h[0]
1006 ; CHECK-GI-FP16-NEXT: mov v5.h[4], v4.h[0]
1007 ; CHECK-GI-FP16-NEXT: mov v7.h[4], v6.h[0]
1008 ; CHECK-GI-FP16-NEXT: mov v5.h[5], v4.h[0]
1009 ; CHECK-GI-FP16-NEXT: mov v7.h[5], v6.h[0]
1010 ; CHECK-GI-FP16-NEXT: mov v5.h[6], v4.h[0]
1011 ; CHECK-GI-FP16-NEXT: mov v7.h[6], v6.h[0]
1012 ; CHECK-GI-FP16-NEXT: ushl v0.8h, v0.8h, v5.8h
1013 ; CHECK-GI-FP16-NEXT: neg v1.8h, v5.8h
1014 ; CHECK-GI-FP16-NEXT: sshl v0.8h, v0.8h, v1.8h
1015 ; CHECK-GI-FP16-NEXT: eor v1.16b, v0.16b, v7.16b
1016 ; CHECK-GI-FP16-NEXT: and v0.16b, v2.16b, v0.16b
1017 ; CHECK-GI-FP16-NEXT: and v1.16b, v3.16b, v1.16b
1018 ; CHECK-GI-FP16-NEXT: orr v0.16b, v0.16b, v1.16b
1019 ; CHECK-GI-FP16-NEXT: ret
1020 entry:
1021 %c = fcmp olt <7 x half> %a, %b
1022 %s = select <7 x i1> %c, <7 x half> %d, <7 x half> %e
1023 ret <7 x half> %s
1024 }
1026 define <4 x half> @v4f16_half(<4 x half> %a, <4 x half> %b, <4 x half> %d, <4 x half> %e) {
1027 ; CHECK-SD-NOFP16-LABEL: v4f16_half:
1028 ; CHECK-SD-NOFP16: // %bb.0: // %entry
1029 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
1030 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
1031 ; CHECK-SD-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s
1032 ; CHECK-SD-NOFP16-NEXT: xtn v0.4h, v0.4s
1033 ; CHECK-SD-NOFP16-NEXT: bsl v0.8b, v2.8b, v3.8b
1034 ; CHECK-SD-NOFP16-NEXT: ret
1035 ;
1036 ; CHECK-SD-FP16-LABEL: v4f16_half:
1037 ; CHECK-SD-FP16: // %bb.0: // %entry
1038 ; CHECK-SD-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h
1039 ; CHECK-SD-FP16-NEXT: bsl v0.8b, v2.8b, v3.8b
1040 ; CHECK-SD-FP16-NEXT: ret
1041 ;
1042 ; CHECK-GI-NOFP16-LABEL: v4f16_half:
1043 ; CHECK-GI-NOFP16: // %bb.0: // %entry
1044 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
1045 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
1046 ; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s
1047 ; CHECK-GI-NOFP16-NEXT: xtn v0.4h, v0.4s
1048 ; CHECK-GI-NOFP16-NEXT: bsl v0.8b, v2.8b, v3.8b
1049 ; CHECK-GI-NOFP16-NEXT: ret
1050 ;
1051 ; CHECK-GI-FP16-LABEL: v4f16_half:
1052 ; CHECK-GI-FP16: // %bb.0: // %entry
1053 ; CHECK-GI-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h
1054 ; CHECK-GI-FP16-NEXT: bsl v0.8b, v2.8b, v3.8b
1055 ; CHECK-GI-FP16-NEXT: ret
1056 entry:
1057 %c = fcmp olt <4 x half> %a, %b
1058 %s = select <4 x i1> %c, <4 x half> %d, <4 x half> %e
1059 ret <4 x half> %s
1060 }
1062 define <8 x half> @v8f16_half(<8 x half> %a, <8 x half> %b, <8 x half> %d, <8 x half> %e) {
1063 ; CHECK-SD-NOFP16-LABEL: v8f16_half:
1064 ; CHECK-SD-NOFP16: // %bb.0: // %entry
1065 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[1]
1066 ; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[1]
1067 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h1
1068 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h0
1069 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
1070 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
1071 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
1072 ; CHECK-SD-NOFP16-NEXT: fcmp s5, s4
1073 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[2]
1074 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[3]
1075 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1076 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
1077 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h16
1078 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
1079 ; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[3]
1080 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
1081 ; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[4]
1082 ; CHECK-SD-NOFP16-NEXT: csetm w9, mi
1083 ; CHECK-SD-NOFP16-NEXT: fcmp s4, s7
1084 ; CHECK-SD-NOFP16-NEXT: fmov s4, w9
1085 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
1086 ; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[4]
1087 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1088 ; CHECK-SD-NOFP16-NEXT: mov v4.h[1], w8
1089 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1090 ; CHECK-SD-NOFP16-NEXT: fcmp s6, s5
1091 ; CHECK-SD-NOFP16-NEXT: mov h5, v1.h[5]
1092 ; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[5]
1093 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
1094 ; CHECK-SD-NOFP16-NEXT: mov v4.h[2], w8
1095 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1096 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
1097 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
1098 ; CHECK-SD-NOFP16-NEXT: fcmp s16, s7
1099 ; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[6]
1100 ; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[6]
1101 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7]
1102 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]
1103 ; CHECK-SD-NOFP16-NEXT: mov v4.h[3], w8
1104 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1105 ; CHECK-SD-NOFP16-NEXT: fcmp s6, s5
1106 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h7
1107 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h16
1108 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
1109 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
1110 ; CHECK-SD-NOFP16-NEXT: mov v4.h[4], w8
1111 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1112 ; CHECK-SD-NOFP16-NEXT: fcmp s6, s5
1113 ; CHECK-SD-NOFP16-NEXT: mov v4.h[5], w8
1114 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1115 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s1
1116 ; CHECK-SD-NOFP16-NEXT: mov v4.h[6], w8
1117 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1118 ; CHECK-SD-NOFP16-NEXT: mov v4.h[7], w8
1119 ; CHECK-SD-NOFP16-NEXT: mov v0.16b, v4.16b
1120 ; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1121 ; CHECK-SD-NOFP16-NEXT: ret
1122 ;
1123 ; CHECK-SD-FP16-LABEL: v8f16_half:
1124 ; CHECK-SD-FP16: // %bb.0: // %entry
1125 ; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
1126 ; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1127 ; CHECK-SD-FP16-NEXT: ret
1128 ;
1129 ; CHECK-GI-NOFP16-LABEL: v8f16_half:
1130 ; CHECK-GI-NOFP16: // %bb.0: // %entry
1131 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v0.4h
1132 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
1133 ; CHECK-GI-NOFP16-NEXT: fcvtl v5.4s, v1.4h
1134 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
1135 ; CHECK-GI-NOFP16-NEXT: fcmgt v4.4s, v5.4s, v4.4s
1136 ; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s
1137 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v4.8h, v0.8h
1138 ; CHECK-GI-NOFP16-NEXT: shl v0.8h, v0.8h, #15
1139 ; CHECK-GI-NOFP16-NEXT: sshr v0.8h, v0.8h, #15
1140 ; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1141 ; CHECK-GI-NOFP16-NEXT: ret
1142 ;
1143 ; CHECK-GI-FP16-LABEL: v8f16_half:
1144 ; CHECK-GI-FP16: // %bb.0: // %entry
1145 ; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
1146 ; CHECK-GI-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1147 ; CHECK-GI-FP16-NEXT: ret
1148 entry:
1149 %c = fcmp olt <8 x half> %a, %b
1150 %s = select <8 x i1> %c, <8 x half> %d, <8 x half> %e
1151 ret <8 x half> %s
1152 }
1154 define <16 x half> @v16f16_half(<16 x half> %a, <16 x half> %b, <16 x half> %d, <16 x half> %e) {
1155 ; CHECK-SD-NOFP16-LABEL: v16f16_half:
1156 ; CHECK-SD-NOFP16: // %bb.0: // %entry
1157 ; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[1]
1158 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[1]
1159 ; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[2]
1160 ; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[2]
1161 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h3
1162 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
1163 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1164 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1165 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1166 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1167 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1168 ; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[3]
1169 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[3]
1170 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1171 ; CHECK-SD-NOFP16-NEXT: fcmp s21, s20
1172 ; CHECK-SD-NOFP16-NEXT: mov h20, v3.h[4]
1173 ; CHECK-SD-NOFP16-NEXT: mov h21, v1.h[4]
1174 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1175 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1176 ; CHECK-SD-NOFP16-NEXT: csetm w14, mi
1177 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1178 ; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[5]
1179 ; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[5]
1180 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
1181 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
1182 ; CHECK-SD-NOFP16-NEXT: csetm w13, mi
1183 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1184 ; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[6]
1185 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[6]
1186 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1187 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[7]
1188 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1189 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7]
1190 ; CHECK-SD-NOFP16-NEXT: csetm w11, mi
1191 ; CHECK-SD-NOFP16-NEXT: fcmp s21, s20
1192 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1193 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1194 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
1195 ; CHECK-SD-NOFP16-NEXT: csetm w12, mi
1196 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1197 ; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[1]
1198 ; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[1]
1199 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
1200 ; CHECK-SD-NOFP16-NEXT: csetm w10, mi
1201 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1202 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h18
1203 ; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[2]
1204 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
1205 ; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[2]
1206 ; CHECK-SD-NOFP16-NEXT: csetm w9, mi
1207 ; CHECK-SD-NOFP16-NEXT: fcmp s1, s3
1208 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h2
1209 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h0
1210 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1211 ; CHECK-SD-NOFP16-NEXT: csetm w15, mi
1212 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1213 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[3]
1214 ; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[3]
1215 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1216 ; CHECK-SD-NOFP16-NEXT: csetm w16, mi
1217 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s1
1218 ; CHECK-SD-NOFP16-NEXT: fmov s1, w14
1219 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1220 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1221 ; CHECK-SD-NOFP16-NEXT: csetm w14, mi
1222 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1223 ; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[4]
1224 ; CHECK-SD-NOFP16-NEXT: fmov s3, w14
1225 ; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[4]
1226 ; CHECK-SD-NOFP16-NEXT: mov v1.h[1], w8
1227 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1228 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1229 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[5]
1230 ; CHECK-SD-NOFP16-NEXT: mov v3.h[1], w16
1231 ; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[5]
1232 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1233 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1234 ; CHECK-SD-NOFP16-NEXT: mov v1.h[2], w13
1235 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1236 ; CHECK-SD-NOFP16-NEXT: mov v3.h[2], w8
1237 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1238 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1239 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1240 ; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[6]
1241 ; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[6]
1242 ; CHECK-SD-NOFP16-NEXT: mov v1.h[3], w11
1243 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[7]
1244 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]
1245 ; CHECK-SD-NOFP16-NEXT: mov v3.h[3], w8
1246 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1247 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1248 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h18
1249 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
1250 ; CHECK-SD-NOFP16-NEXT: mov v1.h[4], w12
1251 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
1252 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
1253 ; CHECK-SD-NOFP16-NEXT: mov v3.h[4], w8
1254 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1255 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1256 ; CHECK-SD-NOFP16-NEXT: mov v1.h[5], w10
1257 ; CHECK-SD-NOFP16-NEXT: mov v3.h[5], w8
1258 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1259 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s2
1260 ; CHECK-SD-NOFP16-NEXT: mov v1.h[6], w9
1261 ; CHECK-SD-NOFP16-NEXT: mov v3.h[6], w8
1262 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1263 ; CHECK-SD-NOFP16-NEXT: mov v1.h[7], w15
1264 ; CHECK-SD-NOFP16-NEXT: mov v3.h[7], w8
1265 ; CHECK-SD-NOFP16-NEXT: bsl v1.16b, v5.16b, v7.16b
1266 ; CHECK-SD-NOFP16-NEXT: mov v0.16b, v3.16b
1267 ; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v4.16b, v6.16b
1268 ; CHECK-SD-NOFP16-NEXT: ret
1269 ;
1270 ; CHECK-SD-FP16-LABEL: v16f16_half:
1271 ; CHECK-SD-FP16: // %bb.0: // %entry
1272 ; CHECK-SD-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h
1273 ; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h
1274 ; CHECK-SD-FP16-NEXT: bsl v1.16b, v5.16b, v7.16b
1275 ; CHECK-SD-FP16-NEXT: bsl v0.16b, v4.16b, v6.16b
1276 ; CHECK-SD-FP16-NEXT: ret
1277 ;
1278 ; CHECK-GI-NOFP16-LABEL: v16f16_half:
1279 ; CHECK-GI-NOFP16: // %bb.0: // %entry
1280 ; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v0.4h
1281 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
1282 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.4s, v1.4h
1283 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
1284 ; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v2.4h
1285 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
1286 ; CHECK-GI-NOFP16-NEXT: fcvtl v19.4s, v3.4h
1287 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
1288 ; CHECK-GI-NOFP16-NEXT: fcmgt v16.4s, v18.4s, v16.4s
1289 ; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v2.4s, v0.4s
1290 ; CHECK-GI-NOFP16-NEXT: fcmgt v2.4s, v19.4s, v17.4s
1291 ; CHECK-GI-NOFP16-NEXT: fcmgt v1.4s, v3.4s, v1.4s
1292 ; CHECK-GI-NOFP16-NEXT: uzp1 v0.8h, v16.8h, v0.8h
1293 ; CHECK-GI-NOFP16-NEXT: uzp1 v1.8h, v2.8h, v1.8h
1294 ; CHECK-GI-NOFP16-NEXT: shl v0.8h, v0.8h, #15
1295 ; CHECK-GI-NOFP16-NEXT: shl v1.8h, v1.8h, #15
1296 ; CHECK-GI-NOFP16-NEXT: sshr v0.8h, v0.8h, #15
1297 ; CHECK-GI-NOFP16-NEXT: sshr v1.8h, v1.8h, #15
1298 ; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v4.16b, v6.16b
1299 ; CHECK-GI-NOFP16-NEXT: bsl v1.16b, v5.16b, v7.16b
1300 ; CHECK-GI-NOFP16-NEXT: ret
1301 ;
1302 ; CHECK-GI-FP16-LABEL: v16f16_half:
1303 ; CHECK-GI-FP16: // %bb.0: // %entry
1304 ; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h
1305 ; CHECK-GI-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h
1306 ; CHECK-GI-FP16-NEXT: bsl v0.16b, v4.16b, v6.16b
1307 ; CHECK-GI-FP16-NEXT: bsl v1.16b, v5.16b, v7.16b
1308 ; CHECK-GI-FP16-NEXT: ret
1309 entry:
1310 %c = fcmp olt <16 x half> %a, %b
1311 %s = select <16 x i1> %c, <16 x half> %d, <16 x half> %e
1312 ret <16 x half> %s
1313 }
1315 define <7 x i32> @v7f16_i32(<7 x half> %a, <7 x half> %b, <7 x i32> %d, <7 x i32> %e) {
1316 ; CHECK-SD-NOFP16-LABEL: v7f16_i32:
1317 ; CHECK-SD-NOFP16: // %bb.0: // %entry
1318 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[1]
1319 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[1]
1320 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[2]
1321 ; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[2]
1322 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h1
1323 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h0
1324 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
1325 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
1326 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
1327 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
1328 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s2
1329 ; CHECK-SD-NOFP16-NEXT: mov h2, v1.h[3]
1330 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[3]
1331 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1332 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
1333 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[5]
1334 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[5]
1335 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
1336 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
1337 ; CHECK-SD-NOFP16-NEXT: csetm w9, mi
1338 ; CHECK-SD-NOFP16-NEXT: fcmp s5, s4
1339 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[4]
1340 ; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[4]
1341 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
1342 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
1343 ; CHECK-SD-NOFP16-NEXT: csetm w10, mi
1344 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s2
1345 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h4
1346 ; CHECK-SD-NOFP16-NEXT: mov h4, v1.h[6]
1347 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7]
1348 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h5
1349 ; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[6]
1350 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]
1351 ; CHECK-SD-NOFP16-NEXT: csetm w11, mi
1352 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
1353 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
1354 ; CHECK-SD-NOFP16-NEXT: csetm w12, mi
1355 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s2
1356 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h4
1357 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h5
1358 ; CHECK-SD-NOFP16-NEXT: fmov s4, w9
1359 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
1360 ; CHECK-SD-NOFP16-NEXT: add x9, sp, #8
1361 ; CHECK-SD-NOFP16-NEXT: csetm w13, mi
1362 ; CHECK-SD-NOFP16-NEXT: fmov s5, w13
1363 ; CHECK-SD-NOFP16-NEXT: mov v4.h[1], w8
1364 ; CHECK-SD-NOFP16-NEXT: mov x8, sp
1365 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s2
1366 ; CHECK-SD-NOFP16-NEXT: fmov s2, w7
1367 ; CHECK-SD-NOFP16-NEXT: fmov s3, w0
1368 ; CHECK-SD-NOFP16-NEXT: mov v5.h[1], w12
1369 ; CHECK-SD-NOFP16-NEXT: ld1 { v2.s }[1], [x8]
1370 ; CHECK-SD-NOFP16-NEXT: mov v3.s[1], w1
1371 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1372 ; CHECK-SD-NOFP16-NEXT: mov v4.h[2], w10
1373 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s1
1374 ; CHECK-SD-NOFP16-NEXT: fmov s1, w4
1375 ; CHECK-SD-NOFP16-NEXT: ldr s0, [sp, #24]
1376 ; CHECK-SD-NOFP16-NEXT: mov v5.h[2], w8
1377 ; CHECK-SD-NOFP16-NEXT: ld1 { v2.s }[2], [x9]
1378 ; CHECK-SD-NOFP16-NEXT: add x9, sp, #32
1379 ; CHECK-SD-NOFP16-NEXT: mov v3.s[2], w2
1380 ; CHECK-SD-NOFP16-NEXT: mov v1.s[1], w5
1381 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1382 ; CHECK-SD-NOFP16-NEXT: mov v4.h[3], w11
1383 ; CHECK-SD-NOFP16-NEXT: ld1 { v0.s }[1], [x9]
1384 ; CHECK-SD-NOFP16-NEXT: mov v5.h[3], w8
1385 ; CHECK-SD-NOFP16-NEXT: add x8, sp, #16
1386 ; CHECK-SD-NOFP16-NEXT: ld1 { v2.s }[3], [x8]
1387 ; CHECK-SD-NOFP16-NEXT: mov v3.s[3], w3
1388 ; CHECK-SD-NOFP16-NEXT: add x8, sp, #40
1389 ; CHECK-SD-NOFP16-NEXT: mov v1.s[2], w6
1390 ; CHECK-SD-NOFP16-NEXT: sshll v4.4s, v4.4h, #0
1391 ; CHECK-SD-NOFP16-NEXT: ld1 { v0.s }[2], [x8]
1392 ; CHECK-SD-NOFP16-NEXT: sshll v5.4s, v5.4h, #0
1393 ; CHECK-SD-NOFP16-NEXT: bit v2.16b, v3.16b, v4.16b
1394 ; CHECK-SD-NOFP16-NEXT: bit v0.16b, v1.16b, v5.16b
1395 ; CHECK-SD-NOFP16-NEXT: mov w1, v2.s[1]
1396 ; CHECK-SD-NOFP16-NEXT: mov w2, v2.s[2]
1397 ; CHECK-SD-NOFP16-NEXT: mov w3, v2.s[3]
1398 ; CHECK-SD-NOFP16-NEXT: fmov w0, s2
1399 ; CHECK-SD-NOFP16-NEXT: mov w5, v0.s[1]
1400 ; CHECK-SD-NOFP16-NEXT: mov w6, v0.s[2]
1401 ; CHECK-SD-NOFP16-NEXT: fmov w4, s0
1402 ; CHECK-SD-NOFP16-NEXT: ret
1403 ;
1404 ; CHECK-SD-FP16-LABEL: v7f16_i32:
1405 ; CHECK-SD-FP16: // %bb.0: // %entry
1406 ; CHECK-SD-FP16-NEXT: fmov s2, w0
1407 ; CHECK-SD-FP16-NEXT: fmov s3, w7
1408 ; CHECK-SD-FP16-NEXT: mov x8, sp
1409 ; CHECK-SD-FP16-NEXT: fmov s5, w4
1410 ; CHECK-SD-FP16-NEXT: ldr s4, [sp, #24]
1411 ; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
1412 ; CHECK-SD-FP16-NEXT: add x9, sp, #32
1413 ; CHECK-SD-FP16-NEXT: mov v2.s[1], w1
1414 ; CHECK-SD-FP16-NEXT: ld1 { v3.s }[1], [x8]
1415 ; CHECK-SD-FP16-NEXT: add x8, sp, #8
1416 ; CHECK-SD-FP16-NEXT: mov v5.s[1], w5
1417 ; CHECK-SD-FP16-NEXT: ld1 { v4.s }[1], [x9]
1418 ; CHECK-SD-FP16-NEXT: add x9, sp, #16
1419 ; CHECK-SD-FP16-NEXT: sshll v1.4s, v0.4h, #0
1420 ; CHECK-SD-FP16-NEXT: sshll2 v0.4s, v0.8h, #0
1421 ; CHECK-SD-FP16-NEXT: ld1 { v3.s }[2], [x8]
1422 ; CHECK-SD-FP16-NEXT: add x8, sp, #40
1423 ; CHECK-SD-FP16-NEXT: mov v2.s[2], w2
1424 ; CHECK-SD-FP16-NEXT: ld1 { v4.s }[2], [x8]
1425 ; CHECK-SD-FP16-NEXT: mov v5.s[2], w6
1426 ; CHECK-SD-FP16-NEXT: ld1 { v3.s }[3], [x9]
1427 ; CHECK-SD-FP16-NEXT: mov v2.s[3], w3
1428 ; CHECK-SD-FP16-NEXT: bsl v0.16b, v5.16b, v4.16b
1429 ; CHECK-SD-FP16-NEXT: bsl v1.16b, v2.16b, v3.16b
1430 ; CHECK-SD-FP16-NEXT: mov w5, v0.s[1]
1431 ; CHECK-SD-FP16-NEXT: mov w6, v0.s[2]
1432 ; CHECK-SD-FP16-NEXT: fmov w4, s0
1433 ; CHECK-SD-FP16-NEXT: mov w1, v1.s[1]
1434 ; CHECK-SD-FP16-NEXT: mov w2, v1.s[2]
1435 ; CHECK-SD-FP16-NEXT: mov w3, v1.s[3]
1436 ; CHECK-SD-FP16-NEXT: fmov w0, s1
1437 ; CHECK-SD-FP16-NEXT: ret
1438 ;
1439 ; CHECK-GI-NOFP16-LABEL: v7f16_i32:
1440 ; CHECK-GI-NOFP16: // %bb.0: // %entry
1441 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[4]
1442 ; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[5]
1443 ; CHECK-GI-NOFP16-NEXT: mov w8, #31 // =0x1f
1444 ; CHECK-GI-NOFP16-NEXT: mov h4, v1.h[4]
1445 ; CHECK-GI-NOFP16-NEXT: mov h5, v1.h[5]
1446 ; CHECK-GI-NOFP16-NEXT: ldr s17, [sp, #32]
1447 ; CHECK-GI-NOFP16-NEXT: mov h6, v0.h[6]
1448 ; CHECK-GI-NOFP16-NEXT: mov h7, v1.h[6]
1449 ; CHECK-GI-NOFP16-NEXT: fmov s16, w0
1450 ; CHECK-GI-NOFP16-NEXT: fmov s18, w4
1451 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
1452 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
1453 ; CHECK-GI-NOFP16-NEXT: mov v2.h[1], v3.h[0]
1454 ; CHECK-GI-NOFP16-NEXT: fmov s3, w8
1455 ; CHECK-GI-NOFP16-NEXT: mov v4.h[1], v5.h[0]
1456 ; CHECK-GI-NOFP16-NEXT: ldr s5, [sp]
1457 ; CHECK-GI-NOFP16-NEXT: mov v16.s[1], w1
1458 ; CHECK-GI-NOFP16-NEXT: mov v18.s[1], w5
1459 ; CHECK-GI-NOFP16-NEXT: mov v3.s[1], w8
1460 ; CHECK-GI-NOFP16-NEXT: fmov w9, s5
1461 ; CHECK-GI-NOFP16-NEXT: fmov s5, w7
1462 ; CHECK-GI-NOFP16-NEXT: mov v2.h[2], v6.h[0]
1463 ; CHECK-GI-NOFP16-NEXT: ldr s6, [sp, #8]
1464 ; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s
1465 ; CHECK-GI-NOFP16-NEXT: mov v4.h[2], v7.h[0]
1466 ; CHECK-GI-NOFP16-NEXT: ldr s7, [sp, #24]
1467 ; CHECK-GI-NOFP16-NEXT: mov v16.s[2], w2
1468 ; CHECK-GI-NOFP16-NEXT: mov v5.s[1], w9
1469 ; CHECK-GI-NOFP16-NEXT: fmov w9, s6
1470 ; CHECK-GI-NOFP16-NEXT: ldr s6, [sp, #16]
1471 ; CHECK-GI-NOFP16-NEXT: mov v3.s[2], w8
1472 ; CHECK-GI-NOFP16-NEXT: mov w8, #-1 // =0xffffffff
1473 ; CHECK-GI-NOFP16-NEXT: mov v7.s[1], v17.s[0]
1474 ; CHECK-GI-NOFP16-NEXT: ldr s17, [sp, #40]
1475 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
1476 ; CHECK-GI-NOFP16-NEXT: mov v18.s[2], w6
1477 ; CHECK-GI-NOFP16-NEXT: fcvtl v4.4s, v4.4h
1478 ; CHECK-GI-NOFP16-NEXT: mov v16.s[3], w3
1479 ; CHECK-GI-NOFP16-NEXT: mov v5.s[2], w9
1480 ; CHECK-GI-NOFP16-NEXT: mov v7.s[2], v17.s[0]
1481 ; CHECK-GI-NOFP16-NEXT: fcmgt v2.4s, v4.4s, v2.4s
1482 ; CHECK-GI-NOFP16-NEXT: fmov s4, w8
1483 ; CHECK-GI-NOFP16-NEXT: mov v4.s[1], w8
1484 ; CHECK-GI-NOFP16-NEXT: ushl v2.4s, v2.4s, v3.4s
1485 ; CHECK-GI-NOFP16-NEXT: neg v3.4s, v3.4s
1486 ; CHECK-GI-NOFP16-NEXT: mov v4.s[2], w8
1487 ; CHECK-GI-NOFP16-NEXT: sshl v2.4s, v2.4s, v3.4s
1488 ; CHECK-GI-NOFP16-NEXT: fmov w8, s6
1489 ; CHECK-GI-NOFP16-NEXT: mov v5.s[3], w8
1490 ; CHECK-GI-NOFP16-NEXT: eor v1.16b, v2.16b, v4.16b
1491 ; CHECK-GI-NOFP16-NEXT: and v2.16b, v18.16b, v2.16b
1492 ; CHECK-GI-NOFP16-NEXT: and v1.16b, v7.16b, v1.16b
1493 ; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v16.16b, v5.16b
1494 ; CHECK-GI-NOFP16-NEXT: orr v1.16b, v2.16b, v1.16b
1495 ; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[1]
1496 ; CHECK-GI-NOFP16-NEXT: mov s3, v0.s[2]
1497 ; CHECK-GI-NOFP16-NEXT: mov s4, v0.s[3]
1498 ; CHECK-GI-NOFP16-NEXT: fmov w0, s0
1499 ; CHECK-GI-NOFP16-NEXT: mov s5, v1.s[1]
1500 ; CHECK-GI-NOFP16-NEXT: mov s6, v1.s[2]
1501 ; CHECK-GI-NOFP16-NEXT: fmov w4, s1
1502 ; CHECK-GI-NOFP16-NEXT: fmov w1, s2
1503 ; CHECK-GI-NOFP16-NEXT: fmov w2, s3
1504 ; CHECK-GI-NOFP16-NEXT: fmov w3, s4
1505 ; CHECK-GI-NOFP16-NEXT: fmov w5, s5
1506 ; CHECK-GI-NOFP16-NEXT: fmov w6, s6
1507 ; CHECK-GI-NOFP16-NEXT: ret
1508 ;
1509 ; CHECK-GI-FP16-LABEL: v7f16_i32:
1510 ; CHECK-GI-FP16: // %bb.0: // %entry
1511 ; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
1512 ; CHECK-GI-FP16-NEXT: mov w10, #31 // =0x1f
1513 ; CHECK-GI-FP16-NEXT: ldr s3, [sp]
1514 ; CHECK-GI-FP16-NEXT: fmov s2, w10
1515 ; CHECK-GI-FP16-NEXT: fmov s6, w0
1516 ; CHECK-GI-FP16-NEXT: ldr s4, [sp, #8]
1517 ; CHECK-GI-FP16-NEXT: fmov s17, w4
1518 ; CHECK-GI-FP16-NEXT: ldr s7, [sp, #24]
1519 ; CHECK-GI-FP16-NEXT: ldr s16, [sp, #32]
1520 ; CHECK-GI-FP16-NEXT: umov w8, v0.h[4]
1521 ; CHECK-GI-FP16-NEXT: umov w9, v0.h[5]
1522 ; CHECK-GI-FP16-NEXT: mov v2.s[1], w10
1523 ; CHECK-GI-FP16-NEXT: mov v6.s[1], w1
1524 ; CHECK-GI-FP16-NEXT: mov v17.s[1], w5
1525 ; CHECK-GI-FP16-NEXT: mov v7.s[1], v16.s[0]
1526 ; CHECK-GI-FP16-NEXT: ldr s16, [sp, #40]
1527 ; CHECK-GI-FP16-NEXT: fmov s1, w8
1528 ; CHECK-GI-FP16-NEXT: umov w8, v0.h[6]
1529 ; CHECK-GI-FP16-NEXT: mov v2.s[2], w10
1530 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
1531 ; CHECK-GI-FP16-NEXT: mov v6.s[2], w2
1532 ; CHECK-GI-FP16-NEXT: mov v17.s[2], w6
1533 ; CHECK-GI-FP16-NEXT: mov v7.s[2], v16.s[0]
1534 ; CHECK-GI-FP16-NEXT: mov v1.s[1], w9
1535 ; CHECK-GI-FP16-NEXT: mov w9, #-1 // =0xffffffff
1536 ; CHECK-GI-FP16-NEXT: fmov s5, w9
1537 ; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31
1538 ; CHECK-GI-FP16-NEXT: mov v6.s[3], w3
1539 ; CHECK-GI-FP16-NEXT: mov v1.s[2], w8
1540 ; CHECK-GI-FP16-NEXT: fmov w8, s3
1541 ; CHECK-GI-FP16-NEXT: fmov s3, w7
1542 ; CHECK-GI-FP16-NEXT: mov v5.s[1], w9
1543 ; CHECK-GI-FP16-NEXT: sshr v0.4s, v0.4s, #31
1544 ; CHECK-GI-FP16-NEXT: mov v3.s[1], w8
1545 ; CHECK-GI-FP16-NEXT: fmov w8, s4
1546 ; CHECK-GI-FP16-NEXT: ldr s4, [sp, #16]
1547 ; CHECK-GI-FP16-NEXT: ushl v1.4s, v1.4s, v2.4s
1548 ; CHECK-GI-FP16-NEXT: neg v2.4s, v2.4s
1549 ; CHECK-GI-FP16-NEXT: mov v5.s[2], w9
1550 ; CHECK-GI-FP16-NEXT: mov v3.s[2], w8
1551 ; CHECK-GI-FP16-NEXT: sshl v1.4s, v1.4s, v2.4s
1552 ; CHECK-GI-FP16-NEXT: fmov w8, s4
1553 ; CHECK-GI-FP16-NEXT: eor v2.16b, v1.16b, v5.16b
1554 ; CHECK-GI-FP16-NEXT: and v1.16b, v17.16b, v1.16b
1555 ; CHECK-GI-FP16-NEXT: mov v3.s[3], w8
1556 ; CHECK-GI-FP16-NEXT: and v2.16b, v7.16b, v2.16b
1557 ; CHECK-GI-FP16-NEXT: bsl v0.16b, v6.16b, v3.16b
1558 ; CHECK-GI-FP16-NEXT: orr v1.16b, v1.16b, v2.16b
1559 ; CHECK-GI-FP16-NEXT: mov s2, v0.s[1]
1560 ; CHECK-GI-FP16-NEXT: mov s3, v0.s[2]
1561 ; CHECK-GI-FP16-NEXT: mov s4, v0.s[3]
1562 ; CHECK-GI-FP16-NEXT: mov s5, v1.s[1]
1563 ; CHECK-GI-FP16-NEXT: mov s6, v1.s[2]
1564 ; CHECK-GI-FP16-NEXT: fmov w0, s0
1565 ; CHECK-GI-FP16-NEXT: fmov w4, s1
1566 ; CHECK-GI-FP16-NEXT: fmov w1, s2
1567 ; CHECK-GI-FP16-NEXT: fmov w2, s3
1568 ; CHECK-GI-FP16-NEXT: fmov w3, s4
1569 ; CHECK-GI-FP16-NEXT: fmov w5, s5
1570 ; CHECK-GI-FP16-NEXT: fmov w6, s6
1571 ; CHECK-GI-FP16-NEXT: ret
1572 entry:
1573 %c = fcmp olt <7 x half> %a, %b
1574 %s = select <7 x i1> %c, <7 x i32> %d, <7 x i32> %e
1575 ret <7 x i32> %s
1576 }
1578 define <4 x i32> @v4f16_i32(<4 x half> %a, <4 x half> %b, <4 x i32> %d, <4 x i32> %e) {
1579 ; CHECK-SD-NOFP16-LABEL: v4f16_i32:
1580 ; CHECK-SD-NOFP16: // %bb.0: // %entry
1581 ; CHECK-SD-NOFP16-NEXT: fcvtl v0.4s, v0.4h
1582 ; CHECK-SD-NOFP16-NEXT: fcvtl v1.4s, v1.4h
1583 ; CHECK-SD-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s
1584 ; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1585 ; CHECK-SD-NOFP16-NEXT: ret
1586 ;
1587 ; CHECK-SD-FP16-LABEL: v4f16_i32:
1588 ; CHECK-SD-FP16: // %bb.0: // %entry
1589 ; CHECK-SD-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h
1590 ; CHECK-SD-FP16-NEXT: sshll v0.4s, v0.4h, #0
1591 ; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1592 ; CHECK-SD-FP16-NEXT: ret
1593 ;
1594 ; CHECK-GI-NOFP16-LABEL: v4f16_i32:
1595 ; CHECK-GI-NOFP16: // %bb.0: // %entry
1596 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
1597 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
1598 ; CHECK-GI-NOFP16-NEXT: fcmgt v0.4s, v1.4s, v0.4s
1599 ; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1600 ; CHECK-GI-NOFP16-NEXT: ret
1601 ;
1602 ; CHECK-GI-FP16-LABEL: v4f16_i32:
1603 ; CHECK-GI-FP16: // %bb.0: // %entry
1604 ; CHECK-GI-FP16-NEXT: fcmgt v0.4h, v1.4h, v0.4h
1605 ; CHECK-GI-FP16-NEXT: ushll v0.4s, v0.4h, #0
1606 ; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31
1607 ; CHECK-GI-FP16-NEXT: sshr v0.4s, v0.4s, #31
1608 ; CHECK-GI-FP16-NEXT: bsl v0.16b, v2.16b, v3.16b
1609 ; CHECK-GI-FP16-NEXT: ret
1610 entry:
1611 %c = fcmp olt <4 x half> %a, %b
1612 %s = select <4 x i1> %c, <4 x i32> %d, <4 x i32> %e
1613 ret <4 x i32> %s
1614 }
1616 define <8 x i32> @v8f16_i32(<8 x half> %a, <8 x half> %b, <8 x i32> %d, <8 x i32> %e) {
1617 ; CHECK-SD-NOFP16-LABEL: v8f16_i32:
1618 ; CHECK-SD-NOFP16: // %bb.0: // %entry
1619 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[5]
1620 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[5]
1621 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[4]
1622 ; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[4]
1623 ; CHECK-SD-NOFP16-NEXT: mov h18, v1.h[6]
1624 ; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[6]
1625 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
1626 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
1627 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1628 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1629 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1630 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1631 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
1632 ; CHECK-SD-NOFP16-NEXT: mov h6, v1.h[7]
1633 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[7]
1634 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1635 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1636 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[1]
1637 ; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[1]
1638 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
1639 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
1640 ; CHECK-SD-NOFP16-NEXT: csetm w9, mi
1641 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1642 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1643 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1644 ; CHECK-SD-NOFP16-NEXT: csetm w10, mi
1645 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
1646 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h1
1647 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h0
1648 ; CHECK-SD-NOFP16-NEXT: csetm w11, mi
1649 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1650 ; CHECK-SD-NOFP16-NEXT: mov h16, v1.h[2]
1651 ; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[2]
1652 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
1653 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
1654 ; CHECK-SD-NOFP16-NEXT: csetm w12, mi
1655 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
1656 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h16
1657 ; CHECK-SD-NOFP16-NEXT: fmov s16, w9
1658 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h17
1659 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
1660 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
1661 ; CHECK-SD-NOFP16-NEXT: csetm w13, mi
1662 ; CHECK-SD-NOFP16-NEXT: fmov s17, w13
1663 ; CHECK-SD-NOFP16-NEXT: mov v16.h[1], w8
1664 ; CHECK-SD-NOFP16-NEXT: fcmp s7, s6
1665 ; CHECK-SD-NOFP16-NEXT: mov v17.h[1], w12
1666 ; CHECK-SD-NOFP16-NEXT: mov v16.h[2], w10
1667 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1668 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s1
1669 ; CHECK-SD-NOFP16-NEXT: mov v17.h[2], w8
1670 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1671 ; CHECK-SD-NOFP16-NEXT: mov v16.h[3], w11
1672 ; CHECK-SD-NOFP16-NEXT: mov v17.h[3], w8
1673 ; CHECK-SD-NOFP16-NEXT: sshll v1.4s, v16.4h, #0
1674 ; CHECK-SD-NOFP16-NEXT: sshll v0.4s, v17.4h, #0
1675 ; CHECK-SD-NOFP16-NEXT: bsl v1.16b, v3.16b, v5.16b
1676 ; CHECK-SD-NOFP16-NEXT: bsl v0.16b, v2.16b, v4.16b
1677 ; CHECK-SD-NOFP16-NEXT: ret
1678 ;
1679 ; CHECK-SD-FP16-LABEL: v8f16_i32:
1680 ; CHECK-SD-FP16: // %bb.0: // %entry
1681 ; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
1682 ; CHECK-SD-FP16-NEXT: sshll v6.4s, v0.4h, #0
1683 ; CHECK-SD-FP16-NEXT: sshll2 v0.4s, v0.8h, #0
1684 ; CHECK-SD-FP16-NEXT: mov v1.16b, v0.16b
1685 ; CHECK-SD-FP16-NEXT: mov v0.16b, v6.16b
1686 ; CHECK-SD-FP16-NEXT: bsl v1.16b, v3.16b, v5.16b
1687 ; CHECK-SD-FP16-NEXT: bsl v0.16b, v2.16b, v4.16b
1688 ; CHECK-SD-FP16-NEXT: ret
1689 ;
1690 ; CHECK-GI-NOFP16-LABEL: v8f16_i32:
1691 ; CHECK-GI-NOFP16: // %bb.0: // %entry
1692 ; CHECK-GI-NOFP16-NEXT: fcvtl v6.4s, v0.4h
1693 ; CHECK-GI-NOFP16-NEXT: fcvtl v7.4s, v1.4h
1694 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
1695 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
1696 ; CHECK-GI-NOFP16-NEXT: fcmgt v6.4s, v7.4s, v6.4s
1697 ; CHECK-GI-NOFP16-NEXT: fcmgt v1.4s, v1.4s, v0.4s
1698 ; CHECK-GI-NOFP16-NEXT: mov v0.16b, v6.16b
1699 ; CHECK-GI-NOFP16-NEXT: bsl v1.16b, v3.16b, v5.16b
1700 ; CHECK-GI-NOFP16-NEXT: bsl v0.16b, v2.16b, v4.16b
1701 ; CHECK-GI-NOFP16-NEXT: ret
1702 ;
1703 ; CHECK-GI-FP16-LABEL: v8f16_i32:
1704 ; CHECK-GI-FP16: // %bb.0: // %entry
1705 ; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v1.8h, v0.8h
1706 ; CHECK-GI-FP16-NEXT: ushll v1.4s, v0.4h, #0
1707 ; CHECK-GI-FP16-NEXT: ushll2 v0.4s, v0.8h, #0
1708 ; CHECK-GI-FP16-NEXT: shl v1.4s, v1.4s, #31
1709 ; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31
1710 ; CHECK-GI-FP16-NEXT: sshr v1.4s, v1.4s, #31
1711 ; CHECK-GI-FP16-NEXT: sshr v6.4s, v0.4s, #31
1712 ; CHECK-GI-FP16-NEXT: mov v0.16b, v1.16b
1713 ; CHECK-GI-FP16-NEXT: mov v1.16b, v6.16b
1714 ; CHECK-GI-FP16-NEXT: bsl v0.16b, v2.16b, v4.16b
1715 ; CHECK-GI-FP16-NEXT: bsl v1.16b, v3.16b, v5.16b
1716 ; CHECK-GI-FP16-NEXT: ret
1717 entry:
1718 %c = fcmp olt <8 x half> %a, %b
1719 %s = select <8 x i1> %c, <8 x i32> %d, <8 x i32> %e
1720 ret <8 x i32> %s
1721 }
1723 define <16 x i32> @v16f16_i32(<16 x half> %a, <16 x half> %b, <16 x i32> %d, <16 x i32> %e) {
1724 ; CHECK-SD-NOFP16-LABEL: v16f16_i32:
1725 ; CHECK-SD-NOFP16: // %bb.0: // %entry
1726 ; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[5]
1727 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[5]
1728 ; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[4]
1729 ; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[4]
1730 ; CHECK-SD-NOFP16-NEXT: mov h20, v3.h[6]
1731 ; CHECK-SD-NOFP16-NEXT: mov h21, v1.h[6]
1732 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1733 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1734 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1735 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1736 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h20
1737 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h21
1738 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1739 ; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[7]
1740 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[7]
1741 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1742 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1743 ; CHECK-SD-NOFP16-NEXT: mov h18, v3.h[1]
1744 ; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[1]
1745 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1746 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1747 ; CHECK-SD-NOFP16-NEXT: csetm w10, mi
1748 ; CHECK-SD-NOFP16-NEXT: fcmp s21, s20
1749 ; CHECK-SD-NOFP16-NEXT: fcvt s20, h3
1750 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1751 ; CHECK-SD-NOFP16-NEXT: fcvt s21, h1
1752 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1753 ; CHECK-SD-NOFP16-NEXT: csetm w9, mi
1754 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1755 ; CHECK-SD-NOFP16-NEXT: mov h16, v3.h[2]
1756 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[2]
1757 ; CHECK-SD-NOFP16-NEXT: mov h3, v3.h[3]
1758 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[3]
1759 ; CHECK-SD-NOFP16-NEXT: csetm w11, mi
1760 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1761 ; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[5]
1762 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1763 ; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[5]
1764 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1765 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
1766 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
1767 ; CHECK-SD-NOFP16-NEXT: csetm w12, mi
1768 ; CHECK-SD-NOFP16-NEXT: fcmp s21, s20
1769 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1770 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1771 ; CHECK-SD-NOFP16-NEXT: csetm w14, mi
1772 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1773 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[4]
1774 ; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[4]
1775 ; CHECK-SD-NOFP16-NEXT: csetm w13, mi
1776 ; CHECK-SD-NOFP16-NEXT: fcmp s1, s3
1777 ; CHECK-SD-NOFP16-NEXT: mov h1, v2.h[6]
1778 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[6]
1779 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
1780 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
1781 ; CHECK-SD-NOFP16-NEXT: csetm w15, mi
1782 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1783 ; CHECK-SD-NOFP16-NEXT: mov h18, v2.h[7]
1784 ; CHECK-SD-NOFP16-NEXT: mov h19, v0.h[7]
1785 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
1786 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
1787 ; CHECK-SD-NOFP16-NEXT: csetm w16, mi
1788 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1789 ; CHECK-SD-NOFP16-NEXT: mov h16, v2.h[1]
1790 ; CHECK-SD-NOFP16-NEXT: mov h17, v0.h[1]
1791 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h18
1792 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h19
1793 ; CHECK-SD-NOFP16-NEXT: csetm w17, mi
1794 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s1
1795 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h16
1796 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h2
1797 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h17
1798 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h0
1799 ; CHECK-SD-NOFP16-NEXT: csetm w18, mi
1800 ; CHECK-SD-NOFP16-NEXT: fcmp s19, s18
1801 ; CHECK-SD-NOFP16-NEXT: fmov s18, w14
1802 ; CHECK-SD-NOFP16-NEXT: fmov s19, w17
1803 ; CHECK-SD-NOFP16-NEXT: csetm w0, mi
1804 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s1
1805 ; CHECK-SD-NOFP16-NEXT: mov h1, v2.h[2]
1806 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[2]
1807 ; CHECK-SD-NOFP16-NEXT: mov h2, v2.h[3]
1808 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[3]
1809 ; CHECK-SD-NOFP16-NEXT: mov v18.h[1], w12
1810 ; CHECK-SD-NOFP16-NEXT: mov v19.h[1], w16
1811 ; CHECK-SD-NOFP16-NEXT: csetm w1, mi
1812 ; CHECK-SD-NOFP16-NEXT: fcmp s17, s16
1813 ; CHECK-SD-NOFP16-NEXT: fmov s16, w10
1814 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
1815 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
1816 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
1817 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
1818 ; CHECK-SD-NOFP16-NEXT: csetm w2, mi
1819 ; CHECK-SD-NOFP16-NEXT: mov v16.h[1], w8
1820 ; CHECK-SD-NOFP16-NEXT: mov v18.h[2], w13
1821 ; CHECK-SD-NOFP16-NEXT: fmov s17, w2
1822 ; CHECK-SD-NOFP16-NEXT: mov v19.h[2], w18
1823 ; CHECK-SD-NOFP16-NEXT: fcmp s3, s1
1824 ; CHECK-SD-NOFP16-NEXT: mov v17.h[1], w1
1825 ; CHECK-SD-NOFP16-NEXT: mov v16.h[2], w9
1826 ; CHECK-SD-NOFP16-NEXT: mov v18.h[3], w15
1827 ; CHECK-SD-NOFP16-NEXT: mov v19.h[3], w0
1828 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1829 ; CHECK-SD-NOFP16-NEXT: fcmp s0, s2
1830 ; CHECK-SD-NOFP16-NEXT: mov v17.h[2], w8
1831 ; CHECK-SD-NOFP16-NEXT: mov v16.h[3], w11
1832 ; CHECK-SD-NOFP16-NEXT: csetm w8, mi
1833 ; CHECK-SD-NOFP16-NEXT: mov v17.h[3], w8
1834 ; CHECK-SD-NOFP16-NEXT: sshll v2.4s, v16.4h, #0
1835 ; CHECK-SD-NOFP16-NEXT: sshll v16.4s, v18.4h, #0
1836 ; CHECK-SD-NOFP16-NEXT: ldp q0, q18, [sp]
1837 ; CHECK-SD-NOFP16-NEXT: sshll v1.4s, v17.4h, #0
1838 ; CHECK-SD-NOFP16-NEXT: sshll v17.4s, v19.4h, #0
1839 ; CHECK-SD-NOFP16-NEXT: ldp q19, q3, [sp, #32]
1840 ; CHECK-SD-NOFP16-NEXT: bit v0.16b, v4.16b, v1.16b
1841 ; CHECK-SD-NOFP16-NEXT: mov v1.16b, v17.16b
1842 ; CHECK-SD-NOFP16-NEXT: bit v3.16b, v7.16b, v2.16b
1843 ; CHECK-SD-NOFP16-NEXT: mov v2.16b, v16.16b
1844 ; CHECK-SD-NOFP16-NEXT: bsl v1.16b, v5.16b, v18.16b
1845 ; CHECK-SD-NOFP16-NEXT: bsl v2.16b, v6.16b, v19.16b
1846 ; CHECK-SD-NOFP16-NEXT: ret
1847 ;
1848 ; CHECK-SD-FP16-LABEL: v16f16_i32:
1849 ; CHECK-SD-FP16: // %bb.0: // %entry
1850 ; CHECK-SD-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h
1851 ; CHECK-SD-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h
1852 ; CHECK-SD-FP16-NEXT: ldp q2, q20, [sp]
1853 ; CHECK-SD-FP16-NEXT: ldp q18, q19, [sp, #32]
1854 ; CHECK-SD-FP16-NEXT: sshll v3.4s, v0.4h, #0
1855 ; CHECK-SD-FP16-NEXT: sshll v16.4s, v1.4h, #0
1856 ; CHECK-SD-FP16-NEXT: sshll2 v17.4s, v1.8h, #0
1857 ; CHECK-SD-FP16-NEXT: sshll2 v1.4s, v0.8h, #0
1858 ; CHECK-SD-FP16-NEXT: mov v0.16b, v3.16b
1859 ; CHECK-SD-FP16-NEXT: mov v3.16b, v17.16b
1860 ; CHECK-SD-FP16-NEXT: bsl v1.16b, v5.16b, v20.16b
1861 ; CHECK-SD-FP16-NEXT: bsl v0.16b, v4.16b, v2.16b
1862 ; CHECK-SD-FP16-NEXT: mov v2.16b, v16.16b
1863 ; CHECK-SD-FP16-NEXT: bsl v3.16b, v7.16b, v19.16b
1864 ; CHECK-SD-FP16-NEXT: bsl v2.16b, v6.16b, v18.16b
1865 ; CHECK-SD-FP16-NEXT: ret
1866 ;
1867 ; CHECK-GI-NOFP16-LABEL: v16f16_i32:
1868 ; CHECK-GI-NOFP16: // %bb.0: // %entry
1869 ; CHECK-GI-NOFP16-NEXT: fcvtl v16.4s, v0.4h
1870 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
1871 ; CHECK-GI-NOFP16-NEXT: fcvtl v17.4s, v1.4h
1872 ; CHECK-GI-NOFP16-NEXT: fcvtl v18.4s, v2.4h
1873 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v2.4s, v2.8h
1874 ; CHECK-GI-NOFP16-NEXT: fcvtl v19.4s, v3.4h
1875 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
1876 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v3.4s, v3.8h
1877 ; CHECK-GI-NOFP16-NEXT: fcmgt v2.4s, v2.4s, v0.4s
1878 ; CHECK-GI-NOFP16-NEXT: fcmgt v17.4s, v19.4s, v17.4s
1879 ; CHECK-GI-NOFP16-NEXT: fcmgt v16.4s, v18.4s, v16.4s
1880 ; CHECK-GI-NOFP16-NEXT: fcmgt v3.4s, v3.4s, v1.4s
1881 ; CHECK-GI-NOFP16-NEXT: ldp q0, q1, [sp]
1882 ; CHECK-GI-NOFP16-NEXT: ldp q18, q19, [sp, #32]
1883 ; CHECK-GI-NOFP16-NEXT: bit v1.16b, v5.16b, v2.16b
1884 ; CHECK-GI-NOFP16-NEXT: mov v2.16b, v17.16b
1885 ; CHECK-GI-NOFP16-NEXT: bit v0.16b, v4.16b, v16.16b
1886 ; CHECK-GI-NOFP16-NEXT: bsl v3.16b, v7.16b, v19.16b
1887 ; CHECK-GI-NOFP16-NEXT: bsl v2.16b, v6.16b, v18.16b
1888 ; CHECK-GI-NOFP16-NEXT: ret
1889 ;
1890 ; CHECK-GI-FP16-LABEL: v16f16_i32:
1891 ; CHECK-GI-FP16: // %bb.0: // %entry
1892 ; CHECK-GI-FP16-NEXT: fcmgt v0.8h, v2.8h, v0.8h
1893 ; CHECK-GI-FP16-NEXT: fcmgt v1.8h, v3.8h, v1.8h
1894 ; CHECK-GI-FP16-NEXT: ldp q18, q19, [sp, #32]
1895 ; CHECK-GI-FP16-NEXT: ushll v2.4s, v0.4h, #0
1896 ; CHECK-GI-FP16-NEXT: ushll2 v0.4s, v0.8h, #0
1897 ; CHECK-GI-FP16-NEXT: ushll v3.4s, v1.4h, #0
1898 ; CHECK-GI-FP16-NEXT: ushll2 v1.4s, v1.8h, #0
1899 ; CHECK-GI-FP16-NEXT: shl v2.4s, v2.4s, #31
1900 ; CHECK-GI-FP16-NEXT: shl v0.4s, v0.4s, #31
1901 ; CHECK-GI-FP16-NEXT: shl v3.4s, v3.4s, #31
1902 ; CHECK-GI-FP16-NEXT: shl v1.4s, v1.4s, #31
1903 ; CHECK-GI-FP16-NEXT: sshr v2.4s, v2.4s, #31
1904 ; CHECK-GI-FP16-NEXT: sshr v16.4s, v0.4s, #31
1905 ; CHECK-GI-FP16-NEXT: sshr v3.4s, v3.4s, #31
1906 ; CHECK-GI-FP16-NEXT: sshr v17.4s, v1.4s, #31
1907 ; CHECK-GI-FP16-NEXT: ldp q0, q1, [sp]
1908 ; CHECK-GI-FP16-NEXT: bit v0.16b, v4.16b, v2.16b
1909 ; CHECK-GI-FP16-NEXT: mov v2.16b, v3.16b
1910 ; CHECK-GI-FP16-NEXT: mov v3.16b, v17.16b
1911 ; CHECK-GI-FP16-NEXT: bit v1.16b, v5.16b, v16.16b
1912 ; CHECK-GI-FP16-NEXT: bsl v2.16b, v6.16b, v18.16b
1913 ; CHECK-GI-FP16-NEXT: bsl v3.16b, v7.16b, v19.16b
1914 ; CHECK-GI-FP16-NEXT: ret
1915 entry:
1916 %c = fcmp olt <16 x half> %a, %b
1917 %s = select <16 x i1> %c, <16 x i32> %d, <16 x i32> %e
1918 ret <16 x i32> %s
1919 }