[LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432)
[llvm-project.git] / llvm / test / CodeGen / X86 / patchable-function-entry.ll
blob54ecd8b1e5dafba6a4bc21bd9fbcb1724645fe23
1 ; RUN: llc -mtriple=i386 %s -o - | FileCheck --check-prefixes=CHECK,X86 %s
2 ; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
3 ; RUN: llc -mtriple=x86_64 -function-sections %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
5 define void @f0() "patchable-function-entry"="0" {
6 ; CHECK-LABEL: f0:
7 ; CHECK-NEXT: .Lfunc_begin0:
8 ; CHECK-NOT:   nop
9 ; CHECK:       ret
10 ; CHECK-NOT:   .section __patchable_function_entries
11   ret void
14 define void @f1() "patchable-function-entry"="1" {
15 ; CHECK-LABEL: f1:
16 ; CHECK-NEXT: .Lfunc_begin1:
17 ; CHECK:       nop
18 ; CHECK-NEXT:  ret
19 ; CHECK:       .section __patchable_function_entries,"awo",@progbits,f1{{$}}
20 ; X86:          .p2align 2
21 ; X86-NEXT:     .long .Lfunc_begin1
22 ; X64:          .p2align 3
23 ; X64-NEXT:     .quad .Lfunc_begin1
24   ret void
27 ;; Without -function-sections, f2 is in the same text section as f1.
28 ;; They share the __patchable_function_entries section.
29 ;; With -function-sections, f1 and f2 are in different text sections.
30 ;; Use separate __patchable_function_entries.
31 define void @f2() "patchable-function-entry"="2" {
32 ; CHECK-LABEL: f2:
33 ; CHECK-NEXT: .Lfunc_begin2:
34 ; X86:          xchgw %ax, %ax
35 ; X64:          xchgw %ax, %ax
36 ; CHECK-NEXT:  ret
37 ; CHECK:       .section __patchable_function_entries,"awo",@progbits,f2{{$}}
38 ; X86:          .p2align 2
39 ; X86-NEXT:     .long .Lfunc_begin2
40 ; X64:          .p2align 3
41 ; X64-NEXT:     .quad .Lfunc_begin2
42   ret void
45 $f3 = comdat any
46 define void @f3() "patchable-function-entry"="3" comdat {
47 ; CHECK-LABEL: f3:
48 ; CHECK-NEXT: .Lfunc_begin3:
49 ; X86:          xchgw %ax, %ax
50 ; X86-NEXT:     nop
51 ; X64:          nopl (%rax)
52 ; CHECK:       ret
53 ; CHECK:       .section __patchable_function_entries,"awoG",@progbits,f3,f3,comdat{{$}}
54 ; X86:          .p2align 2
55 ; X86-NEXT:     .long .Lfunc_begin3
56 ; X64:          .p2align 3
57 ; X64-NEXT:     .quad .Lfunc_begin3
58   ret void
61 $f5 = comdat any
62 define void @f5() "patchable-function-entry"="5" comdat {
63 ; CHECK-LABEL: f5:
64 ; CHECK-NEXT: .Lfunc_begin4:
65 ; X86-COUNT-2:  xchgw %ax, %ax
66 ; X86-NEXT:     nop
67 ; X64:          nopl 8(%rax,%rax)
68 ; CHECK-NEXT:  ret
69 ; CHECK:       .section __patchable_function_entries,"awoG",@progbits,f5,f5,comdat{{$}}
70 ; X86:          .p2align 2
71 ; X86-NEXT:     .long .Lfunc_begin4
72 ; X64:          .p2align 3
73 ; X64-NEXT:     .quad .Lfunc_begin4
74   ret void
77 ;; -fpatchable-function-entry=3,2
78 ;; "patchable-function-prefix" emits data before the function entry label.
79 ;; We emit 1-byte NOPs before the function entry, so that with a partial patch,
80 ;; the remaining instructions do not need to be modified.
81 define void @f3_2() "patchable-function-entry"="1" "patchable-function-prefix"="2" {
82 ; CHECK-LABEL: .type f3_2,@function
83 ; CHECK-NEXT: .Ltmp0:
84 ; CHECK-NEXT:  nop
85 ; CHECK-NEXT:  nop
86 ; CHECK-NEXT: f3_2: # @f3_2
87 ; CHECK:      # %bb.0:
88 ; CHECK-NEXT:  nop
89 ; CHECK-NEXT:  ret
90 ;; .size does not include the prefix.
91 ; CHECK:      .Lfunc_end5:
92 ; CHECK-NEXT: .size f3_2, .Lfunc_end5-f3_2
93 ; CHECK:      .section __patchable_function_entries,"awo",@progbits,f3_2{{$}}
94 ; X86:         .p2align 2
95 ; X86-NEXT:    .long .Ltmp0
96 ; X64:         .p2align 3
97 ; X64-NEXT:    .quad .Ltmp0
98   %frame = alloca i8, i32 16
99   ret void