1 // REQUIRES: x86-registered-target, amdgpu-registered-target
3 // RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fcuda-is-device -std=c++11 \
4 // RUN: -emit-llvm -o - -x hip %s | FileCheck \
5 // RUN: -check-prefixes=COMMON,DEV,NORDC-D %s
7 // RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fcuda-is-device -std=c++11 \
8 // RUN: -emit-llvm -fgpu-rdc -cuid=abc -o - -x hip %s > %t.dev
9 // RUN: cat %t.dev | FileCheck -check-prefixes=COMMON,DEV,RDC-D %s
11 // RUN: %clang_cc1 -triple x86_64-gnu-linux -std=c++11 \
12 // RUN: -emit-llvm -o - -x hip %s | FileCheck \
13 // RUN: -check-prefixes=COMMON,HOST,NORDC %s
15 // RUN: %clang_cc1 -triple x86_64-gnu-linux -std=c++11 \
16 // RUN: -emit-llvm -fgpu-rdc -cuid=abc -o - -x hip %s > %t.host
17 // RUN: cat %t.host | FileCheck -check-prefixes=COMMON,HOST,RDC %s
19 // Check device and host compilation use the same postfix for static
22 // RUN: cat %t.dev %t.host | FileCheck -check-prefix=POSTFIX %s
24 #include "Inputs/cuda.h"
30 // DEV-DAG: @x.managed = addrspace(1) externally_initialized global i32 1, align 4
31 // DEV-DAG: @x = addrspace(1) externally_initialized global i32 addrspace(1)* null
32 // NORDC-DAG: @x.managed = internal global i32 1
33 // RDC-DAG: @x.managed = global i32 1
34 // NORDC-DAG: @x = internal externally_initialized global i32* null
35 // RDC-DAG: @x = externally_initialized global i32* null
36 // HOST-DAG: @[[DEVNAMEX:[0-9]+]] = {{.*}}c"x\00"
37 __managed__ int x = 1;
39 // DEV-DAG: @v.managed = addrspace(1) externally_initialized global [100 x %struct.vec] zeroinitializer, align 4
40 // DEV-DAG: @v = addrspace(1) externally_initialized global [100 x %struct.vec] addrspace(1)* null
41 __managed__ vec v[100];
43 // DEV-DAG: @v2.managed = addrspace(1) externally_initialized global <{ %struct.vec, [99 x %struct.vec] }> <{ %struct.vec { float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 }, [99 x %struct.vec] zeroinitializer }>, align 4
44 // DEV-DAG: @v2 = addrspace(1) externally_initialized global <{ %struct.vec, [99 x %struct.vec] }> addrspace(1)* null
45 __managed__ vec v2[100] = {{1, 1, 1}};
47 // DEV-DAG: @ex.managed = external addrspace(1) global i32, align 4
48 // DEV-DAG: @ex = external addrspace(1) externally_initialized global i32 addrspace(1)*
49 // HOST-DAG: @ex.managed = external global i32
50 // HOST-DAG: @ex = external externally_initialized global i32*
51 extern __managed__ int ex;
53 // NORDC-D-DAG: @_ZL2sx.managed = addrspace(1) externally_initialized global i32 1, align 4
54 // NORDC-D-DAG: @_ZL2sx = addrspace(1) externally_initialized global i32 addrspace(1)* null
55 // RDC-D-DAG: @_ZL2sx__static__[[HASH:.*]].managed = addrspace(1) externally_initialized global i32 1, align 4
56 // RDC-D-DAG: @_ZL2sx__static__[[HASH]] = addrspace(1) externally_initialized global i32 addrspace(1)* null
57 // HOST-DAG: @_ZL2sx.managed = internal global i32 1
58 // HOST-DAG: @_ZL2sx = internal externally_initialized global i32* null
59 // NORDC-DAG: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx\00"
60 // RDC-DAG: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx__static__[[HASH:.*]]\00"
62 // POSTFIX: @_ZL2sx__static__[[HASH:.*]] = addrspace(1) externally_initialized global i32 addrspace(1)* null
63 // POSTFIX: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx__static__[[HASH]]\00"
64 static __managed__ int sx = 1;
66 // DEV-DAG: @llvm.compiler.used
67 // DEV-SAME-DAG: @x.managed
69 // DEV-SAME-DAG: @v.managed
71 // DEV-SAME-DAG: @_ZL2sx.managed
72 // DEV-SAME-DAG: @_ZL2sx
74 // Force ex and sx mitted in device compilation.
75 __global__ void foo(int *z) {
80 // Force ex and sx emitted in host compilatioin.
85 // COMMON-LABEL: define {{.*}}@_Z4loadv()
86 // DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @x, align 4
87 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
88 // DEV: %1 = load i32, i32* %0, align 4
90 // HOST: %ld.managed = load i32*, i32** @x, align 4
91 // HOST: %0 = load i32, i32* %ld.managed, align 4
93 __device__ __host__ int load() {
97 // COMMON-LABEL: define {{.*}}@_Z5storev()
98 // DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @x, align 4
99 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
100 // DEV: store i32 2, i32* %0, align 4
101 // HOST: %ld.managed = load i32*, i32** @x, align 4
102 // HOST: store i32 2, i32* %ld.managed, align 4
103 __device__ __host__ void store() {
107 // COMMON-LABEL: define {{.*}}@_Z10addr_takenv()
108 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
109 // DEV: store i32* %0, i32** %p.ascast, align 8
110 // DEV: %1 = load i32*, i32** %p.ascast, align 8
111 // DEV: store i32 3, i32* %1, align 4
112 // HOST: %ld.managed = load i32*, i32** @x, align 4
113 // HOST: store i32* %ld.managed, i32** %p, align 8
114 // HOST: %0 = load i32*, i32** %p, align 8
115 // HOST: store i32 3, i32* %0, align 4
116 __device__ __host__ void addr_taken() {
121 // HOST-LABEL: define {{.*}}@_Z5load2v()
122 // HOST: %ld.managed = load [100 x %struct.vec]*, [100 x %struct.vec]** @v, align 16
123 // HOST: %0 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %ld.managed, i64 0, i64 1, i32 0
124 // HOST: %1 = load float, float* %0, align 4
125 // HOST: ret float %1
126 __device__ __host__ float load2() {
130 // HOST-LABEL: define {{.*}}@_Z5load3v()
131 // HOST: %ld.managed = load <{ %struct.vec, [99 x %struct.vec] }>*, <{ %struct.vec, [99 x %struct.vec] }>** @v2, align 16
132 // HOST: %0 = bitcast <{ %struct.vec, [99 x %struct.vec] }>* %ld.managed to [100 x %struct.vec]*
133 // HOST: %1 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %0, i64 0, i64 1, i32 1
134 // HOST: %2 = load float, float* %1, align 4
135 // HOST: ret float %2
140 // HOST-LABEL: define {{.*}}@_Z11addr_taken2v()
141 // HOST: %ld.managed = load [100 x %struct.vec]*, [100 x %struct.vec]** @v, align 16
142 // HOST: %0 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %ld.managed, i64 0, i64 1, i32 0
143 // HOST: %1 = ptrtoint float* %0 to i64
144 // HOST: %ld.managed1 = load <{ %struct.vec, [99 x %struct.vec] }>*, <{ %struct.vec, [99 x %struct.vec] }>** @v2, align 16
145 // HOST: %2 = bitcast <{ %struct.vec, [99 x %struct.vec] }>* %ld.managed1 to [100 x %struct.vec]*
146 // HOST: %3 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %2, i64 0, i64 1, i32 1
147 // HOST: %4 = ptrtoint float* %3 to i64
148 // HOST: %5 = sub i64 %4, %1
149 // HOST: %6 = sdiv exact i64 %5, 4
150 // HOST: %7 = sitofp i64 %6 to float
151 // HOST: ret float %7
152 float addr_taken2() {
153 return (float)reinterpret_cast<long>(&(v2[1].y)-&(v[1].x));
156 // COMMON-LABEL: define {{.*}}@_Z5load4v()
157 // DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @ex, align 4
158 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
159 // DEV: %1 = load i32, i32* %0, align 4
161 // HOST: %ld.managed = load i32*, i32** @ex, align 4
162 // HOST: %0 = load i32, i32* %ld.managed, align 4
164 __device__ __host__ int load4() {
168 // HOST-DAG: __hipRegisterManagedVar({{.*}}@x {{.*}}@x.managed {{.*}}@[[DEVNAMEX]]{{.*}}, i64 4, i32 4)
169 // HOST-DAG: __hipRegisterManagedVar({{.*}}@_ZL2sx {{.*}}@_ZL2sx.managed {{.*}}@[[DEVNAMESX]]
170 // HOST-NOT: __hipRegisterManagedVar({{.*}}@ex {{.*}}@ex.managed
171 // HOST-DAG: declare void @__hipRegisterManagedVar(i8**, i8*, i8*, i8*, i64, i32)