[flang][openacc] Use OpenACC terminator instead of fir.unreachable after Stop stmt...
[llvm-project.git] / flang / test / Lower / PowerPC / ppc-vec-splat-elem-order.f90
blob23022a5241b6ea179f06c3ef75ac3d464a325941
1 ! RUN: %flang_fc1 -emit-fir %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="FIR" %s
2 ! RUN: %flang_fc1 -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
3 ! REQUIRES: target=powerpc{{.*}}
5 ! CHECK-LABEL: vec_splat_testf32i64
6 subroutine vec_splat_testf32i64(x)
7 vector(real(4)) :: x, y
8 y = vec_splat(x, 0_8)
9 ! FIR: %[[x:.*]] = fir.load %arg0 : !fir.ref<!fir.vector<4:f32>>
10 ! FIR: %[[idx:.*]] = arith.constant 0 : i64
11 ! FIR: %[[vx:.*]] = fir.convert %[[x]] : (!fir.vector<4:f32>) -> vector<4xf32>
12 ! FIR: %[[c:.*]] = arith.constant 4 : i64
13 ! FIR: %[[u:.*]] = llvm.urem %[[idx]], %[[c]] : i64
14 ! FIR: %[[c2:.*]] = arith.constant 3 : i64
15 ! FIR: %[[sub:.*]] = llvm.sub %[[c2]], %[[u]] : i64
16 ! FIR: %[[ele:.*]] = vector.extractelement %[[vx]][%[[sub]] : i64] : vector<4xf32>
17 ! FIR: %[[vy:.*]] = vector.splat %[[ele]] : vector<4xf32>
18 ! FIR: %[[y:.*]] = fir.convert %[[vy]] : (vector<4xf32>) -> !fir.vector<4:f32>
19 ! FIR: fir.store %[[y]] to %{{[0-9]}} : !fir.ref<!fir.vector<4:f32>>
21 ! LLVMIR: %[[x:.*]] = load <4 x float>, ptr %{{[0-9]}}, align 16
22 ! LLVMIR: %[[ele:.*]] = extractelement <4 x float> %[[x]], i64 3
23 ! LLVMIR: %[[ins:.*]] = insertelement <4 x float> undef, float %[[ele]], i32 0
24 ! LLVMIR: %[[y:.*]] = shufflevector <4 x float> %[[ins]], <4 x float> undef, <4 x i32> zeroinitializer
25 ! LLVMIR: store <4 x float> %[[y]], ptr %{{[0-9]}}, align 16
26 end subroutine vec_splat_testf32i64
28 ! CHECK-LABEL: vec_splat_testu8i16
29 subroutine vec_splat_testu8i16(x)
30 vector(unsigned(1)) :: x, y
31 y = vec_splat(x, 0_2)
32 ! FIR: %[[x:.*]] = fir.load %arg0 : !fir.ref<!fir.vector<16:ui8>>
33 ! FIR: %[[idx:.*]] = arith.constant 0 : i16
34 ! FIR: %[[vx:.*]] = fir.convert %[[x]] : (!fir.vector<16:ui8>) -> vector<16xi8>
35 ! FIR: %[[c:.*]] = arith.constant 16 : i16
36 ! FIR: %[[u:.*]] = llvm.urem %[[idx]], %[[c]] : i16
37 ! FIR: %[[c2:.*]] = arith.constant 15 : i16
38 ! FIR: %[[sub:.*]] = llvm.sub %[[c2]], %[[u]] : i16
39 ! FIR: %[[ele:.*]] = vector.extractelement %[[vx]][%[[sub]] : i16] : vector<16xi8>
40 ! FIR: %[[vy:.*]] = vector.splat %[[ele]] : vector<16xi8>
41 ! FIR: %[[y:.*]] = fir.convert %[[vy]] : (vector<16xi8>) -> !fir.vector<16:ui8>
42 ! FIR: fir.store %[[y]] to %{{[0-9]}} : !fir.ref<!fir.vector<16:ui8>>
44 ! LLVMIR: %[[x:.*]] = load <16 x i8>, ptr %{{[0-9]}}, align 16
45 ! LLVMIR: %[[ele:.*]] = extractelement <16 x i8> %[[x]], i16 15
46 ! LLVMIR: %[[ins:.*]] = insertelement <16 x i8> undef, i8 %[[ele]], i32 0
47 ! LLVMIR: %[[y:.*]] = shufflevector <16 x i8> %[[ins]], <16 x i8> undef, <16 x i32> zeroinitializer
48 ! LLVMIR: store <16 x i8> %[[y]], ptr %{{[0-9]}}, align 16
49 end subroutine vec_splat_testu8i16