1 ! RUN: %flang_fc1 -emit-fir %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="FIR" %s
2 ! RUN: %flang_fc1 -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
3 ! REQUIRES: target=powerpc{{.*}}
5 ! CHECK-LABEL: vec_cvf_test_r4r8
6 subroutine vec_cvf_test_r4r8(arg1
)
7 vector(real(8)), intent(in
) :: arg1
11 ! FIR: %[[arg:.*]] = fir.load %{{.*}} : !fir.ref<!fir.vector<2:f64>>
12 ! FIR: %[[carg:.*]] = fir.convert %[[arg]] : (!fir.vector<2:f64>) -> vector<2xf64>
13 ! FIR: %[[call:.*]] = fir.call @llvm.ppc.vsx.xvcvdpsp(%[[carg]]) fastmath<contract> : (vector<2xf64>) -> !fir.vector<4:f32>
14 ! FIR: %[[ccall:.*]] = fir.convert %[[call]] : (!fir.vector<4:f32>) -> vector<4xf32>
15 ! FIR: %[[r:.*]] = fir.convert %[[ccall]] : (vector<4xf32>) -> !fir.vector<4:f32>
16 ! FIR: fir.store %[[r]] to %{{.*}} : !fir.ref<!fir.vector<4:f32>>
18 ! LLVMIR: %[[arg:.*]] = load <2 x double>, ptr %{{.*}}, align 16
19 ! LLVMIR: %[[call:.*]] = call contract <4 x float> @llvm.ppc.vsx.xvcvdpsp(<2 x double> %[[arg]])
20 ! LLVMIR: store <4 x float> %[[call]], ptr %{{.*}}, align 16
21 end subroutine vec_cvf_test_r4r8
23 ! CHECK-LABEL: vec_cvf_test_r8r4
24 subroutine vec_cvf_test_r8r4(arg1
)
25 vector(real(4)), intent(in
) :: arg1
29 ! FIR: %[[arg:.*]] = fir.load %{{.*}} : !fir.ref<!fir.vector<4:f32>>
30 ! FIR: %[[carg:.*]] = fir.convert %[[arg]] : (!fir.vector<4:f32>) -> vector<4xf32>
31 ! FIR: %[[call:.*]] = fir.call @llvm.ppc.vsx.xvcvspdp(%[[carg]]) fastmath<contract> : (vector<4xf32>) -> !fir.vector<2:f64>
32 ! FIR: fir.store %[[call]] to %{{.*}} : !fir.ref<!fir.vector<2:f64>>
34 ! LLVMIR: %[[arg:.*]] = load <4 x float>, ptr %{{.*}}, align 16
35 ! LLVMIR: %[[r:.*]] = call contract <2 x double> @llvm.ppc.vsx.xvcvspdp(<4 x float> %[[arg]])
36 ! LLVMIR: store <2 x double> %[[r]], ptr %{{.*}}, align 16
37 end subroutine vec_cvf_test_r8r4