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[llvm-project.git] / clang / lib / Basic / Targets / ARM.h
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1 //===--- ARM.h - Declare ARM target feature support -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares ARM TargetInfo objects.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H
16 #include "OSTargets.h"
17 #include "clang/Basic/TargetInfo.h"
18 #include "clang/Basic/TargetOptions.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/Compiler.h"
21 #include "llvm/Support/ARMTargetParser.h"
22 #include "llvm/Support/TargetParser.h"
24 namespace clang {
25 namespace targets {
27 class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo {
28 // Possible FPU choices.
29 enum FPUMode {
30 VFP2FPU = (1 << 0),
31 VFP3FPU = (1 << 1),
32 VFP4FPU = (1 << 2),
33 NeonFPU = (1 << 3),
34 FPARMV8 = (1 << 4)
37 enum MVEMode {
38 MVE_INT = (1 << 0),
39 MVE_FP = (1 << 1)
42 // Possible HWDiv features.
43 enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
45 static bool FPUModeIsVFP(FPUMode Mode) {
46 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU | FPARMV8);
49 static const TargetInfo::GCCRegAlias GCCRegAliases[];
50 static const char *const GCCRegNames[];
52 std::string ABI, CPU;
54 StringRef CPUProfile;
55 StringRef CPUAttr;
57 enum { FP_Default, FP_VFP, FP_Neon } FPMath;
59 llvm::ARM::ISAKind ArchISA;
60 llvm::ARM::ArchKind ArchKind = llvm::ARM::ArchKind::ARMV4T;
61 llvm::ARM::ProfileKind ArchProfile;
62 unsigned ArchVersion;
64 unsigned FPU : 5;
65 unsigned MVE : 2;
67 unsigned IsAAPCS : 1;
68 unsigned HWDiv : 2;
70 // Initialized via features.
71 unsigned SoftFloat : 1;
72 unsigned SoftFloatABI : 1;
74 unsigned CRC : 1;
75 unsigned Crypto : 1;
76 unsigned SHA2 : 1;
77 unsigned AES : 1;
78 unsigned DSP : 1;
79 unsigned Unaligned : 1;
80 unsigned DotProd : 1;
81 unsigned HasMatMul : 1;
82 unsigned FPRegsDisabled : 1;
83 unsigned HasPAC : 1;
84 unsigned HasBTI : 1;
86 enum {
87 LDREX_B = (1 << 0), /// byte (8-bit)
88 LDREX_H = (1 << 1), /// half (16-bit)
89 LDREX_W = (1 << 2), /// word (32-bit)
90 LDREX_D = (1 << 3), /// double (64-bit)
93 uint32_t LDREX;
95 // ACLE 6.5.1 Hardware floating point
96 enum {
97 HW_FP_HP = (1 << 1), /// half (16-bit)
98 HW_FP_SP = (1 << 2), /// single (32-bit)
99 HW_FP_DP = (1 << 3), /// double (64-bit)
101 uint32_t HW_FP;
103 static const Builtin::Info BuiltinInfo[];
105 void setABIAAPCS();
106 void setABIAPCS(bool IsAAPCS16);
108 void setArchInfo();
109 void setArchInfo(llvm::ARM::ArchKind Kind);
111 void setAtomic();
113 bool isThumb() const;
114 bool supportsThumb() const;
115 bool supportsThumb2() const;
116 bool hasMVE() const;
117 bool hasMVEFloat() const;
118 bool hasCDE() const;
120 StringRef getCPUAttr() const;
121 StringRef getCPUProfile() const;
123 public:
124 ARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
126 StringRef getABI() const override;
127 bool setABI(const std::string &Name) override;
129 bool isBranchProtectionSupportedArch(StringRef Arch) const override;
130 bool validateBranchProtection(StringRef Spec, StringRef Arch,
131 BranchProtectionInfo &BPI,
132 StringRef &Err) const override;
134 // FIXME: This should be based on Arch attributes, not CPU names.
135 bool
136 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
137 StringRef CPU,
138 const std::vector<std::string> &FeaturesVec) const override;
140 bool isValidFeatureName(StringRef Feature) const override {
141 // We pass soft-float-abi in as a -target-feature, but the backend figures
142 // this out through other means.
143 return Feature != "soft-float-abi";
146 bool handleTargetFeatures(std::vector<std::string> &Features,
147 DiagnosticsEngine &Diags) override;
149 bool hasFeature(StringRef Feature) const override;
151 bool hasBFloat16Type() const override;
153 bool isValidCPUName(StringRef Name) const override;
154 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
156 bool setCPU(const std::string &Name) override;
158 bool setFPMath(StringRef Name) override;
160 bool useFP16ConversionIntrinsics() const override {
161 return false;
164 void getTargetDefinesARMV81A(const LangOptions &Opts,
165 MacroBuilder &Builder) const;
166 void getTargetDefinesARMV82A(const LangOptions &Opts,
167 MacroBuilder &Builder) const;
168 void getTargetDefinesARMV83A(const LangOptions &Opts,
169 MacroBuilder &Builder) const;
170 void getTargetDefines(const LangOptions &Opts,
171 MacroBuilder &Builder) const override;
173 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
175 bool isCLZForZeroUndef() const override;
176 BuiltinVaListKind getBuiltinVaListKind() const override;
178 ArrayRef<const char *> getGCCRegNames() const override;
179 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
180 bool validateAsmConstraint(const char *&Name,
181 TargetInfo::ConstraintInfo &Info) const override;
182 std::string convertConstraint(const char *&Constraint) const override;
183 bool
184 validateConstraintModifier(StringRef Constraint, char Modifier, unsigned Size,
185 std::string &SuggestedModifier) const override;
186 const char *getClobbers() const override;
188 StringRef getConstraintRegister(StringRef Constraint,
189 StringRef Expression) const override {
190 return Expression;
193 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override;
195 int getEHDataRegisterNumber(unsigned RegNo) const override;
197 bool hasSjLjLowering() const override;
199 bool hasBitIntType() const override { return true; }
201 const char *getBFloat16Mangling() const override { return "u6__bf16"; };
204 class LLVM_LIBRARY_VISIBILITY ARMleTargetInfo : public ARMTargetInfo {
205 public:
206 ARMleTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
207 void getTargetDefines(const LangOptions &Opts,
208 MacroBuilder &Builder) const override;
211 class LLVM_LIBRARY_VISIBILITY ARMbeTargetInfo : public ARMTargetInfo {
212 public:
213 ARMbeTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
214 void getTargetDefines(const LangOptions &Opts,
215 MacroBuilder &Builder) const override;
218 class LLVM_LIBRARY_VISIBILITY WindowsARMTargetInfo
219 : public WindowsTargetInfo<ARMleTargetInfo> {
220 const llvm::Triple Triple;
222 public:
223 WindowsARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
225 void getVisualStudioDefines(const LangOptions &Opts,
226 MacroBuilder &Builder) const;
228 BuiltinVaListKind getBuiltinVaListKind() const override;
230 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override;
233 // Windows ARM + Itanium C++ ABI Target
234 class LLVM_LIBRARY_VISIBILITY ItaniumWindowsARMleTargetInfo
235 : public WindowsARMTargetInfo {
236 public:
237 ItaniumWindowsARMleTargetInfo(const llvm::Triple &Triple,
238 const TargetOptions &Opts);
240 void getTargetDefines(const LangOptions &Opts,
241 MacroBuilder &Builder) const override;
244 // Windows ARM, MS (C++) ABI
245 class LLVM_LIBRARY_VISIBILITY MicrosoftARMleTargetInfo
246 : public WindowsARMTargetInfo {
247 public:
248 MicrosoftARMleTargetInfo(const llvm::Triple &Triple,
249 const TargetOptions &Opts);
251 void getTargetDefines(const LangOptions &Opts,
252 MacroBuilder &Builder) const override;
255 // ARM MinGW target
256 class LLVM_LIBRARY_VISIBILITY MinGWARMTargetInfo : public WindowsARMTargetInfo {
257 public:
258 MinGWARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
260 void getTargetDefines(const LangOptions &Opts,
261 MacroBuilder &Builder) const override;
264 // ARM Cygwin target
265 class LLVM_LIBRARY_VISIBILITY CygwinARMTargetInfo : public ARMleTargetInfo {
266 public:
267 CygwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
269 void getTargetDefines(const LangOptions &Opts,
270 MacroBuilder &Builder) const override;
273 class LLVM_LIBRARY_VISIBILITY DarwinARMTargetInfo
274 : public DarwinTargetInfo<ARMleTargetInfo> {
275 protected:
276 void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
277 MacroBuilder &Builder) const override;
279 public:
280 DarwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
283 // 32-bit RenderScript is armv7 with width and align of 'long' set to 8-bytes
284 class LLVM_LIBRARY_VISIBILITY RenderScript32TargetInfo
285 : public ARMleTargetInfo {
286 public:
287 RenderScript32TargetInfo(const llvm::Triple &Triple,
288 const TargetOptions &Opts);
290 void getTargetDefines(const LangOptions &Opts,
291 MacroBuilder &Builder) const override;
294 } // namespace targets
295 } // namespace clang
297 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H