1 /******************************************************************************/
2 /* (c) 2020 Qualcomm Innovation Center, Inc. All rights reserved. */
4 /******************************************************************************/
5 #ifndef HEXAGON_TYPES_H
6 #define HEXAGON_TYPES_H
8 #include <hexagon_protos.h>
11 #define HEXAGON_Vect HEXAGON_Vect64
12 #define HEXAGON_V_GET_D HEXAGON_V64_GET_D
13 #define HEXAGON_V_GET_UD HEXAGON_V64_GET_UD
14 #define HEXAGON_V_GET_W0 HEXAGON_V64_GET_W0
15 #define HEXAGON_V_GET_W1 HEXAGON_V64_GET_W1
16 #define HEXAGON_V_GET_UW0 HEXAGON_V64_GET_UW0
17 #define HEXAGON_V_GET_UW1 HEXAGON_V64_GET_UW1
18 #define HEXAGON_V_GET_H0 HEXAGON_V64_GET_H0
19 #define HEXAGON_V_GET_H1 HEXAGON_V64_GET_H1
20 #define HEXAGON_V_GET_H2 HEXAGON_V64_GET_H2
21 #define HEXAGON_V_GET_H3 HEXAGON_V64_GET_H3
22 #define HEXAGON_V_GET_UH0 HEXAGON_V64_GET_UH0
23 #define HEXAGON_V_GET_UH1 HEXAGON_V64_GET_UH1
24 #define HEXAGON_V_GET_UH2 HEXAGON_V64_GET_UH2
25 #define HEXAGON_V_GET_UH3 HEXAGON_V64_GET_UH3
26 #define HEXAGON_V_GET_B0 HEXAGON_V64_GET_B0
27 #define HEXAGON_V_GET_B1 HEXAGON_V64_GET_B1
28 #define HEXAGON_V_GET_B2 HEXAGON_V64_GET_B2
29 #define HEXAGON_V_GET_B3 HEXAGON_V64_GET_B3
30 #define HEXAGON_V_GET_B4 HEXAGON_V64_GET_B4
31 #define HEXAGON_V_GET_B5 HEXAGON_V64_GET_B5
32 #define HEXAGON_V_GET_B6 HEXAGON_V64_GET_B6
33 #define HEXAGON_V_GET_B7 HEXAGON_V64_GET_B7
34 #define HEXAGON_V_GET_UB0 HEXAGON_V64_GET_UB0
35 #define HEXAGON_V_GET_UB1 HEXAGON_V64_GET_UB1
36 #define HEXAGON_V_GET_UB2 HEXAGON_V64_GET_UB2
37 #define HEXAGON_V_GET_UB3 HEXAGON_V64_GET_UB3
38 #define HEXAGON_V_GET_UB4 HEXAGON_V64_GET_UB4
39 #define HEXAGON_V_GET_UB5 HEXAGON_V64_GET_UB5
40 #define HEXAGON_V_GET_UB6 HEXAGON_V64_GET_UB6
41 #define HEXAGON_V_GET_UB7 HEXAGON_V64_GET_UB7
42 #define HEXAGON_V_PUT_D HEXAGON_V64_PUT_D
43 #define HEXAGON_V_PUT_W0 HEXAGON_V64_PUT_W0
44 #define HEXAGON_V_PUT_W1 HEXAGON_V64_PUT_W1
45 #define HEXAGON_V_PUT_H0 HEXAGON_V64_PUT_H0
46 #define HEXAGON_V_PUT_H1 HEXAGON_V64_PUT_H1
47 #define HEXAGON_V_PUT_H2 HEXAGON_V64_PUT_H2
48 #define HEXAGON_V_PUT_H3 HEXAGON_V64_PUT_H3
49 #define HEXAGON_V_PUT_B0 HEXAGON_V64_PUT_B0
50 #define HEXAGON_V_PUT_B1 HEXAGON_V64_PUT_B1
51 #define HEXAGON_V_PUT_B2 HEXAGON_V64_PUT_B2
52 #define HEXAGON_V_PUT_B3 HEXAGON_V64_PUT_B3
53 #define HEXAGON_V_PUT_B4 HEXAGON_V64_PUT_B4
54 #define HEXAGON_V_PUT_B5 HEXAGON_V64_PUT_B5
55 #define HEXAGON_V_PUT_B6 HEXAGON_V64_PUT_B6
56 #define HEXAGON_V_PUT_B7 HEXAGON_V64_PUT_B7
57 #define HEXAGON_V_CREATE_D HEXAGON_V64_CREATE_D
58 #define HEXAGON_V_CREATE_W HEXAGON_V64_CREATE_W
59 #define HEXAGON_V_CREATE_H HEXAGON_V64_CREATE_H
60 #define HEXAGON_V_CREATE_B HEXAGON_V64_CREATE_B
63 #define HEXAGON_VectC HEXAGON_Vect64C
64 #endif /* __cplusplus */
68 typedef long long __attribute__((__may_alias__
)) HEXAGON_Vect64
;
70 /* Extract doubleword macros */
72 #define HEXAGON_V64_GET_D(v) (v)
73 #define HEXAGON_V64_GET_UD(v) ((unsigned long long)(v))
75 /* Extract word macros */
77 #define HEXAGON_V64_GET_W0(v) \
82 } _HEXAGON_V64_internal_union; \
83 _HEXAGON_V64_internal_union.d = (v); \
84 _HEXAGON_V64_internal_union.w[0]; \
86 #define HEXAGON_V64_GET_W1(v) \
91 } _HEXAGON_V64_internal_union; \
92 _HEXAGON_V64_internal_union.d = (v); \
93 _HEXAGON_V64_internal_union.w[1]; \
95 #define HEXAGON_V64_GET_UW0(v) \
100 } _HEXAGON_V64_internal_union; \
101 _HEXAGON_V64_internal_union.d = (v); \
102 _HEXAGON_V64_internal_union.uw[0]; \
104 #define HEXAGON_V64_GET_UW1(v) \
108 unsigned int uw[2]; \
109 } _HEXAGON_V64_internal_union; \
110 _HEXAGON_V64_internal_union.d = (v); \
111 _HEXAGON_V64_internal_union.uw[1]; \
114 /* Extract half word macros */
116 #define HEXAGON_V64_GET_H0(v) \
121 } _HEXAGON_V64_internal_union; \
122 _HEXAGON_V64_internal_union.d = (v); \
123 _HEXAGON_V64_internal_union.h[0]; \
125 #define HEXAGON_V64_GET_H1(v) \
130 } _HEXAGON_V64_internal_union; \
131 _HEXAGON_V64_internal_union.d = (v); \
132 _HEXAGON_V64_internal_union.h[1]; \
134 #define HEXAGON_V64_GET_H2(v) \
139 } _HEXAGON_V64_internal_union; \
140 _HEXAGON_V64_internal_union.d = (v); \
141 _HEXAGON_V64_internal_union.h[2]; \
143 #define HEXAGON_V64_GET_H3(v) \
148 } _HEXAGON_V64_internal_union; \
149 _HEXAGON_V64_internal_union.d = (v); \
150 _HEXAGON_V64_internal_union.h[3]; \
152 #define HEXAGON_V64_GET_UH0(v) \
156 unsigned short uh[4]; \
157 } _HEXAGON_V64_internal_union; \
158 _HEXAGON_V64_internal_union.d = (v); \
159 _HEXAGON_V64_internal_union.uh[0]; \
161 #define HEXAGON_V64_GET_UH1(v) \
165 unsigned short uh[4]; \
166 } _HEXAGON_V64_internal_union; \
167 _HEXAGON_V64_internal_union.d = (v); \
168 _HEXAGON_V64_internal_union.uh[1]; \
170 #define HEXAGON_V64_GET_UH2(v) \
174 unsigned short uh[4]; \
175 } _HEXAGON_V64_internal_union; \
176 _HEXAGON_V64_internal_union.d = (v); \
177 _HEXAGON_V64_internal_union.uh[2]; \
179 #define HEXAGON_V64_GET_UH3(v) \
183 unsigned short uh[4]; \
184 } _HEXAGON_V64_internal_union; \
185 _HEXAGON_V64_internal_union.d = (v); \
186 _HEXAGON_V64_internal_union.uh[3]; \
189 /* Extract byte macros */
191 #define HEXAGON_V64_GET_B0(v) \
196 } _HEXAGON_V64_internal_union; \
197 _HEXAGON_V64_internal_union.d = (v); \
198 _HEXAGON_V64_internal_union.b[0]; \
200 #define HEXAGON_V64_GET_B1(v) \
205 } _HEXAGON_V64_internal_union; \
206 _HEXAGON_V64_internal_union.d = (v); \
207 _HEXAGON_V64_internal_union.b[1]; \
209 #define HEXAGON_V64_GET_B2(v) \
214 } _HEXAGON_V64_internal_union; \
215 _HEXAGON_V64_internal_union.d = (v); \
216 _HEXAGON_V64_internal_union.b[2]; \
218 #define HEXAGON_V64_GET_B3(v) \
223 } _HEXAGON_V64_internal_union; \
224 _HEXAGON_V64_internal_union.d = (v); \
225 _HEXAGON_V64_internal_union.b[3]; \
227 #define HEXAGON_V64_GET_B4(v) \
232 } _HEXAGON_V64_internal_union; \
233 _HEXAGON_V64_internal_union.d = (v); \
234 _HEXAGON_V64_internal_union.b[4]; \
236 #define HEXAGON_V64_GET_B5(v) \
241 } _HEXAGON_V64_internal_union; \
242 _HEXAGON_V64_internal_union.d = (v); \
243 _HEXAGON_V64_internal_union.b[5]; \
245 #define HEXAGON_V64_GET_B6(v) \
250 } _HEXAGON_V64_internal_union; \
251 _HEXAGON_V64_internal_union.d = (v); \
252 _HEXAGON_V64_internal_union.b[6]; \
254 #define HEXAGON_V64_GET_B7(v) \
259 } _HEXAGON_V64_internal_union; \
260 _HEXAGON_V64_internal_union.d = (v); \
261 _HEXAGON_V64_internal_union.b[7]; \
263 #define HEXAGON_V64_GET_UB0(v) \
267 unsigned char ub[8]; \
268 } _HEXAGON_V64_internal_union; \
269 _HEXAGON_V64_internal_union.d = (v); \
270 _HEXAGON_V64_internal_union.ub[0]; \
272 #define HEXAGON_V64_GET_UB1(v) \
276 unsigned char ub[8]; \
277 } _HEXAGON_V64_internal_union; \
278 _HEXAGON_V64_internal_union.d = (v); \
279 _HEXAGON_V64_internal_union.ub[1]; \
281 #define HEXAGON_V64_GET_UB2(v) \
285 unsigned char ub[8]; \
286 } _HEXAGON_V64_internal_union; \
287 _HEXAGON_V64_internal_union.d = (v); \
288 _HEXAGON_V64_internal_union.ub[2]; \
290 #define HEXAGON_V64_GET_UB3(v) \
294 unsigned char ub[8]; \
295 } _HEXAGON_V64_internal_union; \
296 _HEXAGON_V64_internal_union.d = (v); \
297 _HEXAGON_V64_internal_union.ub[3]; \
299 #define HEXAGON_V64_GET_UB4(v) \
303 unsigned char ub[8]; \
304 } _HEXAGON_V64_internal_union; \
305 _HEXAGON_V64_internal_union.d = (v); \
306 _HEXAGON_V64_internal_union.ub[4]; \
308 #define HEXAGON_V64_GET_UB5(v) \
312 unsigned char ub[8]; \
313 } _HEXAGON_V64_internal_union; \
314 _HEXAGON_V64_internal_union.d = (v); \
315 _HEXAGON_V64_internal_union.ub[5]; \
317 #define HEXAGON_V64_GET_UB6(v) \
321 unsigned char ub[8]; \
322 } _HEXAGON_V64_internal_union; \
323 _HEXAGON_V64_internal_union.d = (v); \
324 _HEXAGON_V64_internal_union.ub[6]; \
326 #define HEXAGON_V64_GET_UB7(v) \
330 unsigned char ub[8]; \
331 } _HEXAGON_V64_internal_union; \
332 _HEXAGON_V64_internal_union.d = (v); \
333 _HEXAGON_V64_internal_union.ub[7]; \
336 /* NOTE: All set macros return a HEXAGON_Vect64 type */
338 /* Set doubleword macro */
340 #define HEXAGON_V64_PUT_D(v, new) (new)
342 /* Set word macros */
346 #define HEXAGON_V64_PUT_W0(v, new) \
351 } _HEXAGON_V64_internal_union; \
352 _HEXAGON_V64_internal_union.d = (v); \
353 _HEXAGON_V64_internal_union.w[0] = (new); \
354 _HEXAGON_V64_internal_union.d; \
356 #define HEXAGON_V64_PUT_W1(v, new) \
361 } _HEXAGON_V64_internal_union; \
362 _HEXAGON_V64_internal_union.d = (v); \
363 _HEXAGON_V64_internal_union.w[1] = (new); \
364 _HEXAGON_V64_internal_union.d; \
367 #else /* !__hexagon__ */
369 #define HEXAGON_V64_PUT_W0(v, new) \
370 (((v) & 0xffffffff00000000LL) | ((HEXAGON_Vect64)((unsigned int)(new))))
371 #define HEXAGON_V64_PUT_W1(v, new) \
372 (((v) & 0x00000000ffffffffLL) | (((HEXAGON_Vect64)(new)) << 32LL))
374 #endif /* !__hexagon__ */
376 /* Set half word macros */
380 #define HEXAGON_V64_PUT_H0(v, new) \
385 } _HEXAGON_V64_internal_union; \
386 _HEXAGON_V64_internal_union.d = (v); \
387 _HEXAGON_V64_internal_union.h[0] = (new); \
388 _HEXAGON_V64_internal_union.d; \
390 #define HEXAGON_V64_PUT_H1(v, new) \
395 } _HEXAGON_V64_internal_union; \
396 _HEXAGON_V64_internal_union.d = (v); \
397 _HEXAGON_V64_internal_union.h[1] = (new); \
398 _HEXAGON_V64_internal_union.d; \
400 #define HEXAGON_V64_PUT_H2(v, new) \
405 } _HEXAGON_V64_internal_union; \
406 _HEXAGON_V64_internal_union.d = (v); \
407 _HEXAGON_V64_internal_union.h[2] = (new); \
408 _HEXAGON_V64_internal_union.d; \
410 #define HEXAGON_V64_PUT_H3(v, new) \
415 } _HEXAGON_V64_internal_union; \
416 _HEXAGON_V64_internal_union.d = (v); \
417 _HEXAGON_V64_internal_union.h[3] = (new); \
418 _HEXAGON_V64_internal_union.d; \
421 #else /* !__hexagon__ */
423 #define HEXAGON_V64_PUT_H0(v, new) \
424 (((v) & 0xffffffffffff0000LL) | ((HEXAGON_Vect64)((unsigned short)(new))))
425 #define HEXAGON_V64_PUT_H1(v, new) \
426 (((v) & 0xffffffff0000ffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 16LL))
427 #define HEXAGON_V64_PUT_H2(v, new) \
428 (((v) & 0xffff0000ffffffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 32LL))
429 #define HEXAGON_V64_PUT_H3(v, new) \
430 (((v) & 0x0000ffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 48LL))
432 #endif /* !__hexagon__ */
434 /* Set byte macros */
438 #define HEXAGON_V64_PUT_B0(v, new) \
443 } _HEXAGON_V64_internal_union; \
444 _HEXAGON_V64_internal_union.d = (v); \
445 _HEXAGON_V64_internal_union.b[0] = (new); \
446 _HEXAGON_V64_internal_union.d; \
448 #define HEXAGON_V64_PUT_B1(v, new) \
453 } _HEXAGON_V64_internal_union; \
454 _HEXAGON_V64_internal_union.d = (v); \
455 _HEXAGON_V64_internal_union.b[1] = (new); \
456 _HEXAGON_V64_internal_union.d; \
458 #define HEXAGON_V64_PUT_B2(v, new) \
463 } _HEXAGON_V64_internal_union; \
464 _HEXAGON_V64_internal_union.d = (v); \
465 _HEXAGON_V64_internal_union.b[2] = (new); \
466 _HEXAGON_V64_internal_union.d; \
468 #define HEXAGON_V64_PUT_B3(v, new) \
473 } _HEXAGON_V64_internal_union; \
474 _HEXAGON_V64_internal_union.d = (v); \
475 _HEXAGON_V64_internal_union.b[3] = (new); \
476 _HEXAGON_V64_internal_union.d; \
478 #define HEXAGON_V64_PUT_B4(v, new) \
483 } _HEXAGON_V64_internal_union; \
484 _HEXAGON_V64_internal_union.d = (v); \
485 _HEXAGON_V64_internal_union.b[4] = (new); \
486 _HEXAGON_V64_internal_union.d; \
488 #define HEXAGON_V64_PUT_B5(v, new) \
493 } _HEXAGON_V64_internal_union; \
494 _HEXAGON_V64_internal_union.d = (v); \
495 _HEXAGON_V64_internal_union.b[5] = (new); \
496 _HEXAGON_V64_internal_union.d; \
498 #define HEXAGON_V64_PUT_B6(v, new) \
503 } _HEXAGON_V64_internal_union; \
504 _HEXAGON_V64_internal_union.d = (v); \
505 _HEXAGON_V64_internal_union.b[6] = (new); \
506 _HEXAGON_V64_internal_union.d; \
508 #define HEXAGON_V64_PUT_B7(v, new) \
513 } _HEXAGON_V64_internal_union; \
514 _HEXAGON_V64_internal_union.d = (v); \
515 _HEXAGON_V64_internal_union.b[7] = (new); \
516 _HEXAGON_V64_internal_union.d; \
519 #else /* !__hexagon__ */
521 #define HEXAGON_V64_PUT_B0(v, new) \
522 (((v) & 0xffffffffffffff00LL) | ((HEXAGON_Vect64)((unsigned char)(new))))
523 #define HEXAGON_V64_PUT_B1(v, new) \
524 (((v) & 0xffffffffffff00ffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 8LL))
525 #define HEXAGON_V64_PUT_B2(v, new) \
526 (((v) & 0xffffffffff00ffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 16LL))
527 #define HEXAGON_V64_PUT_B3(v, new) \
528 (((v) & 0xffffffff00ffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 24LL))
529 #define HEXAGON_V64_PUT_B4(v, new) \
530 (((v) & 0xffffff00ffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 32LL))
531 #define HEXAGON_V64_PUT_B5(v, new) \
532 (((v) & 0xffff00ffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 40LL))
533 #define HEXAGON_V64_PUT_B6(v, new) \
534 (((v) & 0xff00ffffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 48LL))
535 #define HEXAGON_V64_PUT_B7(v, new) \
536 (((v) & 0x00ffffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 56LL))
538 #endif /* !__hexagon__ */
540 /* NOTE: All create macros return a HEXAGON_Vect64 type */
542 /* Create from a doubleword */
544 #define HEXAGON_V64_CREATE_D(d) (d)
546 /* Create from words */
550 #define HEXAGON_V64_CREATE_W(w1, w0) \
555 } _HEXAGON_V64_internal_union; \
556 _HEXAGON_V64_internal_union.w[0] = (w0); \
557 _HEXAGON_V64_internal_union.w[1] = (w1); \
558 _HEXAGON_V64_internal_union.d; \
561 #else /* !__hexagon__ */
563 #define HEXAGON_V64_CREATE_W(w1, w0) \
564 ((((HEXAGON_Vect64)(w1)) << 32LL) | ((HEXAGON_Vect64)((w0) & 0xffffffff)))
566 #endif /* !__hexagon__ */
568 /* Create from half words */
572 #define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \
577 } _HEXAGON_V64_internal_union; \
578 _HEXAGON_V64_internal_union.h[0] = (h0); \
579 _HEXAGON_V64_internal_union.h[1] = (h1); \
580 _HEXAGON_V64_internal_union.h[2] = (h2); \
581 _HEXAGON_V64_internal_union.h[3] = (h3); \
582 _HEXAGON_V64_internal_union.d; \
585 #else /* !__hexagon__ */
587 #define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \
588 ((((HEXAGON_Vect64)(h3)) << 48LL) | (((HEXAGON_Vect64)((h2) & 0xffff)) << 32LL) | \
589 (((HEXAGON_Vect64)((h1) & 0xffff)) << 16LL) | ((HEXAGON_Vect64)((h0) & 0xffff)))
591 #endif /* !__hexagon__ */
593 /* Create from bytes */
597 #define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
602 } _HEXAGON_V64_internal_union; \
603 _HEXAGON_V64_internal_union.b[0] = (b0); \
604 _HEXAGON_V64_internal_union.b[1] = (b1); \
605 _HEXAGON_V64_internal_union.b[2] = (b2); \
606 _HEXAGON_V64_internal_union.b[3] = (b3); \
607 _HEXAGON_V64_internal_union.b[4] = (b4); \
608 _HEXAGON_V64_internal_union.b[5] = (b5); \
609 _HEXAGON_V64_internal_union.b[6] = (b6); \
610 _HEXAGON_V64_internal_union.b[7] = (b7); \
611 _HEXAGON_V64_internal_union.d; \
614 #else /* !__hexagon__ */
616 #define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
617 ((((HEXAGON_Vect64)(b7)) << 56LL) | (((HEXAGON_Vect64)((b6) & 0xff)) << 48LL) | \
618 (((HEXAGON_Vect64)((b5) & 0xff)) << 40LL) | (((HEXAGON_Vect64)((b4) & 0xff)) << 32LL) | \
619 (((HEXAGON_Vect64)((b3) & 0xff)) << 24LL) | (((HEXAGON_Vect64)((b2) & 0xff)) << 16LL) | \
620 (((HEXAGON_Vect64)((b1) & 0xff)) << 8LL) | ((HEXAGON_Vect64)((b0) & 0xff)))
622 #endif /* !__hexagon__ */
626 class HEXAGON_Vect64C
{
629 HEXAGON_Vect64C(long long d
= 0) : data(d
) {};
630 HEXAGON_Vect64C(int w1
, int w0
) : data(HEXAGON_V64_CREATE_W(w1
, w0
)) {};
631 HEXAGON_Vect64C(short h3
, short h2
, short h1
, short h0
)
632 : data(HEXAGON_V64_CREATE_H(h3
, h2
, h1
, h0
)) {};
633 HEXAGON_Vect64C(signed char b7
, signed char b6
, signed char b5
, signed char b4
,
634 signed char b3
, signed char b2
, signed char b1
, signed char b0
)
635 : data(HEXAGON_V64_CREATE_B(b7
, b6
, b5
, b4
, b3
, b2
, b1
, b0
)) {};
636 HEXAGON_Vect64C(const HEXAGON_Vect64C
&v
) : data(v
.data
) {};
638 HEXAGON_Vect64C
&operator=(const HEXAGON_Vect64C
&v
) {
643 operator long long() {
647 // Extract doubleword methods
649 return HEXAGON_V64_GET_D(data
);
651 unsigned long long UD(void) {
652 return HEXAGON_V64_GET_UD(data
);
655 // Extract word methods
657 return HEXAGON_V64_GET_W0(data
);
660 return HEXAGON_V64_GET_W1(data
);
662 unsigned int UW0(void) {
663 return HEXAGON_V64_GET_UW0(data
);
665 unsigned int UW1(void) {
666 return HEXAGON_V64_GET_UW1(data
);
669 // Extract half word methods
671 return HEXAGON_V64_GET_H0(data
);
674 return HEXAGON_V64_GET_H1(data
);
677 return HEXAGON_V64_GET_H2(data
);
680 return HEXAGON_V64_GET_H3(data
);
682 unsigned short UH0(void) {
683 return HEXAGON_V64_GET_UH0(data
);
685 unsigned short UH1(void) {
686 return HEXAGON_V64_GET_UH1(data
);
688 unsigned short UH2(void) {
689 return HEXAGON_V64_GET_UH2(data
);
691 unsigned short UH3(void) {
692 return HEXAGON_V64_GET_UH3(data
);
695 // Extract byte methods
696 signed char B0(void) {
697 return HEXAGON_V64_GET_B0(data
);
699 signed char B1(void) {
700 return HEXAGON_V64_GET_B1(data
);
702 signed char B2(void) {
703 return HEXAGON_V64_GET_B2(data
);
705 signed char B3(void) {
706 return HEXAGON_V64_GET_B3(data
);
708 signed char B4(void) {
709 return HEXAGON_V64_GET_B4(data
);
711 signed char B5(void) {
712 return HEXAGON_V64_GET_B5(data
);
714 signed char B6(void) {
715 return HEXAGON_V64_GET_B6(data
);
717 signed char B7(void) {
718 return HEXAGON_V64_GET_B7(data
);
720 unsigned char UB0(void) {
721 return HEXAGON_V64_GET_UB0(data
);
723 unsigned char UB1(void) {
724 return HEXAGON_V64_GET_UB1(data
);
726 unsigned char UB2(void) {
727 return HEXAGON_V64_GET_UB2(data
);
729 unsigned char UB3(void) {
730 return HEXAGON_V64_GET_UB3(data
);
732 unsigned char UB4(void) {
733 return HEXAGON_V64_GET_UB4(data
);
735 unsigned char UB5(void) {
736 return HEXAGON_V64_GET_UB5(data
);
738 unsigned char UB6(void) {
739 return HEXAGON_V64_GET_UB6(data
);
741 unsigned char UB7(void) {
742 return HEXAGON_V64_GET_UB7(data
);
745 // NOTE: All set methods return a HEXAGON_Vect64C type
747 // Set doubleword method
748 HEXAGON_Vect64C
D(long long d
) {
749 return HEXAGON_Vect64C(HEXAGON_V64_PUT_D(data
, d
));
753 HEXAGON_Vect64C
W0(int w
) {
754 return HEXAGON_Vect64C(HEXAGON_V64_PUT_W0(data
, w
));
756 HEXAGON_Vect64C
W1(int w
) {
757 return HEXAGON_Vect64C(HEXAGON_V64_PUT_W1(data
, w
));
760 // Set half word methods
761 HEXAGON_Vect64C
H0(short h
) {
762 return HEXAGON_Vect64C(HEXAGON_V64_PUT_H0(data
, h
));
764 HEXAGON_Vect64C
H1(short h
) {
765 return HEXAGON_Vect64C(HEXAGON_V64_PUT_H1(data
, h
));
767 HEXAGON_Vect64C
H2(short h
) {
768 return HEXAGON_Vect64C(HEXAGON_V64_PUT_H2(data
, h
));
770 HEXAGON_Vect64C
H3(short h
) {
771 return HEXAGON_Vect64C(HEXAGON_V64_PUT_H3(data
, h
));
775 HEXAGON_Vect64C
B0(signed char b
) {
776 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B0(data
, b
));
778 HEXAGON_Vect64C
B1(signed char b
) {
779 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B1(data
, b
));
781 HEXAGON_Vect64C
B2(signed char b
) {
782 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B2(data
, b
));
784 HEXAGON_Vect64C
B3(signed char b
) {
785 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B3(data
, b
));
787 HEXAGON_Vect64C
B4(signed char b
) {
788 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B4(data
, b
));
790 HEXAGON_Vect64C
B5(signed char b
) {
791 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B5(data
, b
));
793 HEXAGON_Vect64C
B6(signed char b
) {
794 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B6(data
, b
));
796 HEXAGON_Vect64C
B7(signed char b
) {
797 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B7(data
, b
));
804 #endif /* __cplusplus */
808 typedef int HEXAGON_Vect32
;
810 /* Extract word macros */
812 #define HEXAGON_V32_GET_W(v) (v)
813 #define HEXAGON_V32_GET_UW(v) ((unsigned int)(v))
815 /* Extract half word macros */
817 #define HEXAGON_V32_GET_H0(v) \
822 } _HEXAGON_V32_internal_union; \
823 _HEXAGON_V32_internal_union.w = (v); \
824 _HEXAGON_V32_internal_union.h[0]; \
826 #define HEXAGON_V32_GET_H1(v) \
831 } _HEXAGON_V32_internal_union; \
832 _HEXAGON_V32_internal_union.w = (v); \
833 _HEXAGON_V32_internal_union.h[1]; \
835 #define HEXAGON_V32_GET_UH0(v) \
839 unsigned short uh[2]; \
840 } _HEXAGON_V32_internal_union; \
841 _HEXAGON_V32_internal_union.w = (v); \
842 _HEXAGON_V32_internal_union.uh[0]; \
844 #define HEXAGON_V32_GET_UH1(v) \
848 unsigned short uh[2]; \
849 } _HEXAGON_V32_internal_union; \
850 _HEXAGON_V32_internal_union.w = (v); \
851 _HEXAGON_V32_internal_union.uh[1]; \
854 /* Extract byte macros */
856 #define HEXAGON_V32_GET_B0(v) \
861 } _HEXAGON_V32_internal_union; \
862 _HEXAGON_V32_internal_union.w = (v); \
863 _HEXAGON_V32_internal_union.b[0]; \
865 #define HEXAGON_V32_GET_B1(v) \
870 } _HEXAGON_V32_internal_union; \
871 _HEXAGON_V32_internal_union.w = (v); \
872 _HEXAGON_V32_internal_union.b[1]; \
874 #define HEXAGON_V32_GET_B2(v) \
879 } _HEXAGON_V32_internal_union; \
880 _HEXAGON_V32_internal_union.w = (v); \
881 _HEXAGON_V32_internal_union.b[2]; \
883 #define HEXAGON_V32_GET_B3(v) \
888 } _HEXAGON_V32_internal_union; \
889 _HEXAGON_V32_internal_union.w = (v); \
890 _HEXAGON_V32_internal_union.b[3]; \
892 #define HEXAGON_V32_GET_UB0(v) \
896 unsigned char ub[4]; \
897 } _HEXAGON_V32_internal_union; \
898 _HEXAGON_V32_internal_union.w = (v); \
899 _HEXAGON_V32_internal_union.ub[0]; \
901 #define HEXAGON_V32_GET_UB1(v) \
905 unsigned char ub[4]; \
906 } _HEXAGON_V32_internal_union; \
907 _HEXAGON_V32_internal_union.w = (v); \
908 _HEXAGON_V32_internal_union.ub[1]; \
910 #define HEXAGON_V32_GET_UB2(v) \
914 unsigned char ub[4]; \
915 } _HEXAGON_V32_internal_union; \
916 _HEXAGON_V32_internal_union.w = (v); \
917 _HEXAGON_V32_internal_union.ub[2]; \
919 #define HEXAGON_V32_GET_UB3(v) \
923 unsigned char ub[4]; \
924 } _HEXAGON_V32_internal_union; \
925 _HEXAGON_V32_internal_union.w = (v); \
926 _HEXAGON_V32_internal_union.ub[3]; \
929 /* NOTE: All set macros return a HEXAGON_Vect32 type */
933 #define HEXAGON_V32_PUT_W(v, new) (new)
935 /* Set half word macros */
939 #define HEXAGON_V32_PUT_H0(v, new) \
944 } _HEXAGON_V32_internal_union; \
945 _HEXAGON_V32_internal_union.w = (v); \
946 _HEXAGON_V32_internal_union.h[0] = (new); \
947 _HEXAGON_V32_internal_union.w; \
949 #define HEXAGON_V32_PUT_H1(v, new) \
954 } _HEXAGON_V32_internal_union; \
955 _HEXAGON_V32_internal_union.w = (v); \
956 _HEXAGON_V32_internal_union.h[1] = (new); \
957 _HEXAGON_V32_internal_union.w; \
960 #else /* !__hexagon__ */
962 #define HEXAGON_V32_PUT_H0(v, new) \
963 (((v) & 0xffff0000) | ((HEXAGON_Vect32)((unsigned short)(new))))
964 #define HEXAGON_V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((HEXAGON_Vect32)(new)) << 16))
966 #endif /* !__hexagon__ */
968 /* Set byte macros */
972 #define HEXAGON_V32_PUT_B0(v, new) \
977 } _HEXAGON_V32_internal_union; \
978 _HEXAGON_V32_internal_union.w = (v); \
979 _HEXAGON_V32_internal_union.b[0] = (new); \
980 _HEXAGON_V32_internal_union.w; \
982 #define HEXAGON_V32_PUT_B1(v, new) \
987 } _HEXAGON_V32_internal_union; \
988 _HEXAGON_V32_internal_union.w = (v); \
989 _HEXAGON_V32_internal_union.b[1] = (new); \
990 _HEXAGON_V32_internal_union.w; \
992 #define HEXAGON_V32_PUT_B2(v, new) \
997 } _HEXAGON_V32_internal_union; \
998 _HEXAGON_V32_internal_union.w = (v); \
999 _HEXAGON_V32_internal_union.b[2] = (new); \
1000 _HEXAGON_V32_internal_union.w; \
1002 #define HEXAGON_V32_PUT_B3(v, new) \
1007 } _HEXAGON_V32_internal_union; \
1008 _HEXAGON_V32_internal_union.w = (v); \
1009 _HEXAGON_V32_internal_union.b[3] = (new); \
1010 _HEXAGON_V32_internal_union.w; \
1013 #else /* !__hexagon__ */
1015 #define HEXAGON_V32_PUT_B0(v, new) \
1016 (((v) & 0xffffff00) | ((HEXAGON_Vect32)((unsigned char)(new))))
1017 #define HEXAGON_V32_PUT_B1(v, new) \
1018 (((v) & 0xffff00ff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 8))
1019 #define HEXAGON_V32_PUT_B2(v, new) \
1020 (((v) & 0xff00ffff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 16))
1021 #define HEXAGON_V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((HEXAGON_Vect32)(new)) << 24))
1023 #endif /* !__hexagon__ */
1025 /* NOTE: All create macros return a HEXAGON_Vect32 type */
1027 /* Create from a word */
1029 #define HEXAGON_V32_CREATE_W(w) (w)
1031 /* Create from half words */
1035 #define HEXAGON_V32_CREATE_H(h1, h0) \
1040 } _HEXAGON_V32_internal_union; \
1041 _HEXAGON_V32_internal_union.h[0] = (h0); \
1042 _HEXAGON_V32_internal_union.h[1] = (h1); \
1043 _HEXAGON_V32_internal_union.d; \
1046 #else /* !__hexagon__ */
1048 #define HEXAGON_V32_CREATE_H(h1, h0) \
1049 ((((HEXAGON_Vect32)(h1)) << 16) | ((HEXAGON_Vect32)((h0) & 0xffff)))
1051 #endif /* !__hexagon__ */
1053 /* Create from bytes */
1056 #define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \
1061 } _HEXAGON_V32_internal_union; \
1062 _HEXAGON_V32_internal_union.b[0] = (b0); \
1063 _HEXAGON_V32_internal_union.b[1] = (b1); \
1064 _HEXAGON_V32_internal_union.b[2] = (b2); \
1065 _HEXAGON_V32_internal_union.b[3] = (b3); \
1066 _HEXAGON_V32_internal_union.d; \
1069 #else /* !__hexagon__ */
1071 #define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \
1072 ((((HEXAGON_Vect32)(b3)) << 24) | (((HEXAGON_Vect32)((b2) & 0xff)) << 16) | \
1073 (((HEXAGON_Vect32)((b1) & 0xff)) << 8) | ((HEXAGON_Vect32)((b0) & 0xff)))
1075 #endif /* !__hexagon__ */
1079 class HEXAGON_Vect32C
{
1082 HEXAGON_Vect32C(int w
= 0) : data(w
) {};
1083 HEXAGON_Vect32C(short h1
, short h0
) : data(HEXAGON_V32_CREATE_H(h1
, h0
)) {};
1084 HEXAGON_Vect32C(signed char b3
, signed char b2
, signed char b1
, signed char b0
)
1085 : data(HEXAGON_V32_CREATE_B(b3
, b2
, b1
, b0
)) {};
1086 HEXAGON_Vect32C(const HEXAGON_Vect32C
&v
) : data(v
.data
) {};
1088 HEXAGON_Vect32C
&operator=(const HEXAGON_Vect32C
&v
) {
1097 // Extract word methods
1099 return HEXAGON_V32_GET_W(data
);
1101 unsigned int UW(void) {
1102 return HEXAGON_V32_GET_UW(data
);
1105 // Extract half word methods
1107 return HEXAGON_V32_GET_H0(data
);
1110 return HEXAGON_V32_GET_H1(data
);
1112 unsigned short UH0(void) {
1113 return HEXAGON_V32_GET_UH0(data
);
1115 unsigned short UH1(void) {
1116 return HEXAGON_V32_GET_UH1(data
);
1119 // Extract byte methods
1120 signed char B0(void) {
1121 return HEXAGON_V32_GET_B0(data
);
1123 signed char B1(void) {
1124 return HEXAGON_V32_GET_B1(data
);
1126 signed char B2(void) {
1127 return HEXAGON_V32_GET_B2(data
);
1129 signed char B3(void) {
1130 return HEXAGON_V32_GET_B3(data
);
1132 unsigned char UB0(void) {
1133 return HEXAGON_V32_GET_UB0(data
);
1135 unsigned char UB1(void) {
1136 return HEXAGON_V32_GET_UB1(data
);
1138 unsigned char UB2(void) {
1139 return HEXAGON_V32_GET_UB2(data
);
1141 unsigned char UB3(void) {
1142 return HEXAGON_V32_GET_UB3(data
);
1145 // NOTE: All set methods return a HEXAGON_Vect32C type
1148 HEXAGON_Vect32C
W(int w
) {
1149 return HEXAGON_Vect32C(HEXAGON_V32_PUT_W(data
, w
));
1152 // Set half word methods
1153 HEXAGON_Vect32C
H0(short h
) {
1154 return HEXAGON_Vect32C(HEXAGON_V32_PUT_H0(data
, h
));
1156 HEXAGON_Vect32C
H1(short h
) {
1157 return HEXAGON_Vect32C(HEXAGON_V32_PUT_H1(data
, h
));
1161 HEXAGON_Vect32C
B0(signed char b
) {
1162 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B0(data
, b
));
1164 HEXAGON_Vect32C
B1(signed char b
) {
1165 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B1(data
, b
));
1167 HEXAGON_Vect32C
B2(signed char b
) {
1168 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B2(data
, b
));
1170 HEXAGON_Vect32C
B3(signed char b
) {
1171 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B3(data
, b
));
1178 #endif /* __cplusplus */
1181 #if __HVX_ARCH__ >= 65
1182 #if defined __HVX__ && (__HVX_LENGTH__ == 128)
1183 typedef long HEXAGON_VecPred128
__attribute__((__vector_size__(128)))
1184 __attribute__((aligned(128)));
1186 typedef long HEXAGON_Vect1024
__attribute__((__vector_size__(128)))
1187 __attribute__((aligned(128)));
1189 typedef long HEXAGON_Vect2048
__attribute__((__vector_size__(256)))
1190 __attribute__((aligned(256)));
1192 typedef long HEXAGON_UVect1024
__attribute__((__vector_size__(128)))
1193 __attribute__((aligned(4)));
1195 typedef long HEXAGON_UVect2048
__attribute__((__vector_size__(256)))
1196 __attribute__((aligned(4)));
1198 #define HVX_VectorPred HEXAGON_VecPred128
1199 #define HVX_Vector HEXAGON_Vect1024
1200 #define HVX_VectorPair HEXAGON_Vect2048
1201 #define HVX_UVector HEXAGON_UVect1024
1202 #define HVX_UVectorPair HEXAGON_UVect2048
1203 #else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
1204 #if defined __HVX__ && (__HVX_LENGTH__ == 64)
1205 typedef long HEXAGON_VecPred64
__attribute__((__vector_size__(64)))
1206 __attribute__((aligned(64)));
1208 typedef long HEXAGON_Vect512
__attribute__((__vector_size__(64)))
1209 __attribute__((aligned(64)));
1211 typedef long HEXAGON_Vect1024
__attribute__((__vector_size__(128)))
1212 __attribute__((aligned(128)));
1214 typedef long HEXAGON_UVect512
__attribute__((__vector_size__(64)))
1215 __attribute__((aligned(4)));
1217 typedef long HEXAGON_UVect1024
__attribute__((__vector_size__(128)))
1218 __attribute__((aligned(4)));
1220 #define HVX_VectorPred HEXAGON_VecPred64
1221 #define HVX_Vector HEXAGON_Vect512
1222 #define HVX_VectorPair HEXAGON_Vect1024
1223 #define HVX_UVector HEXAGON_UVect512
1224 #define HVX_UVectorPair HEXAGON_UVect1024
1225 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */
1226 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
1227 #endif /* __HVX_ARCH__ >= 65 */
1231 typedef int HEXAGON_Pred
;
1234 *** backward compatibility aliases
1238 #define Q6Vect Q6Vect64
1239 #define Q6V_GET_D Q6V64_GET_D
1240 #define Q6V_GET_UD Q6V64_GET_UD
1241 #define Q6V_GET_W0 Q6V64_GET_W0
1242 #define Q6V_GET_W1 Q6V64_GET_W1
1243 #define Q6V_GET_UW0 Q6V64_GET_UW0
1244 #define Q6V_GET_UW1 Q6V64_GET_UW1
1245 #define Q6V_GET_H0 Q6V64_GET_H0
1246 #define Q6V_GET_H1 Q6V64_GET_H1
1247 #define Q6V_GET_H2 Q6V64_GET_H2
1248 #define Q6V_GET_H3 Q6V64_GET_H3
1249 #define Q6V_GET_UH0 Q6V64_GET_UH0
1250 #define Q6V_GET_UH1 Q6V64_GET_UH1
1251 #define Q6V_GET_UH2 Q6V64_GET_UH2
1252 #define Q6V_GET_UH3 Q6V64_GET_UH3
1253 #define Q6V_GET_B0 Q6V64_GET_B0
1254 #define Q6V_GET_B1 Q6V64_GET_B1
1255 #define Q6V_GET_B2 Q6V64_GET_B2
1256 #define Q6V_GET_B3 Q6V64_GET_B3
1257 #define Q6V_GET_B4 Q6V64_GET_B4
1258 #define Q6V_GET_B5 Q6V64_GET_B5
1259 #define Q6V_GET_B6 Q6V64_GET_B6
1260 #define Q6V_GET_B7 Q6V64_GET_B7
1261 #define Q6V_GET_UB0 Q6V64_GET_UB0
1262 #define Q6V_GET_UB1 Q6V64_GET_UB1
1263 #define Q6V_GET_UB2 Q6V64_GET_UB2
1264 #define Q6V_GET_UB3 Q6V64_GET_UB3
1265 #define Q6V_GET_UB4 Q6V64_GET_UB4
1266 #define Q6V_GET_UB5 Q6V64_GET_UB5
1267 #define Q6V_GET_UB6 Q6V64_GET_UB6
1268 #define Q6V_GET_UB7 Q6V64_GET_UB7
1269 #define Q6V_PUT_D Q6V64_PUT_D
1270 #define Q6V_PUT_W0 Q6V64_PUT_W0
1271 #define Q6V_PUT_W1 Q6V64_PUT_W1
1272 #define Q6V_PUT_H0 Q6V64_PUT_H0
1273 #define Q6V_PUT_H1 Q6V64_PUT_H1
1274 #define Q6V_PUT_H2 Q6V64_PUT_H2
1275 #define Q6V_PUT_H3 Q6V64_PUT_H3
1276 #define Q6V_PUT_B0 Q6V64_PUT_B0
1277 #define Q6V_PUT_B1 Q6V64_PUT_B1
1278 #define Q6V_PUT_B2 Q6V64_PUT_B2
1279 #define Q6V_PUT_B3 Q6V64_PUT_B3
1280 #define Q6V_PUT_B4 Q6V64_PUT_B4
1281 #define Q6V_PUT_B5 Q6V64_PUT_B5
1282 #define Q6V_PUT_B6 Q6V64_PUT_B6
1283 #define Q6V_PUT_B7 Q6V64_PUT_B7
1284 #define Q6V_CREATE_D Q6V64_CREATE_D
1285 #define Q6V_CREATE_W Q6V64_CREATE_W
1286 #define Q6V_CREATE_H Q6V64_CREATE_H
1287 #define Q6V_CREATE_B Q6V64_CREATE_B
1290 #define Q6VectC Q6Vect64C
1291 #endif /* __cplusplus */
1293 /* 64 Bit Vectors */
1295 typedef long long __attribute__((__may_alias__
)) Q6Vect64
;
1297 /* Extract doubleword macros */
1299 #define Q6V64_GET_D(v) (v)
1300 #define Q6V64_GET_UD(v) ((unsigned long long)(v))
1302 /* Extract word macros */
1304 #define Q6V64_GET_W0(v) \
1309 } _Q6V64_internal_union; \
1310 _Q6V64_internal_union.d = (v); \
1311 _Q6V64_internal_union.w[0]; \
1313 #define Q6V64_GET_W1(v) \
1318 } _Q6V64_internal_union; \
1319 _Q6V64_internal_union.d = (v); \
1320 _Q6V64_internal_union.w[1]; \
1322 #define Q6V64_GET_UW0(v) \
1326 unsigned int uw[2]; \
1327 } _Q6V64_internal_union; \
1328 _Q6V64_internal_union.d = (v); \
1329 _Q6V64_internal_union.uw[0]; \
1331 #define Q6V64_GET_UW1(v) \
1335 unsigned int uw[2]; \
1336 } _Q6V64_internal_union; \
1337 _Q6V64_internal_union.d = (v); \
1338 _Q6V64_internal_union.uw[1]; \
1341 /* Extract half word macros */
1343 #define Q6V64_GET_H0(v) \
1348 } _Q6V64_internal_union; \
1349 _Q6V64_internal_union.d = (v); \
1350 _Q6V64_internal_union.h[0]; \
1352 #define Q6V64_GET_H1(v) \
1357 } _Q6V64_internal_union; \
1358 _Q6V64_internal_union.d = (v); \
1359 _Q6V64_internal_union.h[1]; \
1361 #define Q6V64_GET_H2(v) \
1366 } _Q6V64_internal_union; \
1367 _Q6V64_internal_union.d = (v); \
1368 _Q6V64_internal_union.h[2]; \
1370 #define Q6V64_GET_H3(v) \
1375 } _Q6V64_internal_union; \
1376 _Q6V64_internal_union.d = (v); \
1377 _Q6V64_internal_union.h[3]; \
1379 #define Q6V64_GET_UH0(v) \
1383 unsigned short uh[4]; \
1384 } _Q6V64_internal_union; \
1385 _Q6V64_internal_union.d = (v); \
1386 _Q6V64_internal_union.uh[0]; \
1388 #define Q6V64_GET_UH1(v) \
1392 unsigned short uh[4]; \
1393 } _Q6V64_internal_union; \
1394 _Q6V64_internal_union.d = (v); \
1395 _Q6V64_internal_union.uh[1]; \
1397 #define Q6V64_GET_UH2(v) \
1401 unsigned short uh[4]; \
1402 } _Q6V64_internal_union; \
1403 _Q6V64_internal_union.d = (v); \
1404 _Q6V64_internal_union.uh[2]; \
1406 #define Q6V64_GET_UH3(v) \
1410 unsigned short uh[4]; \
1411 } _Q6V64_internal_union; \
1412 _Q6V64_internal_union.d = (v); \
1413 _Q6V64_internal_union.uh[3]; \
1416 /* Extract byte macros */
1418 #define Q6V64_GET_B0(v) \
1423 } _Q6V64_internal_union; \
1424 _Q6V64_internal_union.d = (v); \
1425 _Q6V64_internal_union.b[0]; \
1427 #define Q6V64_GET_B1(v) \
1432 } _Q6V64_internal_union; \
1433 _Q6V64_internal_union.d = (v); \
1434 _Q6V64_internal_union.b[1]; \
1436 #define Q6V64_GET_B2(v) \
1441 } _Q6V64_internal_union; \
1442 _Q6V64_internal_union.d = (v); \
1443 _Q6V64_internal_union.b[2]; \
1445 #define Q6V64_GET_B3(v) \
1450 } _Q6V64_internal_union; \
1451 _Q6V64_internal_union.d = (v); \
1452 _Q6V64_internal_union.b[3]; \
1454 #define Q6V64_GET_B4(v) \
1459 } _Q6V64_internal_union; \
1460 _Q6V64_internal_union.d = (v); \
1461 _Q6V64_internal_union.b[4]; \
1463 #define Q6V64_GET_B5(v) \
1468 } _Q6V64_internal_union; \
1469 _Q6V64_internal_union.d = (v); \
1470 _Q6V64_internal_union.b[5]; \
1472 #define Q6V64_GET_B6(v) \
1477 } _Q6V64_internal_union; \
1478 _Q6V64_internal_union.d = (v); \
1479 _Q6V64_internal_union.b[6]; \
1481 #define Q6V64_GET_B7(v) \
1486 } _Q6V64_internal_union; \
1487 _Q6V64_internal_union.d = (v); \
1488 _Q6V64_internal_union.b[7]; \
1490 #define Q6V64_GET_UB0(v) \
1494 unsigned char ub[8]; \
1495 } _Q6V64_internal_union; \
1496 _Q6V64_internal_union.d = (v); \
1497 _Q6V64_internal_union.ub[0]; \
1499 #define Q6V64_GET_UB1(v) \
1503 unsigned char ub[8]; \
1504 } _Q6V64_internal_union; \
1505 _Q6V64_internal_union.d = (v); \
1506 _Q6V64_internal_union.ub[1]; \
1508 #define Q6V64_GET_UB2(v) \
1512 unsigned char ub[8]; \
1513 } _Q6V64_internal_union; \
1514 _Q6V64_internal_union.d = (v); \
1515 _Q6V64_internal_union.ub[2]; \
1517 #define Q6V64_GET_UB3(v) \
1521 unsigned char ub[8]; \
1522 } _Q6V64_internal_union; \
1523 _Q6V64_internal_union.d = (v); \
1524 _Q6V64_internal_union.ub[3]; \
1526 #define Q6V64_GET_UB4(v) \
1530 unsigned char ub[8]; \
1531 } _Q6V64_internal_union; \
1532 _Q6V64_internal_union.d = (v); \
1533 _Q6V64_internal_union.ub[4]; \
1535 #define Q6V64_GET_UB5(v) \
1539 unsigned char ub[8]; \
1540 } _Q6V64_internal_union; \
1541 _Q6V64_internal_union.d = (v); \
1542 _Q6V64_internal_union.ub[5]; \
1544 #define Q6V64_GET_UB6(v) \
1548 unsigned char ub[8]; \
1549 } _Q6V64_internal_union; \
1550 _Q6V64_internal_union.d = (v); \
1551 _Q6V64_internal_union.ub[6]; \
1553 #define Q6V64_GET_UB7(v) \
1557 unsigned char ub[8]; \
1558 } _Q6V64_internal_union; \
1559 _Q6V64_internal_union.d = (v); \
1560 _Q6V64_internal_union.ub[7]; \
1563 /* NOTE: All set macros return a Q6Vect64 type */
1565 /* Set doubleword macro */
1567 #define Q6V64_PUT_D(v, new) (new)
1569 /* Set word macros */
1573 #define Q6V64_PUT_W0(v, new) \
1578 } _Q6V64_internal_union; \
1579 _Q6V64_internal_union.d = (v); \
1580 _Q6V64_internal_union.w[0] = (new); \
1581 _Q6V64_internal_union.d; \
1583 #define Q6V64_PUT_W1(v, new) \
1588 } _Q6V64_internal_union; \
1589 _Q6V64_internal_union.d = (v); \
1590 _Q6V64_internal_union.w[1] = (new); \
1591 _Q6V64_internal_union.d; \
1594 #else /* !__qdsp6__ */
1596 #define Q6V64_PUT_W0(v, new) \
1597 (((v) & 0xffffffff00000000LL) | ((Q6Vect64)((unsigned int)(new))))
1598 #define Q6V64_PUT_W1(v, new) \
1599 (((v) & 0x00000000ffffffffLL) | (((Q6Vect64)(new)) << 32LL))
1601 #endif /* !__qdsp6__ */
1603 /* Set half word macros */
1607 #define Q6V64_PUT_H0(v, new) \
1612 } _Q6V64_internal_union; \
1613 _Q6V64_internal_union.d = (v); \
1614 _Q6V64_internal_union.h[0] = (new); \
1615 _Q6V64_internal_union.d; \
1617 #define Q6V64_PUT_H1(v, new) \
1622 } _Q6V64_internal_union; \
1623 _Q6V64_internal_union.d = (v); \
1624 _Q6V64_internal_union.h[1] = (new); \
1625 _Q6V64_internal_union.d; \
1627 #define Q6V64_PUT_H2(v, new) \
1632 } _Q6V64_internal_union; \
1633 _Q6V64_internal_union.d = (v); \
1634 _Q6V64_internal_union.h[2] = (new); \
1635 _Q6V64_internal_union.d; \
1637 #define Q6V64_PUT_H3(v, new) \
1642 } _Q6V64_internal_union; \
1643 _Q6V64_internal_union.d = (v); \
1644 _Q6V64_internal_union.h[3] = (new); \
1645 _Q6V64_internal_union.d; \
1648 #else /* !__qdsp6__ */
1650 #define Q6V64_PUT_H0(v, new) \
1651 (((v) & 0xffffffffffff0000LL) | ((Q6Vect64)((unsigned short)(new))))
1652 #define Q6V64_PUT_H1(v, new) \
1653 (((v) & 0xffffffff0000ffffLL) | (((Q6Vect64)((unsigned short)(new))) << 16LL))
1654 #define Q6V64_PUT_H2(v, new) \
1655 (((v) & 0xffff0000ffffffffLL) | (((Q6Vect64)((unsigned short)(new))) << 32LL))
1656 #define Q6V64_PUT_H3(v, new) \
1657 (((v) & 0x0000ffffffffffffLL) | (((Q6Vect64)(new)) << 48LL))
1659 #endif /* !__qdsp6__ */
1661 /* Set byte macros */
1665 #define Q6V64_PUT_B0(v, new) \
1670 } _Q6V64_internal_union; \
1671 _Q6V64_internal_union.d = (v); \
1672 _Q6V64_internal_union.b[0] = (new); \
1673 _Q6V64_internal_union.d; \
1675 #define Q6V64_PUT_B1(v, new) \
1680 } _Q6V64_internal_union; \
1681 _Q6V64_internal_union.d = (v); \
1682 _Q6V64_internal_union.b[1] = (new); \
1683 _Q6V64_internal_union.d; \
1685 #define Q6V64_PUT_B2(v, new) \
1690 } _Q6V64_internal_union; \
1691 _Q6V64_internal_union.d = (v); \
1692 _Q6V64_internal_union.b[2] = (new); \
1693 _Q6V64_internal_union.d; \
1695 #define Q6V64_PUT_B3(v, new) \
1700 } _Q6V64_internal_union; \
1701 _Q6V64_internal_union.d = (v); \
1702 _Q6V64_internal_union.b[3] = (new); \
1703 _Q6V64_internal_union.d; \
1705 #define Q6V64_PUT_B4(v, new) \
1710 } _Q6V64_internal_union; \
1711 _Q6V64_internal_union.d = (v); \
1712 _Q6V64_internal_union.b[4] = (new); \
1713 _Q6V64_internal_union.d; \
1715 #define Q6V64_PUT_B5(v, new) \
1720 } _Q6V64_internal_union; \
1721 _Q6V64_internal_union.d = (v); \
1722 _Q6V64_internal_union.b[5] = (new); \
1723 _Q6V64_internal_union.d; \
1725 #define Q6V64_PUT_B6(v, new) \
1730 } _Q6V64_internal_union; \
1731 _Q6V64_internal_union.d = (v); \
1732 _Q6V64_internal_union.b[6] = (new); \
1733 _Q6V64_internal_union.d; \
1735 #define Q6V64_PUT_B7(v, new) \
1740 } _Q6V64_internal_union; \
1741 _Q6V64_internal_union.d = (v); \
1742 _Q6V64_internal_union.b[7] = (new); \
1743 _Q6V64_internal_union.d; \
1746 #else /* !__qdsp6__ */
1748 #define Q6V64_PUT_B0(v, new) \
1749 (((v) & 0xffffffffffffff00LL) | ((Q6Vect64)((unsigned char)(new))))
1750 #define Q6V64_PUT_B1(v, new) \
1751 (((v) & 0xffffffffffff00ffLL) | (((Q6Vect64)((unsigned char)(new))) << 8LL))
1752 #define Q6V64_PUT_B2(v, new) \
1753 (((v) & 0xffffffffff00ffffLL) | (((Q6Vect64)((unsigned char)(new))) << 16LL))
1754 #define Q6V64_PUT_B3(v, new) \
1755 (((v) & 0xffffffff00ffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 24LL))
1756 #define Q6V64_PUT_B4(v, new) \
1757 (((v) & 0xffffff00ffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 32LL))
1758 #define Q6V64_PUT_B5(v, new) \
1759 (((v) & 0xffff00ffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 40LL))
1760 #define Q6V64_PUT_B6(v, new) \
1761 (((v) & 0xff00ffffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 48LL))
1762 #define Q6V64_PUT_B7(v, new) \
1763 (((v) & 0x00ffffffffffffffLL) | (((Q6Vect64)(new)) << 56LL))
1765 #endif /* !__qdsp6__ */
1767 /* NOTE: All create macros return a Q6Vect64 type */
1769 /* Create from a doubleword */
1771 #define Q6V64_CREATE_D(d) (d)
1773 /* Create from words */
1777 #define Q6V64_CREATE_W(w1, w0) \
1782 } _Q6V64_internal_union; \
1783 _Q6V64_internal_union.w[0] = (w0); \
1784 _Q6V64_internal_union.w[1] = (w1); \
1785 _Q6V64_internal_union.d; \
1788 #else /* !__qdsp6__ */
1790 #define Q6V64_CREATE_W(w1, w0) \
1791 ((((Q6Vect64)(w1)) << 32LL) | ((Q6Vect64)((w0) & 0xffffffff)))
1793 #endif /* !__qdsp6__ */
1795 /* Create from half words */
1799 #define Q6V64_CREATE_H(h3, h2, h1, h0) \
1804 } _Q6V64_internal_union; \
1805 _Q6V64_internal_union.h[0] = (h0); \
1806 _Q6V64_internal_union.h[1] = (h1); \
1807 _Q6V64_internal_union.h[2] = (h2); \
1808 _Q6V64_internal_union.h[3] = (h3); \
1809 _Q6V64_internal_union.d; \
1812 #else /* !__qdsp6__ */
1814 #define Q6V64_CREATE_H(h3, h2, h1, h0) \
1815 ((((Q6Vect64)(h3)) << 48LL) | (((Q6Vect64)((h2) & 0xffff)) << 32LL) | \
1816 (((Q6Vect64)((h1) & 0xffff)) << 16LL) | ((Q6Vect64)((h0) & 0xffff)))
1818 #endif /* !__qdsp6__ */
1820 /* Create from bytes */
1824 #define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
1829 } _Q6V64_internal_union; \
1830 _Q6V64_internal_union.b[0] = (b0); \
1831 _Q6V64_internal_union.b[1] = (b1); \
1832 _Q6V64_internal_union.b[2] = (b2); \
1833 _Q6V64_internal_union.b[3] = (b3); \
1834 _Q6V64_internal_union.b[4] = (b4); \
1835 _Q6V64_internal_union.b[5] = (b5); \
1836 _Q6V64_internal_union.b[6] = (b6); \
1837 _Q6V64_internal_union.b[7] = (b7); \
1838 _Q6V64_internal_union.d; \
1841 #else /* !__qdsp6__ */
1843 #define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \
1844 ((((Q6Vect64)(b7)) << 56LL) | (((Q6Vect64)((b6) & 0xff)) << 48LL) | \
1845 (((Q6Vect64)((b5) & 0xff)) << 40LL) | (((Q6Vect64)((b4) & 0xff)) << 32LL) | \
1846 (((Q6Vect64)((b3) & 0xff)) << 24LL) | (((Q6Vect64)((b2) & 0xff)) << 16LL) | \
1847 (((Q6Vect64)((b1) & 0xff)) << 8LL) | ((Q6Vect64)((b0) & 0xff)))
1849 #endif /* !__qdsp6__ */
1856 Q6Vect64C(long long d
= 0) : data(d
) {};
1857 Q6Vect64C(int w1
, int w0
) : data(Q6V64_CREATE_W(w1
, w0
)) {};
1858 Q6Vect64C(short h3
, short h2
, short h1
, short h0
)
1859 : data(Q6V64_CREATE_H(h3
, h2
, h1
, h0
)) {};
1860 Q6Vect64C(signed char b7
, signed char b6
, signed char b5
, signed char b4
,
1861 signed char b3
, signed char b2
, signed char b1
, signed char b0
)
1862 : data(Q6V64_CREATE_B(b7
, b6
, b5
, b4
, b3
, b2
, b1
, b0
)) {};
1863 Q6Vect64C(const Q6Vect64C
&v
) : data(v
.data
) {};
1865 Q6Vect64C
&operator=(const Q6Vect64C
&v
) {
1870 operator long long() {
1874 // Extract doubleword methods
1876 return Q6V64_GET_D(data
);
1878 unsigned long long UD(void) {
1879 return Q6V64_GET_UD(data
);
1882 // Extract word methods
1884 return Q6V64_GET_W0(data
);
1887 return Q6V64_GET_W1(data
);
1889 unsigned int UW0(void) {
1890 return Q6V64_GET_UW0(data
);
1892 unsigned int UW1(void) {
1893 return Q6V64_GET_UW1(data
);
1896 // Extract half word methods
1898 return Q6V64_GET_H0(data
);
1901 return Q6V64_GET_H1(data
);
1904 return Q6V64_GET_H2(data
);
1907 return Q6V64_GET_H3(data
);
1909 unsigned short UH0(void) {
1910 return Q6V64_GET_UH0(data
);
1912 unsigned short UH1(void) {
1913 return Q6V64_GET_UH1(data
);
1915 unsigned short UH2(void) {
1916 return Q6V64_GET_UH2(data
);
1918 unsigned short UH3(void) {
1919 return Q6V64_GET_UH3(data
);
1922 // Extract byte methods
1923 signed char B0(void) {
1924 return Q6V64_GET_B0(data
);
1926 signed char B1(void) {
1927 return Q6V64_GET_B1(data
);
1929 signed char B2(void) {
1930 return Q6V64_GET_B2(data
);
1932 signed char B3(void) {
1933 return Q6V64_GET_B3(data
);
1935 signed char B4(void) {
1936 return Q6V64_GET_B4(data
);
1938 signed char B5(void) {
1939 return Q6V64_GET_B5(data
);
1941 signed char B6(void) {
1942 return Q6V64_GET_B6(data
);
1944 signed char B7(void) {
1945 return Q6V64_GET_B7(data
);
1947 unsigned char UB0(void) {
1948 return Q6V64_GET_UB0(data
);
1950 unsigned char UB1(void) {
1951 return Q6V64_GET_UB1(data
);
1953 unsigned char UB2(void) {
1954 return Q6V64_GET_UB2(data
);
1956 unsigned char UB3(void) {
1957 return Q6V64_GET_UB3(data
);
1959 unsigned char UB4(void) {
1960 return Q6V64_GET_UB4(data
);
1962 unsigned char UB5(void) {
1963 return Q6V64_GET_UB5(data
);
1965 unsigned char UB6(void) {
1966 return Q6V64_GET_UB6(data
);
1968 unsigned char UB7(void) {
1969 return Q6V64_GET_UB7(data
);
1972 // NOTE: All set methods return a Q6Vect64C type
1974 // Set doubleword method
1975 Q6Vect64C
D(long long d
) {
1976 return Q6Vect64C(Q6V64_PUT_D(data
, d
));
1980 Q6Vect64C
W0(int w
) {
1981 return Q6Vect64C(Q6V64_PUT_W0(data
, w
));
1983 Q6Vect64C
W1(int w
) {
1984 return Q6Vect64C(Q6V64_PUT_W1(data
, w
));
1987 // Set half word methods
1988 Q6Vect64C
H0(short h
) {
1989 return Q6Vect64C(Q6V64_PUT_H0(data
, h
));
1991 Q6Vect64C
H1(short h
) {
1992 return Q6Vect64C(Q6V64_PUT_H1(data
, h
));
1994 Q6Vect64C
H2(short h
) {
1995 return Q6Vect64C(Q6V64_PUT_H2(data
, h
));
1997 Q6Vect64C
H3(short h
) {
1998 return Q6Vect64C(Q6V64_PUT_H3(data
, h
));
2002 Q6Vect64C
B0(signed char b
) {
2003 return Q6Vect64C(Q6V64_PUT_B0(data
, b
));
2005 Q6Vect64C
B1(signed char b
) {
2006 return Q6Vect64C(Q6V64_PUT_B1(data
, b
));
2008 Q6Vect64C
B2(signed char b
) {
2009 return Q6Vect64C(Q6V64_PUT_B2(data
, b
));
2011 Q6Vect64C
B3(signed char b
) {
2012 return Q6Vect64C(Q6V64_PUT_B3(data
, b
));
2014 Q6Vect64C
B4(signed char b
) {
2015 return Q6Vect64C(Q6V64_PUT_B4(data
, b
));
2017 Q6Vect64C
B5(signed char b
) {
2018 return Q6Vect64C(Q6V64_PUT_B5(data
, b
));
2020 Q6Vect64C
B6(signed char b
) {
2021 return Q6Vect64C(Q6V64_PUT_B6(data
, b
));
2023 Q6Vect64C
B7(signed char b
) {
2024 return Q6Vect64C(Q6V64_PUT_B7(data
, b
));
2031 #endif /* __cplusplus */
2033 /* 32 Bit Vectors */
2035 typedef int Q6Vect32
;
2037 /* Extract word macros */
2039 #define Q6V32_GET_W(v) (v)
2040 #define Q6V32_GET_UW(v) ((unsigned int)(v))
2042 /* Extract half word macros */
2044 #define Q6V32_GET_H0(v) \
2049 } _Q6V32_internal_union; \
2050 _Q6V32_internal_union.w = (v); \
2051 _Q6V32_internal_union.h[0]; \
2053 #define Q6V32_GET_H1(v) \
2058 } _Q6V32_internal_union; \
2059 _Q6V32_internal_union.w = (v); \
2060 _Q6V32_internal_union.h[1]; \
2062 #define Q6V32_GET_UH0(v) \
2066 unsigned short uh[2]; \
2067 } _Q6V32_internal_union; \
2068 _Q6V32_internal_union.w = (v); \
2069 _Q6V32_internal_union.uh[0]; \
2071 #define Q6V32_GET_UH1(v) \
2075 unsigned short uh[2]; \
2076 } _Q6V32_internal_union; \
2077 _Q6V32_internal_union.w = (v); \
2078 _Q6V32_internal_union.uh[1]; \
2081 /* Extract byte macros */
2083 #define Q6V32_GET_B0(v) \
2088 } _Q6V32_internal_union; \
2089 _Q6V32_internal_union.w = (v); \
2090 _Q6V32_internal_union.b[0]; \
2092 #define Q6V32_GET_B1(v) \
2097 } _Q6V32_internal_union; \
2098 _Q6V32_internal_union.w = (v); \
2099 _Q6V32_internal_union.b[1]; \
2101 #define Q6V32_GET_B2(v) \
2106 } _Q6V32_internal_union; \
2107 _Q6V32_internal_union.w = (v); \
2108 _Q6V32_internal_union.b[2]; \
2110 #define Q6V32_GET_B3(v) \
2115 } _Q6V32_internal_union; \
2116 _Q6V32_internal_union.w = (v); \
2117 _Q6V32_internal_union.b[3]; \
2119 #define Q6V32_GET_UB0(v) \
2123 unsigned char ub[4]; \
2124 } _Q6V32_internal_union; \
2125 _Q6V32_internal_union.w = (v); \
2126 _Q6V32_internal_union.ub[0]; \
2128 #define Q6V32_GET_UB1(v) \
2132 unsigned char ub[4]; \
2133 } _Q6V32_internal_union; \
2134 _Q6V32_internal_union.w = (v); \
2135 _Q6V32_internal_union.ub[1]; \
2137 #define Q6V32_GET_UB2(v) \
2141 unsigned char ub[4]; \
2142 } _Q6V32_internal_union; \
2143 _Q6V32_internal_union.w = (v); \
2144 _Q6V32_internal_union.ub[2]; \
2146 #define Q6V32_GET_UB3(v) \
2150 unsigned char ub[4]; \
2151 } _Q6V32_internal_union; \
2152 _Q6V32_internal_union.w = (v); \
2153 _Q6V32_internal_union.ub[3]; \
2156 /* NOTE: All set macros return a Q6Vect32 type */
2158 /* Set word macro */
2160 #define Q6V32_PUT_W(v, new) (new)
2162 /* Set half word macros */
2166 #define Q6V32_PUT_H0(v, new) \
2171 } _Q6V32_internal_union; \
2172 _Q6V32_internal_union.w = (v); \
2173 _Q6V32_internal_union.h[0] = (new); \
2174 _Q6V32_internal_union.w; \
2176 #define Q6V32_PUT_H1(v, new) \
2181 } _Q6V32_internal_union; \
2182 _Q6V32_internal_union.w = (v); \
2183 _Q6V32_internal_union.h[1] = (new); \
2184 _Q6V32_internal_union.w; \
2187 #else /* !__qdsp6__ */
2189 #define Q6V32_PUT_H0(v, new) \
2190 (((v) & 0xffff0000) | ((Q6Vect32)((unsigned short)(new))))
2191 #define Q6V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((Q6Vect32)(new)) << 16))
2193 #endif /* !__qdsp6__ */
2195 /* Set byte macros */
2199 #define Q6V32_PUT_B0(v, new) \
2204 } _Q6V32_internal_union; \
2205 _Q6V32_internal_union.w = (v); \
2206 _Q6V32_internal_union.b[0] = (new); \
2207 _Q6V32_internal_union.w; \
2209 #define Q6V32_PUT_B1(v, new) \
2214 } _Q6V32_internal_union; \
2215 _Q6V32_internal_union.w = (v); \
2216 _Q6V32_internal_union.b[1] = (new); \
2217 _Q6V32_internal_union.w; \
2219 #define Q6V32_PUT_B2(v, new) \
2224 } _Q6V32_internal_union; \
2225 _Q6V32_internal_union.w = (v); \
2226 _Q6V32_internal_union.b[2] = (new); \
2227 _Q6V32_internal_union.w; \
2229 #define Q6V32_PUT_B3(v, new) \
2234 } _Q6V32_internal_union; \
2235 _Q6V32_internal_union.w = (v); \
2236 _Q6V32_internal_union.b[3] = (new); \
2237 _Q6V32_internal_union.w; \
2240 #else /* !__qdsp6__ */
2242 #define Q6V32_PUT_B0(v, new) \
2243 (((v) & 0xffffff00) | ((Q6Vect32)((unsigned char)(new))))
2244 #define Q6V32_PUT_B1(v, new) \
2245 (((v) & 0xffff00ff) | (((Q6Vect32)((unsigned char)(new))) << 8))
2246 #define Q6V32_PUT_B2(v, new) \
2247 (((v) & 0xff00ffff) | (((Q6Vect32)((unsigned char)(new))) << 16))
2248 #define Q6V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((Q6Vect32)(new)) << 24))
2250 #endif /* !__qdsp6__ */
2252 /* NOTE: All create macros return a Q6Vect32 type */
2254 /* Create from a word */
2256 #define Q6V32_CREATE_W(w) (w)
2258 /* Create from half words */
2262 #define Q6V32_CREATE_H(h1, h0) \
2267 } _Q6V32_internal_union; \
2268 _Q6V32_internal_union.h[0] = (h0); \
2269 _Q6V32_internal_union.h[1] = (h1); \
2270 _Q6V32_internal_union.d; \
2273 #else /* !__qdsp6__ */
2275 #define Q6V32_CREATE_H(h1, h0) \
2276 ((((Q6Vect32)(h1)) << 16) | ((Q6Vect32)((h0) & 0xffff)))
2278 #endif /* !__qdsp6__ */
2280 /* Create from bytes */
2283 #define Q6V32_CREATE_B(b3, b2, b1, b0) \
2288 } _Q6V32_internal_union; \
2289 _Q6V32_internal_union.b[0] = (b0); \
2290 _Q6V32_internal_union.b[1] = (b1); \
2291 _Q6V32_internal_union.b[2] = (b2); \
2292 _Q6V32_internal_union.b[3] = (b3); \
2293 _Q6V32_internal_union.d; \
2296 #else /* !__qdsp6__ */
2298 #define Q6V32_CREATE_B(b3, b2, b1, b0) \
2299 ((((Q6Vect32)(b3)) << 24) | (((Q6Vect32)((b2) & 0xff)) << 16) | \
2300 (((Q6Vect32)((b1) & 0xff)) << 8) | ((Q6Vect32)((b0) & 0xff)))
2302 #endif /* !__qdsp6__ */
2309 Q6Vect32C(int w
= 0) : data(w
) {};
2310 Q6Vect32C(short h1
, short h0
) : data(Q6V32_CREATE_H(h1
, h0
)) {};
2311 Q6Vect32C(signed char b3
, signed char b2
, signed char b1
, signed char b0
)
2312 : data(Q6V32_CREATE_B(b3
, b2
, b1
, b0
)) {};
2313 Q6Vect32C(const Q6Vect32C
&v
) : data(v
.data
) {};
2315 Q6Vect32C
&operator=(const Q6Vect32C
&v
) {
2324 // Extract word methods
2326 return Q6V32_GET_W(data
);
2328 unsigned int UW(void) {
2329 return Q6V32_GET_UW(data
);
2332 // Extract half word methods
2334 return Q6V32_GET_H0(data
);
2337 return Q6V32_GET_H1(data
);
2339 unsigned short UH0(void) {
2340 return Q6V32_GET_UH0(data
);
2342 unsigned short UH1(void) {
2343 return Q6V32_GET_UH1(data
);
2346 // Extract byte methods
2347 signed char B0(void) {
2348 return Q6V32_GET_B0(data
);
2350 signed char B1(void) {
2351 return Q6V32_GET_B1(data
);
2353 signed char B2(void) {
2354 return Q6V32_GET_B2(data
);
2356 signed char B3(void) {
2357 return Q6V32_GET_B3(data
);
2359 unsigned char UB0(void) {
2360 return Q6V32_GET_UB0(data
);
2362 unsigned char UB1(void) {
2363 return Q6V32_GET_UB1(data
);
2365 unsigned char UB2(void) {
2366 return Q6V32_GET_UB2(data
);
2368 unsigned char UB3(void) {
2369 return Q6V32_GET_UB3(data
);
2372 // NOTE: All set methods return a Q6Vect32C type
2375 Q6Vect32C
W(int w
) {
2376 return Q6Vect32C(Q6V32_PUT_W(data
, w
));
2379 // Set half word methods
2380 Q6Vect32C
H0(short h
) {
2381 return Q6Vect32C(Q6V32_PUT_H0(data
, h
));
2383 Q6Vect32C
H1(short h
) {
2384 return Q6Vect32C(Q6V32_PUT_H1(data
, h
));
2388 Q6Vect32C
B0(signed char b
) {
2389 return Q6Vect32C(Q6V32_PUT_B0(data
, b
));
2391 Q6Vect32C
B1(signed char b
) {
2392 return Q6Vect32C(Q6V32_PUT_B1(data
, b
));
2394 Q6Vect32C
B2(signed char b
) {
2395 return Q6Vect32C(Q6V32_PUT_B2(data
, b
));
2397 Q6Vect32C
B3(signed char b
) {
2398 return Q6Vect32C(Q6V32_PUT_B3(data
, b
));
2405 #endif /* __cplusplus */
2408 #if __HVX_ARCH__ >= 65
2409 #if defined __HVX__ && (__HVX_LENGTH__ == 128)
2410 typedef long Q6VecPred128
__attribute__((__vector_size__(128)))
2411 __attribute__((aligned(128)));
2413 typedef long Q6Vect1024
__attribute__((__vector_size__(128)))
2414 __attribute__((aligned(128)));
2416 typedef long Q6Vect2048
__attribute__((__vector_size__(256)))
2417 __attribute__((aligned(256)));
2419 #else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
2420 #if defined __HVX__ && (__HVX_LENGTH__ == 64)
2421 typedef long Q6VecPred64
__attribute__((__vector_size__(64)))
2422 __attribute__((aligned(64)));
2424 typedef long Q6Vect512
__attribute__((__vector_size__(64)))
2425 __attribute__((aligned(64)));
2427 typedef long Q6Vect1024
__attribute__((__vector_size__(128)))
2428 __attribute__((aligned(128)));
2430 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */
2431 #endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */
2432 #endif /* __HVX_ARCH__ >= 65 */
2441 // Extract HVX VectorPair macro.
2442 #define HEXAGON_HVX_GET_W(v) (v)
2444 // Extract HVX Vector macros.
2445 #define HEXAGON_HVX_GET_V0(v) \
2450 } _HEXAGON_HVX_internal_union; \
2451 _HEXAGON_HVX_internal_union.W = (v); \
2452 _HEXAGON_HVX_internal_union.V[0]; \
2454 #define HEXAGON_HVX_GET_V1(v) \
2459 } _HEXAGON_HVX_internal_union; \
2460 _HEXAGON_HVX_internal_union.W = (v); \
2461 _HEXAGON_HVX_internal_union.V[1]; \
2463 #define HEXAGON_HVX_GET_P(v) \
2467 HVX_VectorPred P[2]; \
2468 } _HEXAGON_HVX_internal_union; \
2469 _HEXAGON_HVX_internal_union.W = (v); \
2470 _HEXAGON_HVX_internal_union.P[0]; \
2473 // Set HVX VectorPair macro.
2474 #define HEXAGON_HVX_PUT_W(v, new) (new)
2476 // Set HVX Vector macros.
2477 #define HEXAGON_HVX_PUT_V0(v, new) \
2482 } _HEXAGON_HVX_internal_union; \
2483 _HEXAGON_HVX_internal_union.W = (v); \
2484 _HEXAGON_HVX_internal_union.V[0] = (new); \
2485 _HEXAGON_HVX_internal_union.W; \
2488 #define HEXAGON_HVX_PUT_V1(v, new) \
2493 } _HEXAGON_HVX_internal_union; \
2494 _HEXAGON_HVX_internal_union.W = (v); \
2495 _HEXAGON_HVX_internal_union.V[1] = (new); \
2496 _HEXAGON_HVX_internal_union.W; \
2499 #define HEXAGON_HVX_PUT_P(v, new) \
2503 HVX_VectorPred P[2]; \
2504 } _HEXAGON_HVX_internal_union; \
2505 _HEXAGON_HVX_internal_union.W = (v); \
2506 _HEXAGON_HVX_internal_union.P[0] = (new); \
2507 _HEXAGON_HVX_internal_union.W; \
2511 #define HEXAGON_HVX_CREATE_W(v1, v0) \
2516 } _HEXAGON_HVX_internal_union; \
2517 _HEXAGON_HVX_internal_union.V[0] = (v0); \
2518 _HEXAGON_HVX_internal_union.V[1] = (v1); \
2519 _HEXAGON_HVX_internal_union.W; \
2528 HVX_Vect() : data(Q6_W_vcombine_VV(Q6_V_vzero(), Q6_V_vzero())){};
2530 // Custom constructors.
2531 HVX_Vect(HVX_VectorPair W
) : data(W
){};
2532 HVX_Vect(HVX_Vector v1
, HVX_Vector v0
) : data(HEXAGON_HVX_CREATE_W(v1
, v0
)){};
2534 // Copy constructor.
2535 HVX_Vect(const HVX_Vect
&W
) = default;
2537 // Move constructor.
2538 HVX_Vect(HVX_Vect
&&W
) = default;
2540 // Assignment operator.
2541 HVX_Vect
&operator=(const HVX_Vect
&W
) = default;
2543 operator HVX_VectorPair() { return data
; };
2545 // Extract VectorPair method.
2546 HVX_VectorPair
W(void) { return HEXAGON_HVX_GET_W(data
); };
2548 // Extract Vector methods.
2549 HVX_Vector
V0(void) { return HEXAGON_HVX_GET_V0(data
); };
2550 HVX_Vector
V1(void) { return HEXAGON_HVX_GET_V1(data
); };
2551 HVX_VectorPred
P(void) { return HEXAGON_HVX_GET_P(data
); };
2553 // NOTE: All set methods return a HVX_Vect type.
2554 // Set HVX VectorPair method.
2555 HVX_Vect
W(HVX_VectorPair w
) { return HVX_Vect(HEXAGON_HVX_PUT_W(data
, w
)); };
2557 // Set HVX Vector methods.
2558 HVX_Vect
V0(HVX_Vector v
) { return HVX_Vect(HEXAGON_HVX_PUT_V0(data
, v
)); };
2559 HVX_Vect
V1(HVX_Vector v
) { return HVX_Vect(HEXAGON_HVX_PUT_V1(data
, v
)); };
2560 HVX_Vect
P(HVX_VectorPred p
) { return HVX_Vect(HEXAGON_HVX_PUT_P(data
, p
)); };
2563 HVX_VectorPair data
;
2566 #endif /* __cplusplus */
2567 #endif /* __HVX__ */
2569 #define HEXAGON_UDMA_DM0_STATUS_IDLE 0x00000000
2570 #define HEXAGON_UDMA_DM0_STATUS_RUN 0x00000001
2571 #define HEXAGON_UDMA_DM0_STATUS_ERROR 0x00000002
2572 #define HEXAGON_UDMA_DESC_DSTATE_INCOMPLETE 0
2573 #define HEXAGON_UDMA_DESC_DSTATE_COMPLETE 1
2574 #define HEXAGON_UDMA_DESC_ORDER_NOORDER 0
2575 #define HEXAGON_UDMA_DESC_ORDER_ORDER 1
2576 #define HEXAGON_UDMA_DESC_BYPASS_OFF 0
2577 #define HEXAGON_UDMA_DESC_BYPASS_ON 1
2578 #define HEXAGON_UDMA_DESC_COMP_NONE 0
2579 #define HEXAGON_UDMA_DESC_COMP_DLBC 1
2580 #define HEXAGON_UDMA_DESC_DESCTYPE_TYPE0 0
2581 #define HEXAGON_UDMA_DESC_DESCTYPE_TYPE1 1
2583 typedef struct hexagon_udma_descriptor_type0_s
2586 unsigned int length
:24;
2587 unsigned int desctype
:2;
2588 unsigned int dstcomp
:1;
2589 unsigned int srccomp
:1;
2590 unsigned int dstbypass
:1;
2591 unsigned int srcbypass
:1;
2592 unsigned int order
:1;
2593 unsigned int dstate
:1;
2596 } hexagon_udma_descriptor_type0_t
;
2598 typedef struct hexagon_udma_descriptor_type1_s
2601 unsigned int length
:24;
2602 unsigned int desctype
:2;
2603 unsigned int dstcomp
:1;
2604 unsigned int srccomp
:1;
2605 unsigned int dstbypass
:1;
2606 unsigned int srcbypass
:1;
2607 unsigned int order
:1;
2608 unsigned int dstate
:1;
2611 unsigned int allocation
:28;
2612 unsigned int padding
:4;
2613 unsigned int roiwidth
:16;
2614 unsigned int roiheight
:16;
2615 unsigned int srcstride
:16;
2616 unsigned int dststride
:16;
2617 unsigned int srcwidthoffset
:16;
2618 unsigned int dstwidthoffset
:16;
2619 } hexagon_udma_descriptor_type1_t
;
2621 #endif /* !HEXAGON_TYPES_H */