| blob | e17075d067c26bdf5dc5b034710242cdc7d001e3 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=armv7 -mattr=+neon %s -o - | FileCheck %s --check-prefix=ARMV7
3 ; RUN: llc -mtriple=armv8.2-a -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=ARMV8
4 ; RUN: llc -mtriple=armv8.1m-none-none-eabi -mattr=+mve.fp,+fp64 %s -o - | FileCheck %s --check-prefix=ARMV8M
6 declare float @llvm.minnum.f32(float, float)
7 declare float @llvm.maxnum.f32(float, float)
8 declare double @llvm.minnum.f64(double, double)
9 declare double @llvm.maxnum.f64(double, double)
10 declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
11 declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
12 declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
13 declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)
15 define float @fminnum32_intrinsic(float %x, float %y) {
16 ; ARMV7-LABEL: fminnum32_intrinsic:
17 ; ARMV7: @ %bb.0:
18 ; ARMV7-NEXT: vmov s0, r0
19 ; ARMV7-NEXT: vmov s2, r1
20 ; ARMV7-NEXT: vcmp.f32 s0, s2
21 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
22 ; ARMV7-NEXT: vmovlt.f32 s2, s0
23 ; ARMV7-NEXT: vmov r0, s2
24 ; ARMV7-NEXT: bx lr
25 ;
26 ; ARMV8-LABEL: fminnum32_intrinsic:
27 ; ARMV8: @ %bb.0:
28 ; ARMV8-NEXT: vmov s0, r1
29 ; ARMV8-NEXT: vmov s2, r0
30 ; ARMV8-NEXT: vminnm.f32 s0, s2, s0
31 ; ARMV8-NEXT: vmov r0, s0
32 ; ARMV8-NEXT: mov pc, lr
33 ;
34 ; ARMV8M-LABEL: fminnum32_intrinsic:
35 ; ARMV8M: @ %bb.0:
36 ; ARMV8M-NEXT: vmov s0, r1
37 ; ARMV8M-NEXT: vmov s2, r0
38 ; ARMV8M-NEXT: vminnm.f32 s0, s2, s0
39 ; ARMV8M-NEXT: vmov r0, s0
40 ; ARMV8M-NEXT: bx lr
41 %a = call nnan float @llvm.minnum.f32(float %x, float %y)
42 ret float %a
43 }
45 define float @fminnum32_nsz_intrinsic(float %x, float %y) {
46 ; ARMV7-LABEL: fminnum32_nsz_intrinsic:
47 ; ARMV7: @ %bb.0:
48 ; ARMV7-NEXT: vmov s0, r0
49 ; ARMV7-NEXT: vmov s2, r1
50 ; ARMV7-NEXT: vcmp.f32 s0, s2
51 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
52 ; ARMV7-NEXT: vmovlt.f32 s2, s0
53 ; ARMV7-NEXT: vmov r0, s2
54 ; ARMV7-NEXT: bx lr
55 ;
56 ; ARMV8-LABEL: fminnum32_nsz_intrinsic:
57 ; ARMV8: @ %bb.0:
58 ; ARMV8-NEXT: vmov s0, r1
59 ; ARMV8-NEXT: vmov s2, r0
60 ; ARMV8-NEXT: vminnm.f32 s0, s2, s0
61 ; ARMV8-NEXT: vmov r0, s0
62 ; ARMV8-NEXT: mov pc, lr
63 ;
64 ; ARMV8M-LABEL: fminnum32_nsz_intrinsic:
65 ; ARMV8M: @ %bb.0:
66 ; ARMV8M-NEXT: vmov s0, r1
67 ; ARMV8M-NEXT: vmov s2, r0
68 ; ARMV8M-NEXT: vminnm.f32 s0, s2, s0
69 ; ARMV8M-NEXT: vmov r0, s0
70 ; ARMV8M-NEXT: bx lr
71 %a = call nnan nsz float @llvm.minnum.f32(float %x, float %y)
72 ret float %a
73 }
75 define float @fminnum32_non_zero_intrinsic(float %x) {
76 ; ARMV7-LABEL: fminnum32_non_zero_intrinsic:
77 ; ARMV7: @ %bb.0:
78 ; ARMV7-NEXT: vmov.f32 s0, #-1.000000e+00
79 ; ARMV7-NEXT: vmov s2, r0
80 ; ARMV7-NEXT: vcmp.f32 s2, s0
81 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
82 ; ARMV7-NEXT: vmovlt.f32 s0, s2
83 ; ARMV7-NEXT: vmov r0, s0
84 ; ARMV7-NEXT: bx lr
85 ;
86 ; ARMV8-LABEL: fminnum32_non_zero_intrinsic:
87 ; ARMV8: @ %bb.0:
88 ; ARMV8-NEXT: vmov.f32 s0, #-1.000000e+00
89 ; ARMV8-NEXT: vmov s2, r0
90 ; ARMV8-NEXT: vminnm.f32 s0, s2, s0
91 ; ARMV8-NEXT: vmov r0, s0
92 ; ARMV8-NEXT: mov pc, lr
93 ;
94 ; ARMV8M-LABEL: fminnum32_non_zero_intrinsic:
95 ; ARMV8M: @ %bb.0:
96 ; ARMV8M-NEXT: vmov.f32 s0, #-1.000000e+00
97 ; ARMV8M-NEXT: vmov s2, r0
98 ; ARMV8M-NEXT: vminnm.f32 s0, s2, s0
99 ; ARMV8M-NEXT: vmov r0, s0
100 ; ARMV8M-NEXT: bx lr
101 %a = call nnan float @llvm.minnum.f32(float %x, float -1.0)
102 ret float %a
103 }
105 define float @fmaxnum32_intrinsic(float %x, float %y) {
106 ; ARMV7-LABEL: fmaxnum32_intrinsic:
107 ; ARMV7: @ %bb.0:
108 ; ARMV7-NEXT: vmov s0, r0
109 ; ARMV7-NEXT: vmov s2, r1
110 ; ARMV7-NEXT: vcmp.f32 s0, s2
111 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
112 ; ARMV7-NEXT: vmovgt.f32 s2, s0
113 ; ARMV7-NEXT: vmov r0, s2
114 ; ARMV7-NEXT: bx lr
115 ;
116 ; ARMV8-LABEL: fmaxnum32_intrinsic:
117 ; ARMV8: @ %bb.0:
118 ; ARMV8-NEXT: vmov s0, r1
119 ; ARMV8-NEXT: vmov s2, r0
120 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
121 ; ARMV8-NEXT: vmov r0, s0
122 ; ARMV8-NEXT: mov pc, lr
123 ;
124 ; ARMV8M-LABEL: fmaxnum32_intrinsic:
125 ; ARMV8M: @ %bb.0:
126 ; ARMV8M-NEXT: vmov s0, r1
127 ; ARMV8M-NEXT: vmov s2, r0
128 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
129 ; ARMV8M-NEXT: vmov r0, s0
130 ; ARMV8M-NEXT: bx lr
131 %a = call nnan float @llvm.maxnum.f32(float %x, float %y)
132 ret float %a
133 }
135 define float @fmaxnum32_nsz_intrinsic(float %x, float %y) {
136 ; ARMV7-LABEL: fmaxnum32_nsz_intrinsic:
137 ; ARMV7: @ %bb.0:
138 ; ARMV7-NEXT: vmov s0, r0
139 ; ARMV7-NEXT: vmov s2, r1
140 ; ARMV7-NEXT: vcmp.f32 s0, s2
141 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
142 ; ARMV7-NEXT: vmovgt.f32 s2, s0
143 ; ARMV7-NEXT: vmov r0, s2
144 ; ARMV7-NEXT: bx lr
145 ;
146 ; ARMV8-LABEL: fmaxnum32_nsz_intrinsic:
147 ; ARMV8: @ %bb.0:
148 ; ARMV8-NEXT: vmov s0, r1
149 ; ARMV8-NEXT: vmov s2, r0
150 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
151 ; ARMV8-NEXT: vmov r0, s0
152 ; ARMV8-NEXT: mov pc, lr
153 ;
154 ; ARMV8M-LABEL: fmaxnum32_nsz_intrinsic:
155 ; ARMV8M: @ %bb.0:
156 ; ARMV8M-NEXT: vmov s0, r1
157 ; ARMV8M-NEXT: vmov s2, r0
158 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
159 ; ARMV8M-NEXT: vmov r0, s0
160 ; ARMV8M-NEXT: bx lr
161 %a = call nnan nsz float @llvm.maxnum.f32(float %x, float %y)
162 ret float %a
163 }
165 define float @fmaxnum32_zero_intrinsic(float %x) {
166 ; ARMV7-LABEL: fmaxnum32_zero_intrinsic:
167 ; ARMV7: @ %bb.0:
168 ; ARMV7-NEXT: vmov s2, r0
169 ; ARMV7-NEXT: vldr s0, .LCPI5_0
170 ; ARMV7-NEXT: vcmp.f32 s2, #0
171 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
172 ; ARMV7-NEXT: vmovgt.f32 s0, s2
173 ; ARMV7-NEXT: vmov r0, s0
174 ; ARMV7-NEXT: bx lr
175 ; ARMV7-NEXT: .p2align 2
176 ; ARMV7-NEXT: @ %bb.1:
177 ; ARMV7-NEXT: .LCPI5_0:
178 ; ARMV7-NEXT: .long 0x00000000 @ float 0
179 ;
180 ; ARMV8-LABEL: fmaxnum32_zero_intrinsic:
181 ; ARMV8: @ %bb.0:
182 ; ARMV8-NEXT: vldr s0, .LCPI5_0
183 ; ARMV8-NEXT: vmov s2, r0
184 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
185 ; ARMV8-NEXT: vmov r0, s0
186 ; ARMV8-NEXT: mov pc, lr
187 ; ARMV8-NEXT: .p2align 2
188 ; ARMV8-NEXT: @ %bb.1:
189 ; ARMV8-NEXT: .LCPI5_0:
190 ; ARMV8-NEXT: .long 0x00000000 @ float 0
191 ;
192 ; ARMV8M-LABEL: fmaxnum32_zero_intrinsic:
193 ; ARMV8M: @ %bb.0:
194 ; ARMV8M-NEXT: vldr s0, .LCPI5_0
195 ; ARMV8M-NEXT: vmov s2, r0
196 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
197 ; ARMV8M-NEXT: vmov r0, s0
198 ; ARMV8M-NEXT: bx lr
199 ; ARMV8M-NEXT: .p2align 2
200 ; ARMV8M-NEXT: @ %bb.1:
201 ; ARMV8M-NEXT: .LCPI5_0:
202 ; ARMV8M-NEXT: .long 0x00000000 @ float 0
203 %a = call nnan float @llvm.maxnum.f32(float %x, float 0.0)
204 ret float %a
205 }
207 define float @fmaxnum32_non_zero_intrinsic(float %x) {
208 ; ARMV7-LABEL: fmaxnum32_non_zero_intrinsic:
209 ; ARMV7: @ %bb.0:
210 ; ARMV7-NEXT: vmov.f32 s0, #1.000000e+00
211 ; ARMV7-NEXT: vmov s2, r0
212 ; ARMV7-NEXT: vcmp.f32 s2, s0
213 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
214 ; ARMV7-NEXT: vmovgt.f32 s0, s2
215 ; ARMV7-NEXT: vmov r0, s0
216 ; ARMV7-NEXT: bx lr
217 ;
218 ; ARMV8-LABEL: fmaxnum32_non_zero_intrinsic:
219 ; ARMV8: @ %bb.0:
220 ; ARMV8-NEXT: vmov.f32 s0, #1.000000e+00
221 ; ARMV8-NEXT: vmov s2, r0
222 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
223 ; ARMV8-NEXT: vmov r0, s0
224 ; ARMV8-NEXT: mov pc, lr
225 ;
226 ; ARMV8M-LABEL: fmaxnum32_non_zero_intrinsic:
227 ; ARMV8M: @ %bb.0:
228 ; ARMV8M-NEXT: vmov.f32 s0, #1.000000e+00
229 ; ARMV8M-NEXT: vmov s2, r0
230 ; ARMV8M-NEXT: vmaxnm.f32 s0, s2, s0
231 ; ARMV8M-NEXT: vmov r0, s0
232 ; ARMV8M-NEXT: bx lr
233 %a = call nnan float @llvm.maxnum.f32(float %x, float 1.0)
234 ret float %a
235 }
237 define double @fminnum64_intrinsic(double %x, double %y) {
238 ; ARMV7-LABEL: fminnum64_intrinsic:
239 ; ARMV7: @ %bb.0:
240 ; ARMV7-NEXT: vmov d16, r2, r3
241 ; ARMV7-NEXT: vmov d17, r0, r1
242 ; ARMV7-NEXT: vcmp.f64 d17, d16
243 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
244 ; ARMV7-NEXT: vmovlt.f64 d16, d17
245 ; ARMV7-NEXT: vmov r0, r1, d16
246 ; ARMV7-NEXT: bx lr
247 ;
248 ; ARMV8-LABEL: fminnum64_intrinsic:
249 ; ARMV8: @ %bb.0:
250 ; ARMV8-NEXT: vmov d16, r2, r3
251 ; ARMV8-NEXT: vmov d17, r0, r1
252 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
253 ; ARMV8-NEXT: vmov r0, r1, d16
254 ; ARMV8-NEXT: mov pc, lr
255 ;
256 ; ARMV8M-LABEL: fminnum64_intrinsic:
257 ; ARMV8M: @ %bb.0:
258 ; ARMV8M-NEXT: vmov d0, r2, r3
259 ; ARMV8M-NEXT: vmov d1, r0, r1
260 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
261 ; ARMV8M-NEXT: vmov r0, r1, d0
262 ; ARMV8M-NEXT: bx lr
263 %a = call nnan double @llvm.minnum.f64(double %x, double %y)
264 ret double %a
265 }
267 define double @fminnum64_nsz_intrinsic(double %x, double %y) {
268 ; ARMV7-LABEL: fminnum64_nsz_intrinsic:
269 ; ARMV7: @ %bb.0:
270 ; ARMV7-NEXT: vmov d16, r2, r3
271 ; ARMV7-NEXT: vmov d17, r0, r1
272 ; ARMV7-NEXT: vcmp.f64 d17, d16
273 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
274 ; ARMV7-NEXT: vmovlt.f64 d16, d17
275 ; ARMV7-NEXT: vmov r0, r1, d16
276 ; ARMV7-NEXT: bx lr
277 ;
278 ; ARMV8-LABEL: fminnum64_nsz_intrinsic:
279 ; ARMV8: @ %bb.0:
280 ; ARMV8-NEXT: vmov d16, r2, r3
281 ; ARMV8-NEXT: vmov d17, r0, r1
282 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
283 ; ARMV8-NEXT: vmov r0, r1, d16
284 ; ARMV8-NEXT: mov pc, lr
285 ;
286 ; ARMV8M-LABEL: fminnum64_nsz_intrinsic:
287 ; ARMV8M: @ %bb.0:
288 ; ARMV8M-NEXT: vmov d0, r2, r3
289 ; ARMV8M-NEXT: vmov d1, r0, r1
290 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
291 ; ARMV8M-NEXT: vmov r0, r1, d0
292 ; ARMV8M-NEXT: bx lr
293 %a = call nnan nsz double @llvm.minnum.f64(double %x, double %y)
294 ret double %a
295 }
297 define double @fminnum64_zero_intrinsic(double %x) {
298 ; ARMV7-LABEL: fminnum64_zero_intrinsic:
299 ; ARMV7: @ %bb.0:
300 ; ARMV7-NEXT: vldr d16, .LCPI9_0
301 ; ARMV7-NEXT: vmov d17, r0, r1
302 ; ARMV7-NEXT: vcmp.f64 d17, d16
303 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
304 ; ARMV7-NEXT: vmovlt.f64 d16, d17
305 ; ARMV7-NEXT: vmov r0, r1, d16
306 ; ARMV7-NEXT: bx lr
307 ; ARMV7-NEXT: .p2align 3
308 ; ARMV7-NEXT: @ %bb.1:
309 ; ARMV7-NEXT: .LCPI9_0:
310 ; ARMV7-NEXT: .long 0 @ double -0
311 ; ARMV7-NEXT: .long 2147483648
312 ;
313 ; ARMV8-LABEL: fminnum64_zero_intrinsic:
314 ; ARMV8: @ %bb.0:
315 ; ARMV8-NEXT: vldr d16, .LCPI9_0
316 ; ARMV8-NEXT: vmov d17, r0, r1
317 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
318 ; ARMV8-NEXT: vmov r0, r1, d16
319 ; ARMV8-NEXT: mov pc, lr
320 ; ARMV8-NEXT: .p2align 3
321 ; ARMV8-NEXT: @ %bb.1:
322 ; ARMV8-NEXT: .LCPI9_0:
323 ; ARMV8-NEXT: .long 0 @ double -0
324 ; ARMV8-NEXT: .long 2147483648
325 ;
326 ; ARMV8M-LABEL: fminnum64_zero_intrinsic:
327 ; ARMV8M: @ %bb.0:
328 ; ARMV8M-NEXT: vldr d0, .LCPI9_0
329 ; ARMV8M-NEXT: vmov d1, r0, r1
330 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
331 ; ARMV8M-NEXT: vmov r0, r1, d0
332 ; ARMV8M-NEXT: bx lr
333 ; ARMV8M-NEXT: .p2align 3
334 ; ARMV8M-NEXT: @ %bb.1:
335 ; ARMV8M-NEXT: .LCPI9_0:
336 ; ARMV8M-NEXT: .long 0 @ double -0
337 ; ARMV8M-NEXT: .long 2147483648
338 %a = call nnan double @llvm.minnum.f64(double %x, double -0.0)
339 ret double %a
340 }
342 define double @fminnum64_non_zero_intrinsic(double %x) {
343 ; ARMV7-LABEL: fminnum64_non_zero_intrinsic:
344 ; ARMV7: @ %bb.0:
345 ; ARMV7-NEXT: vmov.f64 d16, #-1.000000e+00
346 ; ARMV7-NEXT: vmov d17, r0, r1
347 ; ARMV7-NEXT: vcmp.f64 d17, d16
348 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
349 ; ARMV7-NEXT: vmovlt.f64 d16, d17
350 ; ARMV7-NEXT: vmov r0, r1, d16
351 ; ARMV7-NEXT: bx lr
352 ;
353 ; ARMV8-LABEL: fminnum64_non_zero_intrinsic:
354 ; ARMV8: @ %bb.0:
355 ; ARMV8-NEXT: vmov.f64 d16, #-1.000000e+00
356 ; ARMV8-NEXT: vmov d17, r0, r1
357 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
358 ; ARMV8-NEXT: vmov r0, r1, d16
359 ; ARMV8-NEXT: mov pc, lr
360 ;
361 ; ARMV8M-LABEL: fminnum64_non_zero_intrinsic:
362 ; ARMV8M: @ %bb.0:
363 ; ARMV8M-NEXT: vmov.f64 d0, #-1.000000e+00
364 ; ARMV8M-NEXT: vmov d1, r0, r1
365 ; ARMV8M-NEXT: vminnm.f64 d0, d1, d0
366 ; ARMV8M-NEXT: vmov r0, r1, d0
367 ; ARMV8M-NEXT: bx lr
368 %a = call nnan double @llvm.minnum.f64(double %x, double -1.0)
369 ret double %a
370 }
372 define double@fmaxnum64_intrinsic(double %x, double %y) {
373 ; ARMV7-LABEL: fmaxnum64_intrinsic:
374 ; ARMV7: @ %bb.0:
375 ; ARMV7-NEXT: vmov d16, r2, r3
376 ; ARMV7-NEXT: vmov d17, r0, r1
377 ; ARMV7-NEXT: vcmp.f64 d17, d16
378 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
379 ; ARMV7-NEXT: vmovgt.f64 d16, d17
380 ; ARMV7-NEXT: vmov r0, r1, d16
381 ; ARMV7-NEXT: bx lr
382 ;
383 ; ARMV8-LABEL: fmaxnum64_intrinsic:
384 ; ARMV8: @ %bb.0:
385 ; ARMV8-NEXT: vmov d16, r2, r3
386 ; ARMV8-NEXT: vmov d17, r0, r1
387 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
388 ; ARMV8-NEXT: vmov r0, r1, d16
389 ; ARMV8-NEXT: mov pc, lr
390 ;
391 ; ARMV8M-LABEL: fmaxnum64_intrinsic:
392 ; ARMV8M: @ %bb.0:
393 ; ARMV8M-NEXT: vmov d0, r2, r3
394 ; ARMV8M-NEXT: vmov d1, r0, r1
395 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
396 ; ARMV8M-NEXT: vmov r0, r1, d0
397 ; ARMV8M-NEXT: bx lr
398 %a = call nnan double @llvm.maxnum.f64(double %x, double %y)
399 ret double %a
400 }
402 define double@fmaxnum64_nsz_intrinsic(double %x, double %y) {
403 ; ARMV7-LABEL: fmaxnum64_nsz_intrinsic:
404 ; ARMV7: @ %bb.0:
405 ; ARMV7-NEXT: vmov d16, r2, r3
406 ; ARMV7-NEXT: vmov d17, r0, r1
407 ; ARMV7-NEXT: vcmp.f64 d17, d16
408 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
409 ; ARMV7-NEXT: vmovgt.f64 d16, d17
410 ; ARMV7-NEXT: vmov r0, r1, d16
411 ; ARMV7-NEXT: bx lr
412 ;
413 ; ARMV8-LABEL: fmaxnum64_nsz_intrinsic:
414 ; ARMV8: @ %bb.0:
415 ; ARMV8-NEXT: vmov d16, r2, r3
416 ; ARMV8-NEXT: vmov d17, r0, r1
417 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
418 ; ARMV8-NEXT: vmov r0, r1, d16
419 ; ARMV8-NEXT: mov pc, lr
420 ;
421 ; ARMV8M-LABEL: fmaxnum64_nsz_intrinsic:
422 ; ARMV8M: @ %bb.0:
423 ; ARMV8M-NEXT: vmov d0, r2, r3
424 ; ARMV8M-NEXT: vmov d1, r0, r1
425 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
426 ; ARMV8M-NEXT: vmov r0, r1, d0
427 ; ARMV8M-NEXT: bx lr
428 %a = call nnan nsz double @llvm.maxnum.f64(double %x, double %y)
429 ret double %a
430 }
432 define double @fmaxnum64_zero_intrinsic(double %x) {
433 ; ARMV7-LABEL: fmaxnum64_zero_intrinsic:
434 ; ARMV7: @ %bb.0:
435 ; ARMV7-NEXT: vmov d17, r0, r1
436 ; ARMV7-NEXT: vcmp.f64 d17, #0
437 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
438 ; ARMV7-NEXT: vmov.i32 d16, #0x0
439 ; ARMV7-NEXT: vmovgt.f64 d16, d17
440 ; ARMV7-NEXT: vmov r0, r1, d16
441 ; ARMV7-NEXT: bx lr
442 ;
443 ; ARMV8-LABEL: fmaxnum64_zero_intrinsic:
444 ; ARMV8: @ %bb.0:
445 ; ARMV8-NEXT: vldr d16, .LCPI13_0
446 ; ARMV8-NEXT: vmov d17, r0, r1
447 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
448 ; ARMV8-NEXT: vmov r0, r1, d16
449 ; ARMV8-NEXT: mov pc, lr
450 ; ARMV8-NEXT: .p2align 3
451 ; ARMV8-NEXT: @ %bb.1:
452 ; ARMV8-NEXT: .LCPI13_0:
453 ; ARMV8-NEXT: .long 0 @ double 0
454 ; ARMV8-NEXT: .long 0
455 ;
456 ; ARMV8M-LABEL: fmaxnum64_zero_intrinsic:
457 ; ARMV8M: @ %bb.0:
458 ; ARMV8M-NEXT: vldr d0, .LCPI13_0
459 ; ARMV8M-NEXT: vmov d1, r0, r1
460 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
461 ; ARMV8M-NEXT: vmov r0, r1, d0
462 ; ARMV8M-NEXT: bx lr
463 ; ARMV8M-NEXT: .p2align 3
464 ; ARMV8M-NEXT: @ %bb.1:
465 ; ARMV8M-NEXT: .LCPI13_0:
466 ; ARMV8M-NEXT: .long 0 @ double 0
467 ; ARMV8M-NEXT: .long 0
468 %a = call nnan double @llvm.maxnum.f64(double %x, double 0.0)
469 ret double %a
470 }
472 define double @fmaxnum64_non_zero_intrinsic(double %x) {
473 ; ARMV7-LABEL: fmaxnum64_non_zero_intrinsic:
474 ; ARMV7: @ %bb.0:
475 ; ARMV7-NEXT: vmov.f64 d16, #1.000000e+00
476 ; ARMV7-NEXT: vmov d17, r0, r1
477 ; ARMV7-NEXT: vcmp.f64 d17, d16
478 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
479 ; ARMV7-NEXT: vmovgt.f64 d16, d17
480 ; ARMV7-NEXT: vmov r0, r1, d16
481 ; ARMV7-NEXT: bx lr
482 ;
483 ; ARMV8-LABEL: fmaxnum64_non_zero_intrinsic:
484 ; ARMV8: @ %bb.0:
485 ; ARMV8-NEXT: vmov.f64 d16, #1.000000e+00
486 ; ARMV8-NEXT: vmov d17, r0, r1
487 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
488 ; ARMV8-NEXT: vmov r0, r1, d16
489 ; ARMV8-NEXT: mov pc, lr
490 ;
491 ; ARMV8M-LABEL: fmaxnum64_non_zero_intrinsic:
492 ; ARMV8M: @ %bb.0:
493 ; ARMV8M-NEXT: vmov.f64 d0, #1.000000e+00
494 ; ARMV8M-NEXT: vmov d1, r0, r1
495 ; ARMV8M-NEXT: vmaxnm.f64 d0, d1, d0
496 ; ARMV8M-NEXT: vmov r0, r1, d0
497 ; ARMV8M-NEXT: bx lr
498 %a = call nnan double @llvm.maxnum.f64(double %x, double 1.0)
499 ret double %a
500 }
502 define <4 x float> @fminnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
503 ; ARMV7-LABEL: fminnumv432_intrinsic:
504 ; ARMV7: @ %bb.0:
505 ; ARMV7-NEXT: mov r12, sp
506 ; ARMV7-NEXT: vld1.64 {d0, d1}, [r12]
507 ; ARMV7-NEXT: vmov d3, r2, r3
508 ; ARMV7-NEXT: vmov d2, r0, r1
509 ; ARMV7-NEXT: vcmp.f32 s7, s3
510 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
511 ; ARMV7-NEXT: vcmp.f32 s6, s2
512 ; ARMV7-NEXT: vmovlt.f32 s3, s7
513 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
514 ; ARMV7-NEXT: vcmp.f32 s5, s1
515 ; ARMV7-NEXT: vmovlt.f32 s2, s6
516 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
517 ; ARMV7-NEXT: vcmp.f32 s4, s0
518 ; ARMV7-NEXT: vmovlt.f32 s1, s5
519 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
520 ; ARMV7-NEXT: vmovlt.f32 s0, s4
521 ; ARMV7-NEXT: vmov r2, r3, d1
522 ; ARMV7-NEXT: vmov r0, r1, d0
523 ; ARMV7-NEXT: bx lr
524 ;
525 ; ARMV8-LABEL: fminnumv432_intrinsic:
526 ; ARMV8: @ %bb.0:
527 ; ARMV8-NEXT: vldr s0, [sp, #4]
528 ; ARMV8-NEXT: vmov s12, r1
529 ; ARMV8-NEXT: vldr s2, [sp, #8]
530 ; ARMV8-NEXT: vmov s10, r2
531 ; ARMV8-NEXT: vminnm.f32 s0, s12, s0
532 ; ARMV8-NEXT: vldr s4, [sp, #12]
533 ; ARMV8-NEXT: vldr s6, [sp]
534 ; ARMV8-NEXT: vmov s14, r0
535 ; ARMV8-NEXT: vmov r1, s0
536 ; ARMV8-NEXT: vminnm.f32 s0, s10, s2
537 ; ARMV8-NEXT: vmov s8, r3
538 ; ARMV8-NEXT: vminnm.f32 s6, s14, s6
539 ; ARMV8-NEXT: vmov r2, s0
540 ; ARMV8-NEXT: vminnm.f32 s0, s8, s4
541 ; ARMV8-NEXT: vmov r0, s6
542 ; ARMV8-NEXT: vmov r3, s0
543 ; ARMV8-NEXT: mov pc, lr
544 ;
545 ; ARMV8M-LABEL: fminnumv432_intrinsic:
546 ; ARMV8M: @ %bb.0:
547 ; ARMV8M-NEXT: vmov d0, r0, r1
548 ; ARMV8M-NEXT: mov r0, sp
549 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
550 ; ARMV8M-NEXT: vmov d1, r2, r3
551 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
552 ; ARMV8M-NEXT: vmov r0, r1, d0
553 ; ARMV8M-NEXT: vmov r2, r3, d1
554 ; ARMV8M-NEXT: bx lr
555 %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
556 ret <4 x float> %a
557 }
559 define <4 x float> @fminnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
560 ; ARMV7-LABEL: fminnumv432_nsz_intrinsic:
561 ; ARMV7: @ %bb.0:
562 ; ARMV7-NEXT: vmov d17, r2, r3
563 ; ARMV7-NEXT: vmov d16, r0, r1
564 ; ARMV7-NEXT: mov r0, sp
565 ; ARMV7-NEXT: vld1.64 {d18, d19}, [r0]
566 ; ARMV7-NEXT: vmin.f32 q8, q8, q9
567 ; ARMV7-NEXT: vmov r0, r1, d16
568 ; ARMV7-NEXT: vmov r2, r3, d17
569 ; ARMV7-NEXT: bx lr
570 ;
571 ; ARMV8-LABEL: fminnumv432_nsz_intrinsic:
572 ; ARMV8: @ %bb.0:
573 ; ARMV8-NEXT: vldr s0, [sp, #4]
574 ; ARMV8-NEXT: vmov s12, r1
575 ; ARMV8-NEXT: vldr s2, [sp, #8]
576 ; ARMV8-NEXT: vmov s10, r2
577 ; ARMV8-NEXT: vminnm.f32 s0, s12, s0
578 ; ARMV8-NEXT: vldr s4, [sp, #12]
579 ; ARMV8-NEXT: vldr s6, [sp]
580 ; ARMV8-NEXT: vmov s14, r0
581 ; ARMV8-NEXT: vmov r1, s0
582 ; ARMV8-NEXT: vminnm.f32 s0, s10, s2
583 ; ARMV8-NEXT: vmov s8, r3
584 ; ARMV8-NEXT: vminnm.f32 s6, s14, s6
585 ; ARMV8-NEXT: vmov r2, s0
586 ; ARMV8-NEXT: vminnm.f32 s0, s8, s4
587 ; ARMV8-NEXT: vmov r0, s6
588 ; ARMV8-NEXT: vmov r3, s0
589 ; ARMV8-NEXT: mov pc, lr
590 ;
591 ; ARMV8M-LABEL: fminnumv432_nsz_intrinsic:
592 ; ARMV8M: @ %bb.0:
593 ; ARMV8M-NEXT: vmov d0, r0, r1
594 ; ARMV8M-NEXT: mov r0, sp
595 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
596 ; ARMV8M-NEXT: vmov d1, r2, r3
597 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
598 ; ARMV8M-NEXT: vmov r0, r1, d0
599 ; ARMV8M-NEXT: vmov r2, r3, d1
600 ; ARMV8M-NEXT: bx lr
601 %a = call nnan nsz <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y)
602 ret <4 x float> %a
603 }
605 define <4 x float> @fminnumv432_non_zero_intrinsic(<4 x float> %x) {
606 ; ARMV7-LABEL: fminnumv432_non_zero_intrinsic:
607 ; ARMV7: @ %bb.0:
608 ; ARMV7-NEXT: vmov d19, r2, r3
609 ; ARMV7-NEXT: vmov.f32 q8, #-1.000000e+00
610 ; ARMV7-NEXT: vmov d18, r0, r1
611 ; ARMV7-NEXT: vmin.f32 q8, q9, q8
612 ; ARMV7-NEXT: vmov r0, r1, d16
613 ; ARMV7-NEXT: vmov r2, r3, d17
614 ; ARMV7-NEXT: bx lr
615 ;
616 ; ARMV8-LABEL: fminnumv432_non_zero_intrinsic:
617 ; ARMV8: @ %bb.0:
618 ; ARMV8-NEXT: vmov.f32 s0, #-1.000000e+00
619 ; ARMV8-NEXT: vmov s4, r2
620 ; ARMV8-NEXT: vmov s6, r1
621 ; ARMV8-NEXT: vminnm.f32 s4, s4, s0
622 ; ARMV8-NEXT: vmov s8, r0
623 ; ARMV8-NEXT: vminnm.f32 s6, s6, s0
624 ; ARMV8-NEXT: vmov s2, r3
625 ; ARMV8-NEXT: vminnm.f32 s8, s8, s0
626 ; ARMV8-NEXT: vminnm.f32 s0, s2, s0
627 ; ARMV8-NEXT: vmov r0, s8
628 ; ARMV8-NEXT: vmov r1, s6
629 ; ARMV8-NEXT: vmov r2, s4
630 ; ARMV8-NEXT: vmov r3, s0
631 ; ARMV8-NEXT: mov pc, lr
632 ;
633 ; ARMV8M-LABEL: fminnumv432_non_zero_intrinsic:
634 ; ARMV8M: @ %bb.0:
635 ; ARMV8M-NEXT: vmov d1, r2, r3
636 ; ARMV8M-NEXT: vmov.f32 q1, #-1.000000e+00
637 ; ARMV8M-NEXT: vmov d0, r0, r1
638 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
639 ; ARMV8M-NEXT: vmov r0, r1, d0
640 ; ARMV8M-NEXT: vmov r2, r3, d1
641 ; ARMV8M-NEXT: bx lr
642 %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float -1.0, float -1.0, float -1.0>)
643 ret <4 x float> %a
644 }
646 define <4 x float> @fminnumv432_one_zero_intrinsic(<4 x float> %x) {
647 ; ARMV7-LABEL: fminnumv432_one_zero_intrinsic:
648 ; ARMV7: @ %bb.0:
649 ; ARMV7-NEXT: vmov d3, r2, r3
650 ; ARMV7-NEXT: vmov d2, r0, r1
651 ; ARMV7-NEXT: vmov.f32 s0, #-1.000000e+00
652 ; ARMV7-NEXT: vcmp.f32 s5, #0
653 ; ARMV7-NEXT: vldr s1, .LCPI18_0
654 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
655 ; ARMV7-NEXT: vcmp.f32 s7, s0
656 ; ARMV7-NEXT: vmovlt.f32 s1, s5
657 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
658 ; ARMV7-NEXT: vmov.f32 s3, s0
659 ; ARMV7-NEXT: vcmp.f32 s6, s0
660 ; ARMV7-NEXT: vmovlt.f32 s3, s7
661 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
662 ; ARMV7-NEXT: vmov.f32 s2, s0
663 ; ARMV7-NEXT: vcmp.f32 s4, s0
664 ; ARMV7-NEXT: vmovlt.f32 s2, s6
665 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
666 ; ARMV7-NEXT: vmovlt.f32 s0, s4
667 ; ARMV7-NEXT: vmov r2, r3, d1
668 ; ARMV7-NEXT: vmov r0, r1, d0
669 ; ARMV7-NEXT: bx lr
670 ; ARMV7-NEXT: .p2align 2
671 ; ARMV7-NEXT: @ %bb.1:
672 ; ARMV7-NEXT: .LCPI18_0:
673 ; ARMV7-NEXT: .long 0x00000000 @ float 0
674 ;
675 ; ARMV8-LABEL: fminnumv432_one_zero_intrinsic:
676 ; ARMV8: @ %bb.0:
677 ; ARMV8-NEXT: vldr s0, .LCPI18_0
678 ; ARMV8-NEXT: vmov s8, r1
679 ; ARMV8-NEXT: vmov.f32 s2, #-1.000000e+00
680 ; ARMV8-NEXT: vminnm.f32 s0, s8, s0
681 ; ARMV8-NEXT: vmov s6, r2
682 ; ARMV8-NEXT: vmov s10, r0
683 ; ARMV8-NEXT: vmov r1, s0
684 ; ARMV8-NEXT: vminnm.f32 s0, s6, s2
685 ; ARMV8-NEXT: vmov s4, r3
686 ; ARMV8-NEXT: vminnm.f32 s10, s10, s2
687 ; ARMV8-NEXT: vmov r2, s0
688 ; ARMV8-NEXT: vminnm.f32 s0, s4, s2
689 ; ARMV8-NEXT: vmov r0, s10
690 ; ARMV8-NEXT: vmov r3, s0
691 ; ARMV8-NEXT: mov pc, lr
692 ; ARMV8-NEXT: .p2align 2
693 ; ARMV8-NEXT: @ %bb.1:
694 ; ARMV8-NEXT: .LCPI18_0:
695 ; ARMV8-NEXT: .long 0x00000000 @ float 0
696 ;
697 ; ARMV8M-LABEL: fminnumv432_one_zero_intrinsic:
698 ; ARMV8M: @ %bb.0:
699 ; ARMV8M-NEXT: vmov d0, r0, r1
700 ; ARMV8M-NEXT: adr r0, .LCPI18_0
701 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
702 ; ARMV8M-NEXT: vmov d1, r2, r3
703 ; ARMV8M-NEXT: vminnm.f32 q0, q0, q1
704 ; ARMV8M-NEXT: vmov r0, r1, d0
705 ; ARMV8M-NEXT: vmov r2, r3, d1
706 ; ARMV8M-NEXT: bx lr
707 ; ARMV8M-NEXT: .p2align 4
708 ; ARMV8M-NEXT: @ %bb.1:
709 ; ARMV8M-NEXT: .LCPI18_0:
710 ; ARMV8M-NEXT: .long 0xbf800000 @ float -1
711 ; ARMV8M-NEXT: .long 0x00000000 @ float 0
712 ; ARMV8M-NEXT: .long 0xbf800000 @ float -1
713 ; ARMV8M-NEXT: .long 0xbf800000 @ float -1
714 %a = call nnan <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float><float -1.0, float 0.0, float -1.0, float -1.0>)
715 ret <4 x float> %a
716 }
718 define <4 x float> @fmaxnumv432_intrinsic(<4 x float> %x, <4 x float> %y) {
719 ; ARMV7-LABEL: fmaxnumv432_intrinsic:
720 ; ARMV7: @ %bb.0:
721 ; ARMV7-NEXT: mov r12, sp
722 ; ARMV7-NEXT: vld1.64 {d0, d1}, [r12]
723 ; ARMV7-NEXT: vmov d3, r2, r3
724 ; ARMV7-NEXT: vmov d2, r0, r1
725 ; ARMV7-NEXT: vcmp.f32 s7, s3
726 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
727 ; ARMV7-NEXT: vcmp.f32 s6, s2
728 ; ARMV7-NEXT: vmovgt.f32 s3, s7
729 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
730 ; ARMV7-NEXT: vcmp.f32 s5, s1
731 ; ARMV7-NEXT: vmovgt.f32 s2, s6
732 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
733 ; ARMV7-NEXT: vcmp.f32 s4, s0
734 ; ARMV7-NEXT: vmovgt.f32 s1, s5
735 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
736 ; ARMV7-NEXT: vmovgt.f32 s0, s4
737 ; ARMV7-NEXT: vmov r2, r3, d1
738 ; ARMV7-NEXT: vmov r0, r1, d0
739 ; ARMV7-NEXT: bx lr
740 ;
741 ; ARMV8-LABEL: fmaxnumv432_intrinsic:
742 ; ARMV8: @ %bb.0:
743 ; ARMV8-NEXT: vldr s0, [sp, #4]
744 ; ARMV8-NEXT: vmov s12, r1
745 ; ARMV8-NEXT: vldr s2, [sp, #8]
746 ; ARMV8-NEXT: vmov s10, r2
747 ; ARMV8-NEXT: vmaxnm.f32 s0, s12, s0
748 ; ARMV8-NEXT: vldr s4, [sp, #12]
749 ; ARMV8-NEXT: vldr s6, [sp]
750 ; ARMV8-NEXT: vmov s14, r0
751 ; ARMV8-NEXT: vmov r1, s0
752 ; ARMV8-NEXT: vmaxnm.f32 s0, s10, s2
753 ; ARMV8-NEXT: vmov s8, r3
754 ; ARMV8-NEXT: vmaxnm.f32 s6, s14, s6
755 ; ARMV8-NEXT: vmov r2, s0
756 ; ARMV8-NEXT: vmaxnm.f32 s0, s8, s4
757 ; ARMV8-NEXT: vmov r0, s6
758 ; ARMV8-NEXT: vmov r3, s0
759 ; ARMV8-NEXT: mov pc, lr
760 ;
761 ; ARMV8M-LABEL: fmaxnumv432_intrinsic:
762 ; ARMV8M: @ %bb.0:
763 ; ARMV8M-NEXT: vmov d0, r0, r1
764 ; ARMV8M-NEXT: mov r0, sp
765 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
766 ; ARMV8M-NEXT: vmov d1, r2, r3
767 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
768 ; ARMV8M-NEXT: vmov r0, r1, d0
769 ; ARMV8M-NEXT: vmov r2, r3, d1
770 ; ARMV8M-NEXT: bx lr
771 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
772 ret <4 x float> %a
773 }
775 define <4 x float> @fmaxnumv432_nsz_intrinsic(<4 x float> %x, <4 x float> %y) {
776 ; ARMV7-LABEL: fmaxnumv432_nsz_intrinsic:
777 ; ARMV7: @ %bb.0:
778 ; ARMV7-NEXT: vmov d17, r2, r3
779 ; ARMV7-NEXT: vmov d16, r0, r1
780 ; ARMV7-NEXT: mov r0, sp
781 ; ARMV7-NEXT: vld1.64 {d18, d19}, [r0]
782 ; ARMV7-NEXT: vmax.f32 q8, q8, q9
783 ; ARMV7-NEXT: vmov r0, r1, d16
784 ; ARMV7-NEXT: vmov r2, r3, d17
785 ; ARMV7-NEXT: bx lr
786 ;
787 ; ARMV8-LABEL: fmaxnumv432_nsz_intrinsic:
788 ; ARMV8: @ %bb.0:
789 ; ARMV8-NEXT: vldr s0, [sp, #4]
790 ; ARMV8-NEXT: vmov s12, r1
791 ; ARMV8-NEXT: vldr s2, [sp, #8]
792 ; ARMV8-NEXT: vmov s10, r2
793 ; ARMV8-NEXT: vmaxnm.f32 s0, s12, s0
794 ; ARMV8-NEXT: vldr s4, [sp, #12]
795 ; ARMV8-NEXT: vldr s6, [sp]
796 ; ARMV8-NEXT: vmov s14, r0
797 ; ARMV8-NEXT: vmov r1, s0
798 ; ARMV8-NEXT: vmaxnm.f32 s0, s10, s2
799 ; ARMV8-NEXT: vmov s8, r3
800 ; ARMV8-NEXT: vmaxnm.f32 s6, s14, s6
801 ; ARMV8-NEXT: vmov r2, s0
802 ; ARMV8-NEXT: vmaxnm.f32 s0, s8, s4
803 ; ARMV8-NEXT: vmov r0, s6
804 ; ARMV8-NEXT: vmov r3, s0
805 ; ARMV8-NEXT: mov pc, lr
806 ;
807 ; ARMV8M-LABEL: fmaxnumv432_nsz_intrinsic:
808 ; ARMV8M: @ %bb.0:
809 ; ARMV8M-NEXT: vmov d0, r0, r1
810 ; ARMV8M-NEXT: mov r0, sp
811 ; ARMV8M-NEXT: vldrw.u32 q1, [r0]
812 ; ARMV8M-NEXT: vmov d1, r2, r3
813 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
814 ; ARMV8M-NEXT: vmov r0, r1, d0
815 ; ARMV8M-NEXT: vmov r2, r3, d1
816 ; ARMV8M-NEXT: bx lr
817 %a = call nnan nsz <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y)
818 ret <4 x float> %a
819 }
821 define <4 x float> @fmaxnumv432_zero_intrinsic(<4 x float> %x) {
822 ; ARMV7-LABEL: fmaxnumv432_zero_intrinsic:
823 ; ARMV7: @ %bb.0:
824 ; ARMV7-NEXT: vmov d3, r2, r3
825 ; ARMV7-NEXT: vldr s0, .LCPI21_0
826 ; ARMV7-NEXT: vmov d2, r0, r1
827 ; ARMV7-NEXT: vcmp.f32 s7, #0
828 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
829 ; ARMV7-NEXT: vmov.f32 s3, s0
830 ; ARMV7-NEXT: vcmp.f32 s6, #0
831 ; ARMV7-NEXT: vmovgt.f32 s3, s7
832 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
833 ; ARMV7-NEXT: vmov.f32 s2, s0
834 ; ARMV7-NEXT: vcmp.f32 s5, #0
835 ; ARMV7-NEXT: vmovgt.f32 s2, s6
836 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
837 ; ARMV7-NEXT: vmov.f32 s1, s0
838 ; ARMV7-NEXT: vcmp.f32 s4, #0
839 ; ARMV7-NEXT: vmovgt.f32 s1, s5
840 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
841 ; ARMV7-NEXT: vmovgt.f32 s0, s4
842 ; ARMV7-NEXT: vmov r2, r3, d1
843 ; ARMV7-NEXT: vmov r0, r1, d0
844 ; ARMV7-NEXT: bx lr
845 ; ARMV7-NEXT: .p2align 2
846 ; ARMV7-NEXT: @ %bb.1:
847 ; ARMV7-NEXT: .LCPI21_0:
848 ; ARMV7-NEXT: .long 0x00000000 @ float 0
849 ;
850 ; ARMV8-LABEL: fmaxnumv432_zero_intrinsic:
851 ; ARMV8: @ %bb.0:
852 ; ARMV8-NEXT: vldr s0, .LCPI21_0
853 ; ARMV8-NEXT: vmov s4, r2
854 ; ARMV8-NEXT: vmov s6, r1
855 ; ARMV8-NEXT: vmov s8, r0
856 ; ARMV8-NEXT: vmaxnm.f32 s6, s6, s0
857 ; ARMV8-NEXT: vmov s2, r3
858 ; ARMV8-NEXT: vmaxnm.f32 s8, s8, s0
859 ; ARMV8-NEXT: vmaxnm.f32 s4, s4, s0
860 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
861 ; ARMV8-NEXT: vmov r0, s8
862 ; ARMV8-NEXT: vmov r1, s6
863 ; ARMV8-NEXT: vmov r2, s4
864 ; ARMV8-NEXT: vmov r3, s0
865 ; ARMV8-NEXT: mov pc, lr
866 ; ARMV8-NEXT: .p2align 2
867 ; ARMV8-NEXT: @ %bb.1:
868 ; ARMV8-NEXT: .LCPI21_0:
869 ; ARMV8-NEXT: .long 0x00000000 @ float 0
870 ;
871 ; ARMV8M-LABEL: fmaxnumv432_zero_intrinsic:
872 ; ARMV8M: @ %bb.0:
873 ; ARMV8M-NEXT: vmov d1, r2, r3
874 ; ARMV8M-NEXT: vmov.i32 q1, #0x0
875 ; ARMV8M-NEXT: vmov d0, r0, r1
876 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
877 ; ARMV8M-NEXT: vmov r0, r1, d0
878 ; ARMV8M-NEXT: vmov r2, r3, d1
879 ; ARMV8M-NEXT: bx lr
880 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 0.0, float 0.0, float 0.0, float 0.0>)
881 ret <4 x float> %a
882 }
884 define <4 x float> @fmaxnumv432_minus_zero_intrinsic(<4 x float> %x) {
885 ; ARMV7-LABEL: fmaxnumv432_minus_zero_intrinsic:
886 ; ARMV7: @ %bb.0:
887 ; ARMV7-NEXT: vldr s0, .LCPI22_0
888 ; ARMV7-NEXT: vmov d3, r2, r3
889 ; ARMV7-NEXT: vmov d2, r0, r1
890 ; ARMV7-NEXT: vcmp.f32 s7, s0
891 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
892 ; ARMV7-NEXT: vmov.f32 s3, s0
893 ; ARMV7-NEXT: vcmp.f32 s6, s0
894 ; ARMV7-NEXT: vmovgt.f32 s3, s7
895 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
896 ; ARMV7-NEXT: vmov.f32 s2, s0
897 ; ARMV7-NEXT: vcmp.f32 s5, s0
898 ; ARMV7-NEXT: vmovgt.f32 s2, s6
899 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
900 ; ARMV7-NEXT: vmov.f32 s1, s0
901 ; ARMV7-NEXT: vcmp.f32 s4, s0
902 ; ARMV7-NEXT: vmovgt.f32 s1, s5
903 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
904 ; ARMV7-NEXT: vmovgt.f32 s0, s4
905 ; ARMV7-NEXT: vmov r2, r3, d1
906 ; ARMV7-NEXT: vmov r0, r1, d0
907 ; ARMV7-NEXT: bx lr
908 ; ARMV7-NEXT: .p2align 2
909 ; ARMV7-NEXT: @ %bb.1:
910 ; ARMV7-NEXT: .LCPI22_0:
911 ; ARMV7-NEXT: .long 0x80000000 @ float -0
912 ;
913 ; ARMV8-LABEL: fmaxnumv432_minus_zero_intrinsic:
914 ; ARMV8: @ %bb.0:
915 ; ARMV8-NEXT: vldr s0, .LCPI22_0
916 ; ARMV8-NEXT: vmov s4, r2
917 ; ARMV8-NEXT: vmov s6, r1
918 ; ARMV8-NEXT: vmov s8, r0
919 ; ARMV8-NEXT: vmaxnm.f32 s6, s6, s0
920 ; ARMV8-NEXT: vmov s2, r3
921 ; ARMV8-NEXT: vmaxnm.f32 s8, s8, s0
922 ; ARMV8-NEXT: vmaxnm.f32 s4, s4, s0
923 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
924 ; ARMV8-NEXT: vmov r0, s8
925 ; ARMV8-NEXT: vmov r1, s6
926 ; ARMV8-NEXT: vmov r2, s4
927 ; ARMV8-NEXT: vmov r3, s0
928 ; ARMV8-NEXT: mov pc, lr
929 ; ARMV8-NEXT: .p2align 2
930 ; ARMV8-NEXT: @ %bb.1:
931 ; ARMV8-NEXT: .LCPI22_0:
932 ; ARMV8-NEXT: .long 0x80000000 @ float -0
933 ;
934 ; ARMV8M-LABEL: fmaxnumv432_minus_zero_intrinsic:
935 ; ARMV8M: @ %bb.0:
936 ; ARMV8M-NEXT: vmov d1, r2, r3
937 ; ARMV8M-NEXT: vmov.i32 q1, #0x80000000
938 ; ARMV8M-NEXT: vmov d0, r0, r1
939 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
940 ; ARMV8M-NEXT: vmov r0, r1, d0
941 ; ARMV8M-NEXT: vmov r2, r3, d1
942 ; ARMV8M-NEXT: bx lr
943 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float -0.0, float -0.0, float -0.0, float -0.0>)
944 ret <4 x float> %a
945 }
947 define <4 x float> @fmaxnumv432_non_zero_intrinsic(<4 x float> %x) {
948 ; ARMV7-LABEL: fmaxnumv432_non_zero_intrinsic:
949 ; ARMV7: @ %bb.0:
950 ; ARMV7-NEXT: vmov d19, r2, r3
951 ; ARMV7-NEXT: vmov.f32 q8, #1.000000e+00
952 ; ARMV7-NEXT: vmov d18, r0, r1
953 ; ARMV7-NEXT: vmax.f32 q8, q9, q8
954 ; ARMV7-NEXT: vmov r0, r1, d16
955 ; ARMV7-NEXT: vmov r2, r3, d17
956 ; ARMV7-NEXT: bx lr
957 ;
958 ; ARMV8-LABEL: fmaxnumv432_non_zero_intrinsic:
959 ; ARMV8: @ %bb.0:
960 ; ARMV8-NEXT: vmov.f32 s0, #1.000000e+00
961 ; ARMV8-NEXT: vmov s4, r2
962 ; ARMV8-NEXT: vmov s6, r1
963 ; ARMV8-NEXT: vmaxnm.f32 s4, s4, s0
964 ; ARMV8-NEXT: vmov s8, r0
965 ; ARMV8-NEXT: vmaxnm.f32 s6, s6, s0
966 ; ARMV8-NEXT: vmov s2, r3
967 ; ARMV8-NEXT: vmaxnm.f32 s8, s8, s0
968 ; ARMV8-NEXT: vmaxnm.f32 s0, s2, s0
969 ; ARMV8-NEXT: vmov r0, s8
970 ; ARMV8-NEXT: vmov r1, s6
971 ; ARMV8-NEXT: vmov r2, s4
972 ; ARMV8-NEXT: vmov r3, s0
973 ; ARMV8-NEXT: mov pc, lr
974 ;
975 ; ARMV8M-LABEL: fmaxnumv432_non_zero_intrinsic:
976 ; ARMV8M: @ %bb.0:
977 ; ARMV8M-NEXT: vmov d1, r2, r3
978 ; ARMV8M-NEXT: vmov.f32 q1, #1.000000e+00
979 ; ARMV8M-NEXT: vmov d0, r0, r1
980 ; ARMV8M-NEXT: vmaxnm.f32 q0, q0, q1
981 ; ARMV8M-NEXT: vmov r0, r1, d0
982 ; ARMV8M-NEXT: vmov r2, r3, d1
983 ; ARMV8M-NEXT: bx lr
984 %a = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float><float 1.0, float 1.0, float 1.0, float 1.0>)
985 ret <4 x float> %a
986 }
988 define <2 x double> @fminnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
989 ; ARMV7-LABEL: fminnumv264_intrinsic:
990 ; ARMV7: @ %bb.0:
991 ; ARMV7-NEXT: mov r12, sp
992 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
993 ; ARMV7-NEXT: vmov d18, r0, r1
994 ; ARMV7-NEXT: vcmp.f64 d18, d16
995 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
996 ; ARMV7-NEXT: vmov d19, r2, r3
997 ; ARMV7-NEXT: vcmp.f64 d19, d17
998 ; ARMV7-NEXT: vmovlt.f64 d16, d18
999 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1000 ; ARMV7-NEXT: vmov r0, r1, d16
1001 ; ARMV7-NEXT: vmovlt.f64 d17, d19
1002 ; ARMV7-NEXT: vmov r2, r3, d17
1003 ; ARMV7-NEXT: bx lr
1004 ;
1005 ; ARMV8-LABEL: fminnumv264_intrinsic:
1006 ; ARMV8: @ %bb.0:
1007 ; ARMV8-NEXT: vldr d16, [sp, #8]
1008 ; ARMV8-NEXT: vmov d18, r2, r3
1009 ; ARMV8-NEXT: vldr d17, [sp]
1010 ; ARMV8-NEXT: vmov d19, r0, r1
1011 ; ARMV8-NEXT: vminnm.f64 d16, d18, d16
1012 ; ARMV8-NEXT: vminnm.f64 d17, d19, d17
1013 ; ARMV8-NEXT: vmov r2, r3, d16
1014 ; ARMV8-NEXT: vmov r0, r1, d17
1015 ; ARMV8-NEXT: mov pc, lr
1016 ;
1017 ; ARMV8M-LABEL: fminnumv264_intrinsic:
1018 ; ARMV8M: @ %bb.0:
1019 ; ARMV8M-NEXT: mov r12, sp
1020 ; ARMV8M-NEXT: vmov d0, r0, r1
1021 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
1022 ; ARMV8M-NEXT: vmov d1, r2, r3
1023 ; ARMV8M-NEXT: vcmp.f64 d2, d0
1024 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1025 ; ARMV8M-NEXT: vcmp.f64 d3, d1
1026 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d2
1027 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1028 ; ARMV8M-NEXT: vmov r0, r1, d0
1029 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d3
1030 ; ARMV8M-NEXT: vmov r2, r3, d1
1031 ; ARMV8M-NEXT: bx lr
1032 %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
1033 ret <2 x double> %a
1034 }
1036 define <2 x double> @fminnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
1037 ; ARMV7-LABEL: fminnumv264_nsz_intrinsic:
1038 ; ARMV7: @ %bb.0:
1039 ; ARMV7-NEXT: mov r12, sp
1040 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
1041 ; ARMV7-NEXT: vmov d18, r0, r1
1042 ; ARMV7-NEXT: vcmp.f64 d18, d16
1043 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1044 ; ARMV7-NEXT: vmov d19, r2, r3
1045 ; ARMV7-NEXT: vcmp.f64 d19, d17
1046 ; ARMV7-NEXT: vmovlt.f64 d16, d18
1047 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1048 ; ARMV7-NEXT: vmov r0, r1, d16
1049 ; ARMV7-NEXT: vmovlt.f64 d17, d19
1050 ; ARMV7-NEXT: vmov r2, r3, d17
1051 ; ARMV7-NEXT: bx lr
1052 ;
1053 ; ARMV8-LABEL: fminnumv264_nsz_intrinsic:
1054 ; ARMV8: @ %bb.0:
1055 ; ARMV8-NEXT: vldr d16, [sp, #8]
1056 ; ARMV8-NEXT: vmov d18, r2, r3
1057 ; ARMV8-NEXT: vldr d17, [sp]
1058 ; ARMV8-NEXT: vmov d19, r0, r1
1059 ; ARMV8-NEXT: vminnm.f64 d16, d18, d16
1060 ; ARMV8-NEXT: vminnm.f64 d17, d19, d17
1061 ; ARMV8-NEXT: vmov r2, r3, d16
1062 ; ARMV8-NEXT: vmov r0, r1, d17
1063 ; ARMV8-NEXT: mov pc, lr
1064 ;
1065 ; ARMV8M-LABEL: fminnumv264_nsz_intrinsic:
1066 ; ARMV8M: @ %bb.0:
1067 ; ARMV8M-NEXT: mov r12, sp
1068 ; ARMV8M-NEXT: vmov d0, r0, r1
1069 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
1070 ; ARMV8M-NEXT: vmov d1, r2, r3
1071 ; ARMV8M-NEXT: vcmp.f64 d2, d0
1072 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1073 ; ARMV8M-NEXT: vcmp.f64 d3, d1
1074 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d2
1075 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1076 ; ARMV8M-NEXT: vmov r0, r1, d0
1077 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d3
1078 ; ARMV8M-NEXT: vmov r2, r3, d1
1079 ; ARMV8M-NEXT: bx lr
1080 %a = call nnan nsz <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y)
1081 ret <2 x double> %a
1082 }
1084 define <2 x double> @fminnumv264_non_zero_intrinsic(<2 x double> %x) {
1085 ; ARMV7-LABEL: fminnumv264_non_zero_intrinsic:
1086 ; ARMV7: @ %bb.0:
1087 ; ARMV7-NEXT: vmov.f64 d16, #1.000000e+00
1088 ; ARMV7-NEXT: vmov d17, r0, r1
1089 ; ARMV7-NEXT: vcmp.f64 d17, d16
1090 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1091 ; ARMV7-NEXT: vmov d18, r2, r3
1092 ; ARMV7-NEXT: vcmp.f64 d18, d16
1093 ; ARMV7-NEXT: vmov.f64 d19, d16
1094 ; ARMV7-NEXT: vmovlt.f64 d19, d17
1095 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1096 ; ARMV7-NEXT: vmov r0, r1, d19
1097 ; ARMV7-NEXT: vmovlt.f64 d16, d18
1098 ; ARMV7-NEXT: vmov r2, r3, d16
1099 ; ARMV7-NEXT: bx lr
1100 ;
1101 ; ARMV8-LABEL: fminnumv264_non_zero_intrinsic:
1102 ; ARMV8: @ %bb.0:
1103 ; ARMV8-NEXT: vmov.f64 d16, #1.000000e+00
1104 ; ARMV8-NEXT: vmov d18, r0, r1
1105 ; ARMV8-NEXT: vmov d17, r2, r3
1106 ; ARMV8-NEXT: vminnm.f64 d18, d18, d16
1107 ; ARMV8-NEXT: vminnm.f64 d16, d17, d16
1108 ; ARMV8-NEXT: vmov r0, r1, d18
1109 ; ARMV8-NEXT: vmov r2, r3, d16
1110 ; ARMV8-NEXT: mov pc, lr
1111 ;
1112 ; ARMV8M-LABEL: fminnumv264_non_zero_intrinsic:
1113 ; ARMV8M: @ %bb.0:
1114 ; ARMV8M-NEXT: vmov d1, r0, r1
1115 ; ARMV8M-NEXT: vmov.f64 d0, #1.000000e+00
1116 ; ARMV8M-NEXT: vcmp.f64 d0, d1
1117 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1118 ; ARMV8M-NEXT: vmov d2, r2, r3
1119 ; ARMV8M-NEXT: vcmp.f64 d0, d2
1120 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d0
1121 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1122 ; ARMV8M-NEXT: vmov r0, r1, d1
1123 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1124 ; ARMV8M-NEXT: vmov r2, r3, d0
1125 ; ARMV8M-NEXT: bx lr
1126 %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1127 ret <2 x double> %a
1128 }
1130 define <2 x double> @fminnumv264_one_zero_intrinsic(<2 x double> %x) {
1131 ; ARMV7-LABEL: fminnumv264_one_zero_intrinsic:
1132 ; ARMV7: @ %bb.0:
1133 ; ARMV7-NEXT: vmov d18, r2, r3
1134 ; ARMV7-NEXT: vcmp.f64 d18, #0
1135 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1136 ; ARMV7-NEXT: vmov d19, r0, r1
1137 ; ARMV7-NEXT: vmov.f64 d16, #-1.000000e+00
1138 ; ARMV7-NEXT: vcmp.f64 d19, d16
1139 ; ARMV7-NEXT: vmov.i32 d17, #0x0
1140 ; ARMV7-NEXT: vmovlt.f64 d17, d18
1141 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1142 ; ARMV7-NEXT: vmov r2, r3, d17
1143 ; ARMV7-NEXT: vmovlt.f64 d16, d19
1144 ; ARMV7-NEXT: vmov r0, r1, d16
1145 ; ARMV7-NEXT: bx lr
1146 ;
1147 ; ARMV8-LABEL: fminnumv264_one_zero_intrinsic:
1148 ; ARMV8: @ %bb.0:
1149 ; ARMV8-NEXT: vmov.f64 d16, #-1.000000e+00
1150 ; ARMV8-NEXT: vldr d17, .LCPI27_0
1151 ; ARMV8-NEXT: vmov d18, r0, r1
1152 ; ARMV8-NEXT: vmov d19, r2, r3
1153 ; ARMV8-NEXT: vminnm.f64 d16, d18, d16
1154 ; ARMV8-NEXT: vminnm.f64 d17, d19, d17
1155 ; ARMV8-NEXT: vmov r0, r1, d16
1156 ; ARMV8-NEXT: vmov r2, r3, d17
1157 ; ARMV8-NEXT: mov pc, lr
1158 ; ARMV8-NEXT: .p2align 3
1159 ; ARMV8-NEXT: @ %bb.1:
1160 ; ARMV8-NEXT: .LCPI27_0:
1161 ; ARMV8-NEXT: .long 0 @ double 0
1162 ; ARMV8-NEXT: .long 0
1163 ;
1164 ; ARMV8M-LABEL: fminnumv264_one_zero_intrinsic:
1165 ; ARMV8M: @ %bb.0:
1166 ; ARMV8M-NEXT: vmov d3, r2, r3
1167 ; ARMV8M-NEXT: vldr d1, .LCPI27_0
1168 ; ARMV8M-NEXT: vcmp.f64 d3, #0
1169 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1170 ; ARMV8M-NEXT: vmov d2, r0, r1
1171 ; ARMV8M-NEXT: vmov.f64 d0, #-1.000000e+00
1172 ; ARMV8M-NEXT: vcmp.f64 d0, d2
1173 ; ARMV8M-NEXT: vmovlt.f64 d1, d3
1174 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1175 ; ARMV8M-NEXT: vmov r2, r3, d1
1176 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1177 ; ARMV8M-NEXT: vmov r0, r1, d0
1178 ; ARMV8M-NEXT: bx lr
1179 ; ARMV8M-NEXT: .p2align 3
1180 ; ARMV8M-NEXT: @ %bb.1:
1181 ; ARMV8M-NEXT: .LCPI27_0:
1182 ; ARMV8M-NEXT: .long 0 @ double 0
1183 ; ARMV8M-NEXT: .long 0
1184 %a = call nnan <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double><double -1.0, double 0.0>)
1185 ret <2 x double> %a
1186 }
1188 define <2 x double> @fmaxnumv264_intrinsic(<2 x double> %x, <2 x double> %y) {
1189 ; ARMV7-LABEL: fmaxnumv264_intrinsic:
1190 ; ARMV7: @ %bb.0:
1191 ; ARMV7-NEXT: mov r12, sp
1192 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
1193 ; ARMV7-NEXT: vmov d18, r0, r1
1194 ; ARMV7-NEXT: vcmp.f64 d18, d16
1195 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1196 ; ARMV7-NEXT: vmov d19, r2, r3
1197 ; ARMV7-NEXT: vcmp.f64 d19, d17
1198 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1199 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1200 ; ARMV7-NEXT: vmov r0, r1, d16
1201 ; ARMV7-NEXT: vmovgt.f64 d17, d19
1202 ; ARMV7-NEXT: vmov r2, r3, d17
1203 ; ARMV7-NEXT: bx lr
1204 ;
1205 ; ARMV8-LABEL: fmaxnumv264_intrinsic:
1206 ; ARMV8: @ %bb.0:
1207 ; ARMV8-NEXT: vldr d16, [sp, #8]
1208 ; ARMV8-NEXT: vmov d18, r2, r3
1209 ; ARMV8-NEXT: vldr d17, [sp]
1210 ; ARMV8-NEXT: vmov d19, r0, r1
1211 ; ARMV8-NEXT: vmaxnm.f64 d16, d18, d16
1212 ; ARMV8-NEXT: vmaxnm.f64 d17, d19, d17
1213 ; ARMV8-NEXT: vmov r2, r3, d16
1214 ; ARMV8-NEXT: vmov r0, r1, d17
1215 ; ARMV8-NEXT: mov pc, lr
1216 ;
1217 ; ARMV8M-LABEL: fmaxnumv264_intrinsic:
1218 ; ARMV8M: @ %bb.0:
1219 ; ARMV8M-NEXT: mov r12, sp
1220 ; ARMV8M-NEXT: vmov d1, r0, r1
1221 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
1222 ; ARMV8M-NEXT: vmov d0, r2, r3
1223 ; ARMV8M-NEXT: vcmp.f64 d1, d2
1224 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1225 ; ARMV8M-NEXT: vcmp.f64 d0, d3
1226 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d2
1227 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1228 ; ARMV8M-NEXT: vmov r0, r1, d1
1229 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d3
1230 ; ARMV8M-NEXT: vmov r2, r3, d0
1231 ; ARMV8M-NEXT: bx lr
1232 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1233 ret <2 x double> %a
1234 }
1236 define <2 x double> @fmaxnumv264_nsz_intrinsic(<2 x double> %x, <2 x double> %y) {
1237 ; ARMV7-LABEL: fmaxnumv264_nsz_intrinsic:
1238 ; ARMV7: @ %bb.0:
1239 ; ARMV7-NEXT: mov r12, sp
1240 ; ARMV7-NEXT: vld1.64 {d16, d17}, [r12]
1241 ; ARMV7-NEXT: vmov d18, r0, r1
1242 ; ARMV7-NEXT: vcmp.f64 d18, d16
1243 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1244 ; ARMV7-NEXT: vmov d19, r2, r3
1245 ; ARMV7-NEXT: vcmp.f64 d19, d17
1246 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1247 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1248 ; ARMV7-NEXT: vmov r0, r1, d16
1249 ; ARMV7-NEXT: vmovgt.f64 d17, d19
1250 ; ARMV7-NEXT: vmov r2, r3, d17
1251 ; ARMV7-NEXT: bx lr
1252 ;
1253 ; ARMV8-LABEL: fmaxnumv264_nsz_intrinsic:
1254 ; ARMV8: @ %bb.0:
1255 ; ARMV8-NEXT: vldr d16, [sp, #8]
1256 ; ARMV8-NEXT: vmov d18, r2, r3
1257 ; ARMV8-NEXT: vldr d17, [sp]
1258 ; ARMV8-NEXT: vmov d19, r0, r1
1259 ; ARMV8-NEXT: vmaxnm.f64 d16, d18, d16
1260 ; ARMV8-NEXT: vmaxnm.f64 d17, d19, d17
1261 ; ARMV8-NEXT: vmov r2, r3, d16
1262 ; ARMV8-NEXT: vmov r0, r1, d17
1263 ; ARMV8-NEXT: mov pc, lr
1264 ;
1265 ; ARMV8M-LABEL: fmaxnumv264_nsz_intrinsic:
1266 ; ARMV8M: @ %bb.0:
1267 ; ARMV8M-NEXT: mov r12, sp
1268 ; ARMV8M-NEXT: vmov d1, r0, r1
1269 ; ARMV8M-NEXT: vldrw.u32 q1, [r12]
1270 ; ARMV8M-NEXT: vmov d0, r2, r3
1271 ; ARMV8M-NEXT: vcmp.f64 d1, d2
1272 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1273 ; ARMV8M-NEXT: vcmp.f64 d0, d3
1274 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d2
1275 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1276 ; ARMV8M-NEXT: vmov r0, r1, d1
1277 ; ARMV8M-NEXT: vselgt.f64 d0, d0, d3
1278 ; ARMV8M-NEXT: vmov r2, r3, d0
1279 ; ARMV8M-NEXT: bx lr
1280 %a = call nnan nsz <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double> %y)
1281 ret <2 x double> %a
1282 }
1284 define <2 x double> @fmaxnumv264_zero_intrinsic(<2 x double> %x) {
1285 ; ARMV7-LABEL: fmaxnumv264_zero_intrinsic:
1286 ; ARMV7: @ %bb.0:
1287 ; ARMV7-NEXT: vldr d17, .LCPI30_0
1288 ; ARMV7-NEXT: vmov d18, r2, r3
1289 ; ARMV7-NEXT: vmov d19, r0, r1
1290 ; ARMV7-NEXT: vcmp.f64 d18, d17
1291 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1292 ; ARMV7-NEXT: vmov.i32 d16, #0x0
1293 ; ARMV7-NEXT: vcmp.f64 d19, #0
1294 ; ARMV7-NEXT: vmovgt.f64 d17, d18
1295 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1296 ; ARMV7-NEXT: vmov r2, r3, d17
1297 ; ARMV7-NEXT: vmovgt.f64 d16, d19
1298 ; ARMV7-NEXT: vmov r0, r1, d16
1299 ; ARMV7-NEXT: bx lr
1300 ; ARMV7-NEXT: .p2align 3
1301 ; ARMV7-NEXT: @ %bb.1:
1302 ; ARMV7-NEXT: .LCPI30_0:
1303 ; ARMV7-NEXT: .long 0 @ double -0
1304 ; ARMV7-NEXT: .long 2147483648
1305 ;
1306 ; ARMV8-LABEL: fmaxnumv264_zero_intrinsic:
1307 ; ARMV8: @ %bb.0:
1308 ; ARMV8-NEXT: vldr d16, .LCPI30_0
1309 ; ARMV8-NEXT: vmov d18, r2, r3
1310 ; ARMV8-NEXT: vldr d17, .LCPI30_1
1311 ; ARMV8-NEXT: vmov d19, r0, r1
1312 ; ARMV8-NEXT: vmaxnm.f64 d16, d18, d16
1313 ; ARMV8-NEXT: vmaxnm.f64 d17, d19, d17
1314 ; ARMV8-NEXT: vmov r2, r3, d16
1315 ; ARMV8-NEXT: vmov r0, r1, d17
1316 ; ARMV8-NEXT: mov pc, lr
1317 ; ARMV8-NEXT: .p2align 3
1318 ; ARMV8-NEXT: @ %bb.1:
1319 ; ARMV8-NEXT: .LCPI30_0:
1320 ; ARMV8-NEXT: .long 0 @ double -0
1321 ; ARMV8-NEXT: .long 2147483648
1322 ; ARMV8-NEXT: .LCPI30_1:
1323 ; ARMV8-NEXT: .long 0 @ double 0
1324 ; ARMV8-NEXT: .long 0
1325 ;
1326 ; ARMV8M-LABEL: fmaxnumv264_zero_intrinsic:
1327 ; ARMV8M: @ %bb.0:
1328 ; ARMV8M-NEXT: vmov d2, r0, r1
1329 ; ARMV8M-NEXT: vldr d0, .LCPI30_0
1330 ; ARMV8M-NEXT: vcmp.f64 d2, #0
1331 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1332 ; ARMV8M-NEXT: vmov d3, r2, r3
1333 ; ARMV8M-NEXT: vcmp.f64 d3, d0
1334 ; ARMV8M-NEXT: vldr d1, .LCPI30_1
1335 ; ARMV8M-NEXT: vselgt.f64 d1, d2, d1
1336 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1337 ; ARMV8M-NEXT: vmov r0, r1, d1
1338 ; ARMV8M-NEXT: vselgt.f64 d0, d3, d0
1339 ; ARMV8M-NEXT: vmov r2, r3, d0
1340 ; ARMV8M-NEXT: bx lr
1341 ; ARMV8M-NEXT: .p2align 3
1342 ; ARMV8M-NEXT: @ %bb.1:
1343 ; ARMV8M-NEXT: .LCPI30_0:
1344 ; ARMV8M-NEXT: .long 0 @ double -0
1345 ; ARMV8M-NEXT: .long 2147483648
1346 ; ARMV8M-NEXT: .LCPI30_1:
1347 ; ARMV8M-NEXT: .long 0 @ double 0
1348 ; ARMV8M-NEXT: .long 0
1349 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 0.0, double -0.0>)
1350 ret <2 x double> %a
1351 }
1353 define <2 x double> @fmaxnumv264_minus_zero_intrinsic(<2 x double> %x) {
1354 ; ARMV7-LABEL: fmaxnumv264_minus_zero_intrinsic:
1355 ; ARMV7: @ %bb.0:
1356 ; ARMV7-NEXT: vldr d16, .LCPI31_0
1357 ; ARMV7-NEXT: vmov d17, r0, r1
1358 ; ARMV7-NEXT: vmov d18, r2, r3
1359 ; ARMV7-NEXT: vcmp.f64 d17, d16
1360 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1361 ; ARMV7-NEXT: vcmp.f64 d18, d16
1362 ; ARMV7-NEXT: vmov.f64 d19, d16
1363 ; ARMV7-NEXT: vmovgt.f64 d19, d17
1364 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1365 ; ARMV7-NEXT: vmov r0, r1, d19
1366 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1367 ; ARMV7-NEXT: vmov r2, r3, d16
1368 ; ARMV7-NEXT: bx lr
1369 ; ARMV7-NEXT: .p2align 3
1370 ; ARMV7-NEXT: @ %bb.1:
1371 ; ARMV7-NEXT: .LCPI31_0:
1372 ; ARMV7-NEXT: .long 0 @ double -0
1373 ; ARMV7-NEXT: .long 2147483648
1374 ;
1375 ; ARMV8-LABEL: fmaxnumv264_minus_zero_intrinsic:
1376 ; ARMV8: @ %bb.0:
1377 ; ARMV8-NEXT: vldr d16, .LCPI31_0
1378 ; ARMV8-NEXT: vmov d18, r0, r1
1379 ; ARMV8-NEXT: vmov d17, r2, r3
1380 ; ARMV8-NEXT: vmaxnm.f64 d18, d18, d16
1381 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
1382 ; ARMV8-NEXT: vmov r0, r1, d18
1383 ; ARMV8-NEXT: vmov r2, r3, d16
1384 ; ARMV8-NEXT: mov pc, lr
1385 ; ARMV8-NEXT: .p2align 3
1386 ; ARMV8-NEXT: @ %bb.1:
1387 ; ARMV8-NEXT: .LCPI31_0:
1388 ; ARMV8-NEXT: .long 0 @ double -0
1389 ; ARMV8-NEXT: .long 2147483648
1390 ;
1391 ; ARMV8M-LABEL: fmaxnumv264_minus_zero_intrinsic:
1392 ; ARMV8M: @ %bb.0:
1393 ; ARMV8M-NEXT: vldr d0, .LCPI31_0
1394 ; ARMV8M-NEXT: vmov d1, r0, r1
1395 ; ARMV8M-NEXT: vmov d2, r2, r3
1396 ; ARMV8M-NEXT: vcmp.f64 d1, d0
1397 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1398 ; ARMV8M-NEXT: vcmp.f64 d2, d0
1399 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d0
1400 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1401 ; ARMV8M-NEXT: vmov r0, r1, d1
1402 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1403 ; ARMV8M-NEXT: vmov r2, r3, d0
1404 ; ARMV8M-NEXT: bx lr
1405 ; ARMV8M-NEXT: .p2align 3
1406 ; ARMV8M-NEXT: @ %bb.1:
1407 ; ARMV8M-NEXT: .LCPI31_0:
1408 ; ARMV8M-NEXT: .long 0 @ double -0
1409 ; ARMV8M-NEXT: .long 2147483648
1410 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double -0.0, double -0.0>)
1411 ret <2 x double> %a
1412 }
1414 define <2 x double> @fmaxnumv264_non_zero_intrinsic(<2 x double> %x) {
1415 ; ARMV7-LABEL: fmaxnumv264_non_zero_intrinsic:
1416 ; ARMV7: @ %bb.0:
1417 ; ARMV7-NEXT: vmov.f64 d16, #1.000000e+00
1418 ; ARMV7-NEXT: vmov d17, r0, r1
1419 ; ARMV7-NEXT: vcmp.f64 d17, d16
1420 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1421 ; ARMV7-NEXT: vmov d18, r2, r3
1422 ; ARMV7-NEXT: vcmp.f64 d18, d16
1423 ; ARMV7-NEXT: vmov.f64 d19, d16
1424 ; ARMV7-NEXT: vmovgt.f64 d19, d17
1425 ; ARMV7-NEXT: vmrs APSR_nzcv, fpscr
1426 ; ARMV7-NEXT: vmov r0, r1, d19
1427 ; ARMV7-NEXT: vmovgt.f64 d16, d18
1428 ; ARMV7-NEXT: vmov r2, r3, d16
1429 ; ARMV7-NEXT: bx lr
1430 ;
1431 ; ARMV8-LABEL: fmaxnumv264_non_zero_intrinsic:
1432 ; ARMV8: @ %bb.0:
1433 ; ARMV8-NEXT: vmov.f64 d16, #1.000000e+00
1434 ; ARMV8-NEXT: vmov d18, r0, r1
1435 ; ARMV8-NEXT: vmov d17, r2, r3
1436 ; ARMV8-NEXT: vmaxnm.f64 d18, d18, d16
1437 ; ARMV8-NEXT: vmaxnm.f64 d16, d17, d16
1438 ; ARMV8-NEXT: vmov r0, r1, d18
1439 ; ARMV8-NEXT: vmov r2, r3, d16
1440 ; ARMV8-NEXT: mov pc, lr
1441 ;
1442 ; ARMV8M-LABEL: fmaxnumv264_non_zero_intrinsic:
1443 ; ARMV8M: @ %bb.0:
1444 ; ARMV8M-NEXT: vmov.f64 d0, #1.000000e+00
1445 ; ARMV8M-NEXT: vmov d1, r0, r1
1446 ; ARMV8M-NEXT: vcmp.f64 d1, d0
1447 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1448 ; ARMV8M-NEXT: vmov d2, r2, r3
1449 ; ARMV8M-NEXT: vcmp.f64 d2, d0
1450 ; ARMV8M-NEXT: vselgt.f64 d1, d1, d0
1451 ; ARMV8M-NEXT: vmrs APSR_nzcv, fpscr
1452 ; ARMV8M-NEXT: vmov r0, r1, d1
1453 ; ARMV8M-NEXT: vselgt.f64 d0, d2, d0
1454 ; ARMV8M-NEXT: vmov r2, r3, d0
1455 ; ARMV8M-NEXT: bx lr
1456 %a = call nnan <2 x double> @llvm.maxnum.v2f64(<2 x double> %x, <2 x double><double 1.0, double 1.0>)
1457 ret <2 x double> %a
1458 }