1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -march=hexagon < %s | FileCheck %s
4 define i32 @f0(ptr %a0, i32 %a1) #0 {
8 ; CHECK-NEXT: r0 = memub(r0+#0)
11 ; CHECK-NEXT: r1 = asl(r1,#2)
14 ; CHECK-NEXT: p0 = tstbit(r0,r1)
17 ; CHECK-NEXT: r0 = mux(p0,#-1,#0)
20 ; CHECK-NEXT: jumpr r31
22 %v0 = load <2 x i1>, ptr %a0
23 %v1 = extractelement <2 x i1> %v0, i32 %a1
24 %v2 = sext i1 %v1 to i32
28 define i32 @f1(ptr %a0, i32 %a1) #0 {
32 ; CHECK-NEXT: r0 = memub(r0+#0)
35 ; CHECK-NEXT: r1 = asl(r1,#1)
38 ; CHECK-NEXT: p0 = tstbit(r0,r1)
41 ; CHECK-NEXT: r0 = mux(p0,#-1,#0)
44 ; CHECK-NEXT: jumpr r31
46 %v0 = load <4 x i1>, ptr %a0
47 %v1 = extractelement <4 x i1> %v0, i32 %a1
48 %v2 = sext i1 %v1 to i32
52 define i32 @f2(ptr %a0, i32 %a1) #0 {
56 ; CHECK-NEXT: r0 = memub(r0+#0)
59 ; CHECK-NEXT: p0 = tstbit(r0,r1)
62 ; CHECK-NEXT: r0 = mux(p0,#-1,#0)
65 ; CHECK-NEXT: jumpr r31
67 %v0 = load <8 x i1>, ptr %a0
68 %v1 = extractelement <8 x i1> %v0, i32 %a1
69 %v2 = sext i1 %v1 to i32
73 attributes #0 = { nounwind "target-features"="-packets" }