1 ; RUN: llc -march=hexagon -enable-pipeliner < %s -pipeliner-experimental-cg=true | FileCheck %s
3 ; A test that the Phi rewrite logic is correct.
5 ; CHECK: [[REG0:(r[0-9]+)]] = #0
6 ; CHECK: loop0(.LBB0_[[LOOP:.]],
7 ; CHECK: .LBB0_[[LOOP]]:
8 ; CHECK: memh([[REG0]]+#0) = #0
10 define void @f0(i32 %a0) #0 {
15 b1: ; preds = %b1, %b0
16 %v1 = phi ptr [ %v4, %b1 ], [ null, %b0 ]
17 %v2 = phi i32 [ %v5, %b1 ], [ 0, %b0 ]
18 %v3 = getelementptr inbounds i16, ptr %v1, i32 1
19 store i16 0, ptr %v1, align 2
20 %v4 = getelementptr inbounds i16, ptr %v1, i32 2
21 store i16 0, ptr %v3, align 2
22 %v5 = add nsw i32 %v2, 8
23 %v6 = icmp slt i32 %v5, %v0
24 br i1 %v6, label %b1, label %b2
30 attributes #0 = { nounwind "target-cpu"="hexagonv55" }