1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600
5 declare <4 x float> @llvm.mips.fsqrt.w(<4 x float>)
6 define void @fsqrt_v4f32_builtin(ptr %a, ptr %c) { entry: ret void }
8 declare <2 x double> @llvm.mips.fsqrt.d(<2 x double>)
9 define void @fsqrt_v2f64_builtin(ptr %a, ptr %c) { entry: ret void }
13 name: fsqrt_v4f32_builtin
15 tracksRegLiveness: true
20 ; P5600-LABEL: name: fsqrt_v4f32_builtin
21 ; P5600: liveins: $a0, $a1
22 ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
23 ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
24 ; P5600: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p0) :: (load (<4 x s32>) from %ir.a)
25 ; P5600: [[FSQRT:%[0-9]+]]:_(<4 x s32>) = G_FSQRT [[LOAD]]
26 ; P5600: G_STORE [[FSQRT]](<4 x s32>), [[COPY1]](p0) :: (store (<4 x s32>) into %ir.c)
30 %2:_(<4 x s32>) = G_LOAD %0(p0) :: (load (<4 x s32>) from %ir.a)
31 %3:_(<4 x s32>) = G_INTRINSIC intrinsic(@llvm.mips.fsqrt.w), %2(<4 x s32>)
32 G_STORE %3(<4 x s32>), %1(p0) :: (store (<4 x s32>) into %ir.c)
37 name: fsqrt_v2f64_builtin
39 tracksRegLiveness: true
44 ; P5600-LABEL: name: fsqrt_v2f64_builtin
45 ; P5600: liveins: $a0, $a1
46 ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
47 ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
48 ; P5600: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load (<2 x s64>) from %ir.a)
49 ; P5600: [[FSQRT:%[0-9]+]]:_(<2 x s64>) = G_FSQRT [[LOAD]]
50 ; P5600: G_STORE [[FSQRT]](<2 x s64>), [[COPY1]](p0) :: (store (<2 x s64>) into %ir.c)
54 %2:_(<2 x s64>) = G_LOAD %0(p0) :: (load (<2 x s64>) from %ir.a)
55 %3:_(<2 x s64>) = G_INTRINSIC intrinsic(@llvm.mips.fsqrt.d), %2(<2 x s64>)
56 G_STORE %3(<2 x s64>), %1(p0) :: (store (<2 x s64>) into %ir.c)