1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnu -target-abi n64 | FileCheck %s --check-prefix=MIPSN64
3 ; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnu -target-abi n32 | FileCheck %s --check-prefix=MIPSN32
5 ; Test that powi has its integer argument sign extended on mips64.
7 declare double @llvm.powi.f64.i32(double, i32)
9 define double @powi(double %value, i32 %power) {
10 ; MIPSN64-LABEL: powi:
12 ; MIPSN64-NEXT: daddiu $sp, $sp, -16
13 ; MIPSN64-NEXT: .cfi_def_cfa_offset 16
14 ; MIPSN64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
15 ; MIPSN64-NEXT: .cfi_offset 31, -8
16 ; MIPSN64-NEXT: jal __powidf2
17 ; MIPSN64-NEXT: sll $5, $5, 0
18 ; MIPSN64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
19 ; MIPSN64-NEXT: jr $ra
20 ; MIPSN64-NEXT: daddiu $sp, $sp, 16
22 ; MIPSN32-LABEL: powi:
24 ; MIPSN32-NEXT: addiu $sp, $sp, -16
25 ; MIPSN32-NEXT: .cfi_def_cfa_offset 16
26 ; MIPSN32-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
27 ; MIPSN32-NEXT: .cfi_offset 31, -8
28 ; MIPSN32-NEXT: jal __powidf2
29 ; MIPSN32-NEXT: sll $5, $5, 0
30 ; MIPSN32-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
31 ; MIPSN32-NEXT: jr $ra
32 ; MIPSN32-NEXT: addiu $sp, $sp, 16
33 %1 = tail call double @llvm.powi.f64.i32(double %value, i32 %power)
37 declare float @llvm.powi.f32.i32(float, i32)
39 define float @powfi(float %value, i32 %power) {
40 ; MIPSN64-LABEL: powfi:
42 ; MIPSN64-NEXT: daddiu $sp, $sp, -16
43 ; MIPSN64-NEXT: .cfi_def_cfa_offset 16
44 ; MIPSN64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
45 ; MIPSN64-NEXT: .cfi_offset 31, -8
46 ; MIPSN64-NEXT: jal __powisf2
47 ; MIPSN64-NEXT: sll $5, $5, 0
48 ; MIPSN64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
49 ; MIPSN64-NEXT: jr $ra
50 ; MIPSN64-NEXT: daddiu $sp, $sp, 16
52 ; MIPSN32-LABEL: powfi:
54 ; MIPSN32-NEXT: addiu $sp, $sp, -16
55 ; MIPSN32-NEXT: .cfi_def_cfa_offset 16
56 ; MIPSN32-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
57 ; MIPSN32-NEXT: .cfi_offset 31, -8
58 ; MIPSN32-NEXT: jal __powisf2
59 ; MIPSN32-NEXT: sll $5, $5, 0
60 ; MIPSN32-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
61 ; MIPSN32-NEXT: jr $ra
62 ; MIPSN32-NEXT: addiu $sp, $sp, 16
63 %1 = tail call float @llvm.powi.f32.i32(float %value, i32 %power)