llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sffbh.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
   3
   4 ---
   5 name: sffbh_s32_ss
   6 legalized: true
   7 regBankSelected: true
   8 tracksRegLiveness: true
   9
  10 body: |
  11   bb.0:
  12     liveins: $sgpr0
  13
  14     ; CHECK-LABEL: name: sffbh_s32_ss
  15     ; CHECK: liveins: $sgpr0
  16     ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  17     ; CHECK: [[S_FLBIT_I32_:%[0-9]+]]:sreg_32 = S_FLBIT_I32 [[COPY]]
  18     ; CHECK: S_ENDPGM 0, implicit [[S_FLBIT_I32_]]
  19     %0:sgpr(s32) = COPY $sgpr0
  20     %1:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), %0
  21     S_ENDPGM 0, implicit %1
  22 ...
  23
  24 ---
  25 name: sffbh_s32_vs
  26 legalized: true
  27 regBankSelected: true
  28 tracksRegLiveness: true
  29
  30 body: |
  31   bb.0:
  32     liveins: $sgpr0
  33
  34     ; CHECK-LABEL: name: sffbh_s32_vs
  35     ; CHECK: liveins: $sgpr0
  36     ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  37     ; CHECK: [[V_FFBH_I32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_I32_e64 [[COPY]], implicit $exec
  38     ; CHECK: S_ENDPGM 0, implicit [[V_FFBH_I32_e64_]]
  39     %0:sgpr(s32) = COPY $sgpr0
  40     %1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), %0
  41     S_ENDPGM 0, implicit %1
  42 ...
  43
  44 ---
  45 name: sffbh_s32_vv
  46 legalized: true
  47 regBankSelected: true
  48 tracksRegLiveness: true
  49
  50 body: |
  51   bb.0:
  52     liveins: $vgpr0
  53
  54     ; CHECK-LABEL: name: sffbh_s32_vv
  55     ; CHECK: liveins: $vgpr0
  56     ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  57     ; CHECK: [[V_FFBH_I32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_I32_e64 [[COPY]], implicit $exec
  58     ; CHECK: S_ENDPGM 0, implicit [[V_FFBH_I32_e64_]]
  59     %0:vgpr(s32) = COPY $vgpr0
  60     %1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), %0
  61     S_ENDPGM 0, implicit %1
  62 ...