1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -global-isel -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
4 define amdgpu_kernel void @test_wave64(i32 %arg0, i64 %saved) {
5 ; GCN-LABEL: test_wave64:
6 ; GCN: ; %bb.0: ; %entry
7 ; GCN-NEXT: s_load_dword s2, s[4:5], 0x0
8 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
9 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
10 ; GCN-NEXT: s_cmp_lg_u32 s2, 0
11 ; GCN-NEXT: s_cbranch_scc1 .LBB0_2
12 ; GCN-NEXT: ; %bb.1: ; %mid
13 ; GCN-NEXT: v_mov_b32_e32 v0, 0
14 ; GCN-NEXT: global_store_dword v[0:1], v0, off
15 ; GCN-NEXT: s_waitcnt vmcnt(0)
16 ; GCN-NEXT: .LBB0_2: ; %bb
17 ; GCN-NEXT: s_or_b64 exec, exec, s[0:1]
18 ; GCN-NEXT: v_mov_b32_e32 v0, 0
19 ; GCN-NEXT: global_store_dword v[0:1], v0, off
20 ; GCN-NEXT: s_waitcnt vmcnt(0)
23 %cond = icmp eq i32 %arg0, 0
24 br i1 %cond, label %mid, label %bb
27 store volatile i32 0, i32 addrspace(1)* undef
31 call void @llvm.amdgcn.end.cf.i64(i64 %saved)
32 store volatile i32 0, i32 addrspace(1)* undef
36 declare void @llvm.amdgcn.end.cf.i64(i64 %val)