llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
   3 # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
   4
   5 ---
   6 name: strict_wwm_s
   7 legalized: true
   8
   9 body: |
  10   bb.0:
  11     liveins: $sgpr0
  12     ; CHECK-LABEL: name: strict_wwm_s
  13     ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
  14     ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
  15     ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.strict.wwm), [[COPY1]](s32)
  16     %0:_(s32) = COPY $sgpr0
  17     %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.strict.wwm), %0
  18 ...
  19
  20 ---
  21 name: strict_wwm_v
  22 legalized: true
  23
  24 body: |
  25   bb.0:
  26     liveins: $vgpr0
  27     ; CHECK-LABEL: name: strict_wwm_v
  28     ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
  29     ; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.strict.wwm), [[COPY]](s32)
  30     %0:_(s32) = COPY $vgpr0
  31     %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.strict.wwm), %0
  32 ...