[AMDGPU] Make v8i16/v8f16 legal
[llvm-project.git] / mlir / test / Integration / Dialect / Linalg / CPU / test-conv-3d-ndhwc-dhwcf-call.mlir
blob0458f26239899404c8efd54d376f4fb713fa39d1
1 // RUN: mlir-opt %s -convert-linalg-to-loops -convert-scf-to-std -convert-linalg-to-llvm -lower-affine -convert-scf-to-std --convert-memref-to-llvm -convert-std-to-llvm -reconcile-unrealized-casts | \
2 // RUN: mlir-cpu-runner -e main -entry-point-result=void \
3 // RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
4 // RUN: | FileCheck %s
6 // RUN: mlir-opt %s -linalg-tile="tile-sizes=0,5,5,5" -convert-linalg-to-loops -convert-scf-to-std \
7 // RUN:   -convert-linalg-to-llvm -lower-affine -convert-scf-to-std --convert-memref-to-llvm -convert-std-to-llvm -reconcile-unrealized-casts | \
8 // RUN: mlir-cpu-runner -e main -entry-point-result=void \
9 // RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
10 // RUN: | FileCheck %s
12 func private @print_memref_f32(memref<*xf32>)
14 // Creates and returns 5-D buffer of size (%s1, %s2, %s3, %s4, %s5) filled with the value %f
15 func @alloc_5d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %s4 : index, %s5 : index, %f : f32) -> memref<?x?x?x?x?xf32> {
16   %buf = memref.alloc(%s1, %s2, %s3, %s4, %s5) : memref<?x?x?x?x?xf32>
17   linalg.fill(%f, %buf) : f32, memref<?x?x?x?x?xf32>
18   return %buf : memref<?x?x?x?x?xf32>
21 func @conv_3d_ndhwc_dhwcf(%arg0: memref<?x?x?x?x?xf32>, %arg1: memref<?x?x?x?x?xf32>, %arg2: memref<?x?x?x?x?xf32>) {
22   linalg.conv_3d_ndhwc_dhwcf {dilations = dense<1> : tensor<3xi64>,
23                            strides = dense<1> : tensor<3xi64>}
24      ins (%arg0, %arg1: memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>)
25     outs (%arg2: memref<?x?x?x?x?xf32>)
26   return
30 func @main() {
31   %c0 = arith.constant 0 : index
32   %c1 = arith.constant 1 : index
33   %c3 = arith.constant 3 : index
34   %c6 = arith.constant 6 : index
35   %c8 = arith.constant 8 : index
36   %f10 = arith.constant 10.00000e+00 : f32
37   %val = arith.constant 2.00000e+00 : f32
38   %zero = arith.constant 0.00000e+00 : f32
40   %filter3D_ndhwc = call @alloc_5d_filled_f32(%c3, %c3, %c3, %c1, %c1, %val) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
41   %in3D_ndhwc = call @alloc_5d_filled_f32(%c1, %c8, %c8, %c8, %c1, %val) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
42   %out3D_ndhwc = call @alloc_5d_filled_f32(%c1, %c6, %c6, %c6, %c1, %zero) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
44   memref.store %f10, %in3D_ndhwc[%c0, %c0, %c0, %c3, %c0] : memref<?x?x?x?x?xf32>
45   call @conv_3d_ndhwc_dhwcf(%in3D_ndhwc, %filter3D_ndhwc, %out3D_ndhwc) : (memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>) -> ()
46   %out3D_ndhwc_ = memref.cast %out3D_ndhwc : memref<?x?x?x?x?xf32> to memref<*xf32>
47   call @print_memref_f32(%out3D_ndhwc_): (memref<*xf32>) -> ()
49   memref.dealloc %filter3D_ndhwc : memref<?x?x?x?x?xf32>
50   memref.dealloc %in3D_ndhwc : memref<?x?x?x?x?xf32>
51   memref.dealloc %out3D_ndhwc : memref<?x?x?x?x?xf32>
52   return
55 // CHECK:       Unranked Memref {{.*}}
56 // CHECK-NEXT:  [
57 // CHECK-SAME:   [
58 // CHECK-SAME:    [
59 // CHECK-SAME:     [
60 // CHECK-SAME:      [108],
61 // CHECK-COUNT-3:   [124],
62 // CHECK-COUNT-2:   [108]
63 // CHECK-SAME:     ],
64 // CHECK-NEXT:     [
65 // CHECK-COUNT-6:   [108]
66 // CHECK-SAME:     ],
67 // CHECK-NEXT:     [
68 // CHECK-COUNT-6:   [108]
69 // CHECK-SAME:     ],
70 // CHECK-NEXT:     [
71 // CHECK-COUNT-6:   [108]
72 // CHECK-SAME:     ],
73 // CHECK-NEXT:     [
74 // CHECK-COUNT-6:   [108]
75 // CHECK-SAME:     ],
76 // CHECK-NEXT:     [
77 // CHECK-COUNT-6:   [108]
78 // CHECK-SAME:     ]
79 // CHECK-SAME:    ],
80 // CHECK-NEXT:    [
81 // CHECK-SAME:     [
82 // CHECK-COUNT-6:   [108]
83 // CHECK-SAME:     ],
84 // CHECK-NEXT:     [
85 // CHECK-COUNT-6:   [108]
86 // CHECK-SAME:     ],
87 // CHECK-NEXT:     [
88 // CHECK-COUNT-6:   [108]
89 // CHECK-SAME:     ],
90 // CHECK-NEXT:     [
91 // CHECK-COUNT-6:   [108]
92 // CHECK-SAME:     ],
93 // CHECK-NEXT:     [
94 // CHECK-COUNT-6:   [108]
95 // CHECK-SAME:     ],
96 // CHECK-NEXT:     [
97 // CHECK-COUNT-6:   [108]
98 // CHECK-SAME:     ]
99 // CHECK-SAME:    ],
100 // CHECK-NEXT:    [
101 // CHECK-SAME:     [
102 // CHECK-COUNT-6:   [108]
103 // CHECK-SAME:     ],
104 // CHECK-NEXT:     [
105 // CHECK-COUNT-6:   [108]
106 // CHECK-SAME:     ],
107 // CHECK-NEXT:     [
108 // CHECK-COUNT-6:   [108]
109 // CHECK-SAME:     ],
110 // CHECK-NEXT:     [
111 // CHECK-COUNT-6:   [108]
112 // CHECK-SAME:     ],
113 // CHECK-NEXT:     [
114 // CHECK-COUNT-6:   [108]
115 // CHECK-SAME:     ],
116 // CHECK-NEXT:     [
117 // CHECK-COUNT-6:   [108]
118 // CHECK-SAME:     ]
119 // CHECK-SAME:    ],
120 // CHECK-NEXT:    [
121 // CHECK-SAME:     [
122 // CHECK-COUNT-6:   [108]
123 // CHECK-SAME:     ],
124 // CHECK-NEXT:     [
125 // CHECK-COUNT-6:   [108]
126 // CHECK-SAME:     ],
127 // CHECK-NEXT:     [
128 // CHECK-COUNT-6:   [108]
129 // CHECK-SAME:     ],
130 // CHECK-NEXT:     [
131 // CHECK-COUNT-6:   [108]
132 // CHECK-SAME:     ],
133 // CHECK-NEXT:     [
134 // CHECK-COUNT-6:   [108]
135 // CHECK-SAME:     ],
136 // CHECK-NEXT:     [
137 // CHECK-COUNT-6:   [108]
138 // CHECK-SAME:     ]
139 // CHECK-SAME:    ],
140 // CHECK-NEXT:    [
141 // CHECK-SAME:     [
142 // CHECK-COUNT-6:   [108]
143 // CHECK-SAME:     ],
144 // CHECK-NEXT:     [
145 // CHECK-COUNT-6:   [108]
146 // CHECK-SAME:     ],
147 // CHECK-NEXT:     [
148 // CHECK-COUNT-6:   [108]
149 // CHECK-SAME:     ],
150 // CHECK-NEXT:     [
151 // CHECK-COUNT-6:   [108]
152 // CHECK-SAME:     ],
153 // CHECK-NEXT:     [
154 // CHECK-COUNT-6:   [108]
155 // CHECK-SAME:     ],
156 // CHECK-NEXT:     [
157 // CHECK-COUNT-6:   [108]
158 // CHECK-SAME:     ]
159 // CHECK-SAME:    ],
160 // CHECK-NEXT:    [
161 // CHECK-SAME:     [
162 // CHECK-COUNT-6:   [108]
163 // CHECK-SAME:     ],
164 // CHECK-NEXT:     [
165 // CHECK-COUNT-6:   [108]
166 // CHECK-SAME:     ],
167 // CHECK-NEXT:     [
168 // CHECK-COUNT-6:   [108]
169 // CHECK-SAME:     ],
170 // CHECK-NEXT:     [
171 // CHECK-COUNT-6:   [108]
172 // CHECK-SAME:     ],
173 // CHECK-NEXT:     [
174 // CHECK-COUNT-6:   [108]
175 // CHECK-SAME:     ],
176 // CHECK-NEXT:     [
177 // CHECK-COUNT-6:   [108]
178 // CHECK-SAME:     ]
179 // CHECK-SAME:    ]
180 // CHECK-SAME:   ]
181 // CHECK-SAME:  ]