flang/test/Lower/OpenACC/acc-serial-loop.f90

   1 ! This test checks lowering of Openacc serial loop combined directive.
   2
   3 ! RUN: bbc -fopenacc -emit-hlfir %s -o - | FileCheck %s
   4
   5 ! CHECK-LABEL: acc.private.recipe @privatization_ref_10xf32 : !fir.ref<!fir.array<10xf32>> init {
   6 ! CHECK: ^bb0(%{{.*}}: !fir.ref<!fir.array<10xf32>>):
   7 ! CHECK:   %[[SHAPE:.*]] = fir.shape %{{.*}} : (index) -> !fir.shape<1>
   8 ! CHECK:   %[[ALLOCA:.*]] = fir.alloca !fir.array<10xf32>
   9 ! CHECK:   %[[DECLARE:.*]]:2 = hlfir.declare %[[ALLOCA]](%[[SHAPE]]) {uniq_name = "acc.private.init"} : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>)
  10 ! CHECK:   acc.yield %[[DECLARE]]#0 : !fir.ref<!fir.array<10xf32>>
  11 ! CHECK: }
  12
  13 ! CHECK-LABEL: acc.firstprivate.recipe @firstprivatization_section_ext10_ref_10xf32 : !fir.ref<!fir.array<10xf32>> init {
  14 ! CHECK: ^bb0(%{{.*}}: !fir.ref<!fir.array<10xf32>>):
  15 ! CHECK:   %[[SHAPE:.*]] = fir.shape %{{.*}} : (index) -> !fir.shape<1>
  16 ! CHECK:   %[[ALLOCA:.*]] = fir.alloca !fir.array<10xf32>
  17 ! CHECK:   %[[DECLARE:.*]]:2 = hlfir.declare %[[ALLOCA]](%[[SHAPE]]) {uniq_name = "acc.private.init"} : (!fir.ref<!fir.array<10xf32>>, !fir.shape<1>) -> (!fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>)
  18 ! CHECK:   acc.yield %[[DECLARE]]#0 : !fir.ref<!fir.array<10xf32>>
  19 ! CHECK: } copy {
  20 ! CHECK:  ^bb0(%arg0: !fir.ref<!fir.array<10xf32>>, %arg1: !fir.ref<!fir.array<10xf32>>):
  21 ! CHECK:   acc.terminator
  22 ! CHECK: }
  23
  24 ! CHECK-LABEL: func.func @_QPacc_serial_loop()
  25
  26 subroutine acc_serial_loop
  27   integer :: i, j
  28
  29   integer :: async = 1
  30   integer :: wait1 = 1
  31   integer :: wait2 = 2
  32   integer :: numGangs = 1
  33   integer :: numWorkers = 10
  34   integer :: vectorLength = 128
  35   logical :: ifCondition = .TRUE.
  36   integer, parameter :: n = 10
  37   real, dimension(n) :: a, b, c
  38   real, dimension(n, n) :: d, e
  39   real, pointer :: f, g
  40   integer :: reduction_i
  41   real :: reduction_r
  42
  43   integer :: gangNum = 8
  44   integer :: gangStatic = 8
  45   integer :: vectorNum = 128
  46   integer, parameter :: tileSize = 2
  47
  48 ! CHECK: %[[A:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
  49 ! CHECK: %[[DECLA:.*]]:2 = hlfir.declare %[[A]]
  50 ! CHECK: %[[B:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
  51 ! CHECK: %[[DECLB:.*]]:2 = hlfir.declare %[[B]]
  52 ! CHECK: %[[C:.*]] = fir.alloca !fir.array<10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
  53 ! CHECK: %[[DECLC:.*]]:2 = hlfir.declare %[[C]]
  54 ! CHECK: %[[F:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "f", uniq_name = "{{.*}}Ef"}
  55 ! CHECK: %[[DECLF:.*]]:2 = hlfir.declare %[[F]]
  56 ! CHECK: %[[G:.*]] = fir.alloca !fir.box<!fir.ptr<f32>> {bindc_name = "g", uniq_name = "{{.*}}Eg"}
  57 ! CHECK: %[[DECLG:.*]]:2 = hlfir.declare %[[G]]
  58 ! CHECK: %[[IFCONDITION:.*]] = fir.address_of(@{{.*}}ifcondition) : !fir.ref<!fir.logical<4>>
  59 ! CHECK: %[[DECLIFCONDITION:.*]]:2 = hlfir.declare %[[IFCONDITION]]
  60
  61   !$acc serial loop
  62   DO i = 1, n
  63     a(i) = b(i)
  64   END DO
  65
  66 ! CHECK:      acc.serial {
  67 ! CHECK:        acc.loop {
  68 ! CHECK:          fir.do_loop
  69 ! CHECK:          acc.yield
  70 ! CHECK-NEXT:   }{{$}}
  71 ! CHECK:        acc.yield
  72 ! CHECK-NEXT: }{{$}}
  73
  74   !$acc serial loop async
  75   DO i = 1, n
  76     a(i) = b(i)
  77   END DO
  78   !$acc end serial loop
  79
  80 ! CHECK:      acc.serial {
  81 ! CHECK:        acc.loop {
  82 ! CHECK:          fir.do_loop
  83 ! CHECK:          acc.yield
  84 ! CHECK-NEXT:   }{{$}}
  85 ! CHECK:        acc.yield
  86 ! CHECK-NEXT: } attributes {asyncAttr}
  87
  88   !$acc serial loop async(1)
  89   DO i = 1, n
  90     a(i) = b(i)
  91   END DO
  92
  93 ! CHECK:      [[ASYNC1:%.*]] = arith.constant 1 : i32
  94 ! CHECK:      acc.serial async([[ASYNC1]] : i32) {
  95 ! CHECK:        acc.loop {
  96 ! CHECK:          fir.do_loop
  97 ! CHECK:          acc.yield
  98 ! CHECK-NEXT:   }{{$}}
  99 ! CHECK:        acc.yield
 100 ! CHECK-NEXT: }{{$}}
 101
 102   !$acc serial loop async(async)
 103   DO i = 1, n
 104     a(i) = b(i)
 105   END DO
 106
 107 ! CHECK:      [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
 108 ! CHECK:      acc.serial async([[ASYNC2]] : i32) {
 109 ! CHECK:        acc.loop {
 110 ! CHECK:          fir.do_loop
 111 ! CHECK:          acc.yield
 112 ! CHECK-NEXT:   }{{$}}
 113 ! CHECK:        acc.yield
 114 ! CHECK-NEXT: }{{$}}
 115
 116   !$acc serial loop wait
 117   DO i = 1, n
 118     a(i) = b(i)
 119   END DO
 120
 121 ! CHECK:      acc.serial {
 122 ! CHECK:        acc.loop {
 123 ! CHECK:          fir.do_loop
 124 ! CHECK:          acc.yield
 125 ! CHECK-NEXT:   }{{$}}
 126 ! CHECK:        acc.yield
 127 ! CHECK-NEXT: } attributes {waitAttr}
 128
 129   !$acc serial loop wait(1)
 130   DO i = 1, n
 131     a(i) = b(i)
 132   END DO
 133
 134 ! CHECK:      [[WAIT1:%.*]] = arith.constant 1 : i32
 135 ! CHECK:      acc.serial wait([[WAIT1]] : i32) {
 136 ! CHECK:        acc.loop {
 137 ! CHECK:          fir.do_loop
 138 ! CHECK:          acc.yield
 139 ! CHECK-NEXT:   }{{$}}
 140 ! CHECK:        acc.yield
 141 ! CHECK-NEXT: }{{$}}
 142
 143   !$acc serial loop wait(1, 2)
 144   DO i = 1, n
 145     a(i) = b(i)
 146   END DO
 147
 148 ! CHECK:      [[WAIT2:%.*]] = arith.constant 1 : i32
 149 ! CHECK:      [[WAIT3:%.*]] = arith.constant 2 : i32
 150 ! CHECK:      acc.serial wait([[WAIT2]], [[WAIT3]] : i32, i32) {
 151 ! CHECK:        acc.loop {
 152 ! CHECK:          fir.do_loop
 153 ! CHECK:          acc.yield
 154 ! CHECK-NEXT:   }{{$}}
 155 ! CHECK:        acc.yield
 156 ! CHECK-NEXT: }{{$}}
 157
 158   !$acc serial loop wait(wait1, wait2)
 159   DO i = 1, n
 160     a(i) = b(i)
 161   END DO
 162
 163 ! CHECK:      [[WAIT4:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
 164 ! CHECK:      [[WAIT5:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
 165 ! CHECK:      acc.serial wait([[WAIT4]], [[WAIT5]] : i32, i32) {
 166 ! CHECK:        acc.loop {
 167 ! CHECK:          fir.do_loop
 168 ! CHECK:          acc.yield
 169 ! CHECK-NEXT:   }{{$}}
 170 ! CHECK:        acc.yield
 171 ! CHECK-NEXT: }{{$}}
 172
 173   !$acc serial loop if(.TRUE.)
 174   DO i = 1, n
 175     a(i) = b(i)
 176   END DO
 177
 178 ! CHECK:      [[IF1:%.*]] = arith.constant true
 179 ! CHECK:      acc.serial if([[IF1]]) {
 180 ! CHECK:        acc.loop {
 181 ! CHECK:          fir.do_loop
 182 ! CHECK:          acc.yield
 183 ! CHECK-NEXT:   }{{$}}
 184 ! CHECK:        acc.yield
 185 ! CHECK-NEXT: }{{$}}
 186
 187   !$acc serial loop if(ifCondition)
 188   DO i = 1, n
 189     a(i) = b(i)
 190   END DO
 191
 192 ! CHECK:      [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
 193 ! CHECK:      [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
 194 ! CHECK:      acc.serial if([[IF2]]) {
 195 ! CHECK:        acc.loop {
 196 ! CHECK:          fir.do_loop
 197 ! CHECK:          acc.yield
 198 ! CHECK-NEXT:   }{{$}}
 199 ! CHECK:        acc.yield
 200 ! CHECK-NEXT: }{{$}}
 201
 202   !$acc serial loop self(.TRUE.)
 203   DO i = 1, n
 204     a(i) = b(i)
 205   END DO
 206
 207 ! CHECK:      [[SELF1:%.*]] = arith.constant true
 208 ! CHECK:      acc.serial self([[SELF1]]) {
 209 ! CHECK:        acc.loop {
 210 ! CHECK:          fir.do_loop
 211 ! CHECK:          acc.yield
 212 ! CHECK-NEXT:   }{{$}}
 213 ! CHECK:        acc.yield
 214 ! CHECK-NEXT: }{{$}}
 215
 216   !$acc serial loop self
 217   DO i = 1, n
 218     a(i) = b(i)
 219   END DO
 220
 221 ! CHECK:      acc.serial {
 222 ! CHECK:        acc.loop {
 223 ! CHECK:          fir.do_loop
 224 ! CHECK:          acc.yield
 225 ! CHECK-NEXT:   }{{$}}
 226 ! CHECK:        acc.yield
 227 ! CHECK-NEXT: } attributes {selfAttr}
 228
 229   !$acc serial loop self(ifCondition)
 230   DO i = 1, n
 231     a(i) = b(i)
 232   END DO
 233
 234 ! CHECK:      %[[SELF2:.*]] = fir.convert %[[DECLIFCONDITION]]#1 : (!fir.ref<!fir.logical<4>>) -> i1
 235 ! CHECK:      acc.serial self(%[[SELF2]]) {
 236 ! CHECK:        acc.loop {
 237 ! CHECK:          fir.do_loop
 238 ! CHECK:          acc.yield
 239 ! CHECK-NEXT:   }{{$}}
 240 ! CHECK:        acc.yield
 241 ! CHECK-NEXT: }{{$}}
 242
 243   !$acc serial loop copy(a, b)
 244   DO i = 1, n
 245     a(i) = b(i)
 246   END DO
 247
 248 ! CHECK:      %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
 249 ! CHECK:      %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
 250 ! CHECK:      acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 251 ! CHECK:        acc.loop {
 252 ! CHECK:          fir.do_loop
 253 ! CHECK:          acc.yield
 254 ! CHECK-NEXT:   }{{$}}
 255 ! CHECK:        acc.yield
 256 ! CHECK-NEXT: }{{$}}
 257 ! CHECK:      acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "a"}
 258 ! CHECK:      acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "b"}
 259
 260   !$acc serial loop copy(a) copy(b)
 261   DO i = 1, n
 262     a(i) = b(i)
 263   END DO
 264
 265 ! CHECK:      %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "a"}
 266 ! CHECK:      %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
 267 ! CHECK:      acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 268 ! CHECK:        acc.loop {
 269 ! CHECK:          fir.do_loop
 270 ! CHECK:          acc.yield
 271 ! CHECK-NEXT:   }{{$}}
 272 ! CHECK:        acc.yield
 273 ! CHECK-NEXT: }{{$}}
 274 ! CHECK:      acc.copyout accPtr(%[[COPYIN_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "a"}
 275 ! CHECK:      acc.copyout accPtr(%[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) {dataClause = #acc<data_clause acc_copy>, name = "b"}
 276
 277   !$acc serial loop copyin(a) copyin(readonly: b)
 278   DO i = 1, n
 279     a(i) = b(i)
 280   END DO
 281
 282 ! CHECK:      %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
 283 ! CHECK:      %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyin_readonly>, name = "b"}
 284 ! CHECK:      acc.serial dataOperands(%[[COPYIN_A]], %[[COPYIN_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 285 ! CHECK:        acc.loop {
 286 ! CHECK:          fir.do_loop
 287 ! CHECK:          acc.yield
 288 ! CHECK-NEXT:   }{{$}}
 289 ! CHECK:        acc.yield
 290 ! CHECK-NEXT: }{{$}}
 291
 292   !$acc serial loop copyout(a) copyout(zero: b)
 293   DO i = 1, n
 294     a(i) = b(i)
 295   END DO
 296
 297 ! CHECK:      %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "a"}
 298 ! CHECK:      %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_copyout>, name = "b"}
 299 ! CHECK:      acc.serial dataOperands(%[[CREATE_A]], %[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 300 ! CHECK:        acc.loop {
 301 ! CHECK:          fir.do_loop
 302 ! CHECK:          acc.yield
 303 ! CHECK-NEXT:   }{{$}}
 304 ! CHECK:        acc.yield
 305 ! CHECK-NEXT: }{{$}}
 306 ! CHECK:      acc.copyout accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) {name = "a"}
 307 ! CHECK:      acc.copyout accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) to varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) {name = "b"}
 308
 309   !$acc serial loop create(b) create(zero: a)
 310   DO i = 1, n
 311     a(i) = b(i)
 312   END DO
 313
 314 ! CHECK:      %[[CREATE_B:.*]] = acc.create varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
 315 ! CHECK:      %[[CREATE_A:.*]] = acc.create varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {dataClause = #acc<data_clause acc_create_zero>, name = "a"}
 316 ! CHECK:      acc.serial dataOperands(%[[CREATE_B]], %[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 317 ! CHECK:        acc.loop {
 318 ! CHECK:          fir.do_loop
 319 ! CHECK:          acc.yield
 320 ! CHECK-NEXT:   }{{$}}
 321 ! CHECK:        acc.yield
 322 ! CHECK-NEXT: }{{$}}
 323 ! CHECK:      acc.delete accPtr(%[[CREATE_B]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = #acc<data_clause acc_create>, name = "b"}
 324 ! CHECK:      acc.delete accPtr(%[[CREATE_A]] : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) {dataClause = #acc<data_clause acc_create_zero>, name = "a"}
 325
 326   !$acc serial loop no_create(a, b)
 327   DO i = 1, n
 328     a(i) = b(i)
 329   END DO
 330
 331 ! CHECK:      %[[NOCREATE_A:.*]] = acc.nocreate varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
 332 ! CHECK:      %[[NOCREATE_B:.*]] = acc.nocreate varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
 333 ! CHECK:      acc.serial dataOperands(%[[NOCREATE_A]], %[[NOCREATE_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 334 ! CHECK:        acc.loop {
 335 ! CHECK:          fir.do_loop
 336 ! CHECK:          acc.yield
 337 ! CHECK-NEXT:   }{{$}}
 338 ! CHECK:        acc.yield
 339 ! CHECK-NEXT: }{{$}}
 340
 341   !$acc serial loop present(a, b)
 342   DO i = 1, n
 343     a(i) = b(i)
 344   END DO
 345
 346 ! CHECK:      %[[PRESENT_A:.*]] = acc.present varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
 347 ! CHECK:      %[[PRESENT_B:.*]] = acc.present varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
 348 ! CHECK:      acc.serial dataOperands(%[[PRESENT_A]], %[[PRESENT_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 349 ! CHECK:        acc.loop {
 350 ! CHECK:          fir.do_loop
 351 ! CHECK:          acc.yield
 352 ! CHECK-NEXT:   }{{$}}
 353 ! CHECK:        acc.yield
 354 ! CHECK-NEXT: }{{$}}
 355
 356   !$acc serial loop deviceptr(a) deviceptr(b)
 357   DO i = 1, n
 358     a(i) = b(i)
 359   END DO
 360
 361 ! CHECK:      %[[DEVICEPTR_A:.*]] = acc.deviceptr varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
 362 ! CHECK:      %[[DEVICEPTR_B:.*]] = acc.deviceptr varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
 363 ! CHECK:      acc.serial dataOperands(%[[DEVICEPTR_A]], %[[DEVICEPTR_B]] : !fir.ref<!fir.array<10xf32>>, !fir.ref<!fir.array<10xf32>>) {
 364 ! CHECK:        acc.loop {
 365 ! CHECK:          fir.do_loop
 366 ! CHECK:          acc.yield
 367 ! CHECK-NEXT:   }{{$}}
 368 ! CHECK:        acc.yield
 369 ! CHECK-NEXT: }{{$}}
 370
 371   !$acc serial loop attach(f, g)
 372   DO i = 1, n
 373     a(i) = b(i)
 374   END DO
 375
 376 ! CHECK:      %[[BOX_F:.*]] = fir.load %[[DECLF]]#1 : !fir.ref<!fir.box<!fir.ptr<f32>>>
 377 ! CHECK:      %[[BOX_ADDR_F:.*]] = fir.box_addr %[[BOX_F]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
 378 ! CHECK:      %[[ATTACH_F:.*]] = acc.attach varPtr(%[[BOX_ADDR_F]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "f"}
 379 ! CHECK:      %[[BOX_G:.*]] = fir.load %[[DECLG]]#1 : !fir.ref<!fir.box<!fir.ptr<f32>>>
 380 ! CHECK:      %[[BOX_ADDR_G:.*]] = fir.box_addr %[[BOX_G]] : (!fir.box<!fir.ptr<f32>>) -> !fir.ptr<f32>
 381 ! CHECK:      %[[ATTACH_G:.*]] = acc.attach varPtr(%[[BOX_ADDR_G]] : !fir.ptr<f32>) -> !fir.ptr<f32> {name = "g"}
 382 ! CHECK:      acc.serial dataOperands(%[[ATTACH_F]], %[[ATTACH_G]] : !fir.ptr<f32>, !fir.ptr<f32>) {
 383 ! CHECK:        acc.loop {
 384 ! CHECK:          fir.do_loop
 385 ! CHECK:          acc.yield
 386 ! CHECK-NEXT:   }{{$}}
 387 ! CHECK:        acc.yield
 388 ! CHECK-NEXT: }{{$}}
 389
 390   !$acc serial loop private(a) firstprivate(b)
 391   DO i = 1, n
 392     a(i) = b(i)
 393   END DO
 394
 395 ! CHECK:      %[[ACC_FPRIVATE_B:.*]] = acc.firstprivate varPtr(%[[DECLB]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "b"}
 396 ! CHECK:      acc.serial firstprivate(@firstprivatization_section_ext10_ref_10xf32 -> %[[ACC_FPRIVATE_B]] : !fir.ref<!fir.array<10xf32>>) {
 397 ! CHECK:      %[[ACC_PRIVATE_A:.*]] = acc.private varPtr(%[[DECLA]]#1 : !fir.ref<!fir.array<10xf32>>) bounds(%{{.*}}) -> !fir.ref<!fir.array<10xf32>> {name = "a"}
 398 ! CHECK:        acc.loop private(@privatization_ref_10xf32 -> %[[ACC_PRIVATE_A]] : !fir.ref<!fir.array<10xf32>>) {
 399 ! CHECK:          fir.do_loop
 400 ! CHECK:          acc.yield
 401 ! CHECK-NEXT:   }{{$}}
 402 ! CHECK:        acc.yield
 403 ! CHECK-NEXT: }{{$}}
 404
 405   !$acc serial loop seq
 406   DO i = 1, n
 407     a(i) = b(i)
 408   END DO
 409
 410 ! CHECK:      acc.serial {
 411 ! CHECK:        acc.loop {
 412 ! CHECK:          fir.do_loop
 413 ! CHECK:          acc.yield
 414 ! CHECK-NEXT:   } attributes {seq}
 415 ! CHECK:        acc.yield
 416 ! CHECK-NEXT: }{{$}}
 417
 418   !$acc serial loop auto
 419   DO i = 1, n
 420     a(i) = b(i)
 421   END DO
 422
 423 ! CHECK:      acc.serial {
 424 ! CHECK:        acc.loop {
 425 ! CHECK:          fir.do_loop
 426 ! CHECK:          acc.yield
 427 ! CHECK-NEXT:   } attributes {auto}
 428 ! CHECK:        acc.yield
 429 ! CHECK-NEXT: }{{$}}
 430
 431   !$acc serial loop independent
 432   DO i = 1, n
 433     a(i) = b(i)
 434   END DO
 435
 436 ! CHECK:      acc.serial {
 437 ! CHECK:        acc.loop {
 438 ! CHECK:          fir.do_loop
 439 ! CHECK:          acc.yield
 440 ! CHECK-NEXT:   } attributes {independent}
 441 ! CHECK:        acc.yield
 442 ! CHECK-NEXT: }{{$}}
 443
 444   !$acc serial loop gang
 445   DO i = 1, n
 446     a(i) = b(i)
 447   END DO
 448
 449 ! CHECK:      acc.serial {
 450 ! CHECK:        acc.loop gang {
 451 ! CHECK:          fir.do_loop
 452 ! CHECK:          acc.yield
 453 ! CHECK-NEXT:   }{{$}}
 454 ! CHECK:        acc.yield
 455 ! CHECK-NEXT: }{{$}}
 456
 457   !$acc serial loop gang(num: 8)
 458   DO i = 1, n
 459     a(i) = b(i)
 460   END DO
 461
 462 ! CHECK:      acc.serial {
 463 ! CHECK:        [[GANGNUM1:%.*]] = arith.constant 8 : i32
 464 ! CHECK-NEXT:   acc.loop gang(num=[[GANGNUM1]] : i32) {
 465 ! CHECK:          fir.do_loop
 466 ! CHECK:          acc.yield
 467 ! CHECK-NEXT:   }{{$}}
 468 ! CHECK:        acc.yield
 469 ! CHECK-NEXT: }{{$}}
 470
 471   !$acc serial loop gang(num: gangNum)
 472   DO i = 1, n
 473     a(i) = b(i)
 474   END DO
 475
 476 ! CHECK:      acc.serial {
 477 ! CHECK:        [[GANGNUM2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
 478 ! CHECK-NEXT:   acc.loop gang(num=[[GANGNUM2]] : i32) {
 479 ! CHECK:          fir.do_loop
 480 ! CHECK:          acc.yield
 481 ! CHECK-NEXT:   }{{$}}
 482 ! CHECK:        acc.yield
 483 ! CHECK-NEXT: }{{$}}
 484
 485  !$acc serial loop gang(num: gangNum, static: gangStatic)
 486   DO i = 1, n
 487     a(i) = b(i)
 488   END DO
 489
 490 ! CHECK:      acc.serial {
 491 ! CHECK:        acc.loop gang(num=%{{.*}} : i32, static=%{{.*}} : i32) {
 492 ! CHECK:          fir.do_loop
 493 ! CHECK:          acc.yield
 494 ! CHECK-NEXT:   }{{$}}
 495 ! CHECK:        acc.yield
 496 ! CHECK-NEXT: }{{$}}
 497
 498   !$acc serial loop vector
 499   DO i = 1, n
 500     a(i) = b(i)
 501   END DO
 502 ! CHECK:      acc.serial {
 503 ! CHECK:        acc.loop vector {
 504 ! CHECK:          fir.do_loop
 505 ! CHECK:          acc.yield
 506 ! CHECK-NEXT:   }{{$}}
 507 ! CHECK:        acc.yield
 508 ! CHECK-NEXT: }{{$}}
 509
 510   !$acc serial loop vector(128)
 511   DO i = 1, n
 512     a(i) = b(i)
 513   END DO
 514
 515 ! CHECK:      acc.serial {
 516 ! CHECK:        [[CONSTANT128:%.*]] = arith.constant 128 : i32
 517 ! CHECK:        acc.loop vector([[CONSTANT128]] : i32) {
 518 ! CHECK:          fir.do_loop
 519 ! CHECK:          acc.yield
 520 ! CHECK-NEXT:   }{{$}}
 521 ! CHECK:        acc.yield
 522 ! CHECK-NEXT: }{{$}}
 523
 524   !$acc serial loop vector(vectorLength)
 525   DO i = 1, n
 526     a(i) = b(i)
 527   END DO
 528
 529 ! CHECK:      acc.serial {
 530 ! CHECK:        [[VECTORLENGTH:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
 531 ! CHECK:        acc.loop vector([[VECTORLENGTH]] : i32) {
 532 ! CHECK:          fir.do_loop
 533 ! CHECK:          acc.yield
 534 ! CHECK-NEXT:   }{{$}}
 535 ! CHECK:        acc.yield
 536 ! CHECK-NEXT: }{{$}}
 537
 538   !$acc serial loop worker
 539   DO i = 1, n
 540     a(i) = b(i)
 541   END DO
 542
 543 ! CHECK:      acc.serial {
 544 ! CHECK:        acc.loop worker {
 545 ! CHECK:          fir.do_loop
 546 ! CHECK:          acc.yield
 547 ! CHECK-NEXT:   }{{$}}
 548 ! CHECK:        acc.yield
 549 ! CHECK-NEXT: }{{$}}
 550
 551   !$acc serial loop worker(128)
 552   DO i = 1, n
 553     a(i) = b(i)
 554   END DO
 555
 556 ! CHECK:      acc.serial {
 557 ! CHECK:        [[WORKER128:%.*]] = arith.constant 128 : i32
 558 ! CHECK:        acc.loop worker([[WORKER128]] : i32) {
 559 ! CHECK:          fir.do_loop
 560 ! CHECK:          acc.yield
 561 ! CHECK-NEXT:   }{{$}}
 562 ! CHECK:        acc.yield
 563 ! CHECK-NEXT: }{{$}}
 564
 565   !$acc serial loop collapse(2)
 566   DO i = 1, n
 567     DO j = 1, n
 568       d(i, j) = e(i, j)
 569     END DO
 570   END DO
 571
 572 ! CHECK:      acc.serial {
 573 ! CHECK:        acc.loop {
 574 ! CHECK:          fir.do_loop
 575 ! CHECK:            fir.do_loop
 576 ! CHECK:          acc.yield
 577 ! CHECK-NEXT:   } attributes {collapse = 2 : i64}
 578 ! CHECK:        acc.yield
 579 ! CHECK-NEXT: }{{$}}
 580
 581   !$acc serial loop
 582   DO i = 1, n
 583     !$acc loop
 584     DO j = 1, n
 585       d(i, j) = e(i, j)
 586     END DO
 587   END DO
 588
 589 ! CHECK:      acc.serial {
 590 ! CHECK:        acc.loop {
 591 ! CHECK:          fir.do_loop
 592 ! CHECK:            acc.loop {
 593 ! CHECK:              fir.do_loop
 594 ! CHECK:              acc.yield
 595 ! CHECK-NEXT:     }{{$}}
 596 ! CHECK:          acc.yield
 597 ! CHECK-NEXT:   }{{$}}
 598 ! CHECK:        acc.yield
 599 ! CHECK-NEXT: }{{$}}
 600
 601  !$acc serial loop tile(2)
 602   DO i = 1, n
 603     a(i) = b(i)
 604   END DO
 605
 606 ! CHECK:      acc.serial {
 607 ! CHECK:        [[TILESIZE:%.*]] = arith.constant 2 : i32
 608 ! CHECK:        acc.loop tile([[TILESIZE]] : i32) {
 609 ! CHECK:          fir.do_loop
 610 ! CHECK:          acc.yield
 611 ! CHECK-NEXT:   }{{$}}
 612 ! CHECK:        acc.yield
 613 ! CHECK-NEXT: }{{$}}
 614
 615  !$acc serial loop tile(*)
 616   DO i = 1, n
 617     a(i) = b(i)
 618   END DO
 619
 620 ! CHECK:      acc.serial {
 621 ! CHECK:        [[TILESIZEM1:%.*]] = arith.constant -1 : i32
 622 ! CHECK:        acc.loop tile([[TILESIZEM1]] : i32) {
 623 ! CHECK:          fir.do_loop
 624 ! CHECK:          acc.yield
 625 ! CHECK-NEXT:   }{{$}}
 626 ! CHECK:        acc.yield
 627 ! CHECK-NEXT: }{{$}}
 628
 629   !$acc serial loop tile(2, 2)
 630   DO i = 1, n
 631     DO j = 1, n
 632       d(i, j) = e(i, j)
 633     END DO
 634   END DO
 635
 636 ! CHECK:      acc.serial {
 637 ! CHECK:        [[TILESIZE1:%.*]] = arith.constant 2 : i32
 638 ! CHECK:        [[TILESIZE2:%.*]] = arith.constant 2 : i32
 639 ! CHECK:        acc.loop tile([[TILESIZE1]], [[TILESIZE2]] : i32, i32) {
 640 ! CHECK:          fir.do_loop
 641 ! CHECK:          acc.yield
 642 ! CHECK-NEXT:   }{{$}}
 643 ! CHECK:        acc.yield
 644 ! CHECK-NEXT: }{{$}}
 645
 646   !$acc serial loop tile(tileSize)
 647   DO i = 1, n
 648     a(i) = b(i)
 649   END DO
 650
 651 ! CHECK:      acc.serial {
 652 ! CHECK:        acc.loop tile(%{{.*}} : i32) {
 653 ! CHECK:          fir.do_loop
 654 ! CHECK:          acc.yield
 655 ! CHECK-NEXT:   }{{$}}
 656 ! CHECK:        acc.yield
 657 ! CHECK-NEXT: }{{$}}
 658
 659   !$acc serial loop tile(tileSize, tileSize)
 660   DO i = 1, n
 661     DO j = 1, n
 662       d(i, j) = e(i, j)
 663     END DO
 664   END DO
 665
 666 ! CHECK:      acc.serial {
 667 ! CHECK:        acc.loop tile(%{{.*}}, %{{.*}} : i32, i32) {
 668 ! CHECK:          fir.do_loop
 669 ! CHECK:          acc.yield
 670 ! CHECK-NEXT:   }{{$}}
 671 ! CHECK:        acc.yield
 672 ! CHECK-NEXT: }{{$}}
 673
 674   !$acc serial loop reduction(+:reduction_r) reduction(*:reduction_i)
 675   do i = 1, n
 676     reduction_r = reduction_r + a(i)
 677     reduction_i = 1
 678   end do
 679
 680 ! CHECK:      %[[COPYINREDR:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<f32>) -> !fir.ref<f32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"}
 681 ! CHECK:      %[[COPYINREDI:.*]] = acc.copyin varPtr(%{{.*}} : !fir.ref<i32>) -> !fir.ref<i32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"}
 682 ! CHECK:      acc.serial dataOperands(%[[COPYINREDR]], %[[COPYINREDI]] : !fir.ref<f32>, !fir.ref<i32>) {
 683 ! CHECK:        acc.loop reduction(@reduction_add_ref_f32 -> %{{.*}} : !fir.ref<f32>, @reduction_mul_ref_i32 -> %{{.*}} : !fir.ref<i32>) {
 684 ! CHECK:          fir.do_loop
 685 ! CHECK:          acc.yield
 686 ! CHECK-NEXT:   }{{$}}
 687 ! CHECK:        acc.yield
 688 ! CHECK-NEXT: }{{$}}
 689 ! CHECK:      acc.copyout accPtr(%[[COPYINREDR]] : !fir.ref<f32>) to varPtr(%{{.*}} : !fir.ref<f32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_r"}
 690 ! CHECK:      acc.copyout accPtr(%[[COPYINREDI]] : !fir.ref<i32>) to varPtr(%{{.*}} : !fir.ref<i32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "reduction_i"}
 691
 692 end subroutine acc_serial_loop