[AMDGPU] Test codegen'ing True16 additions.
[llvm-project.git] / llvm / lib / Support / RISCVAttributes.cpp
blob9e629760d3d8428cc203e381f3b3094d950c2d2f
1 //===-- RISCVAttributes.cpp - RISCV Attributes ----------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "llvm/Support/RISCVAttributes.h"
11 using namespace llvm;
12 using namespace llvm::RISCVAttrs;
14 static constexpr TagNameItem tagData[] = {
15 {STACK_ALIGN, "Tag_stack_align"},
16 {ARCH, "Tag_arch"},
17 {UNALIGNED_ACCESS, "Tag_unaligned_access"},
18 {PRIV_SPEC, "Tag_priv_spec"},
19 {PRIV_SPEC_MINOR, "Tag_priv_spec_minor"},
20 {PRIV_SPEC_REVISION, "Tag_priv_spec_revision"},
23 constexpr TagNameMap RISCVAttributeTags{tagData};
24 const TagNameMap &llvm::RISCVAttrs::getRISCVAttributeTags() {
25 return RISCVAttributeTags;