llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h

   1 //=- LoongArchISelDAGToDAG.h - A dag to dag inst selector for LoongArch ---===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file defines an instruction selector for the LoongArch target.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
  14 #define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
  15
  16 #include "LoongArch.h"
  17 #include "LoongArchTargetMachine.h"
  18 #include "llvm/CodeGen/SelectionDAGISel.h"
  19
  20 // LoongArch-specific code to select LoongArch machine instructions for
  21 // SelectionDAG operations.
  22 namespace llvm {
  23 class LoongArchDAGToDAGISel : public SelectionDAGISel {
  24   const LoongArchSubtarget *Subtarget = nullptr;
  25
  26 public:
  27   static char ID;
  28
  29   LoongArchDAGToDAGISel() = delete;
  30
  31   explicit LoongArchDAGToDAGISel(LoongArchTargetMachine &TM)
  32       : SelectionDAGISel(ID, TM) {}
  33
  34   bool runOnMachineFunction(MachineFunction &MF) override {
  35     Subtarget = &MF.getSubtarget<LoongArchSubtarget>();
  36     return SelectionDAGISel::runOnMachineFunction(MF);
  37   }
  38
  39   void Select(SDNode *Node) override;
  40
  41   bool SelectInlineAsmMemoryOperand(const SDValue &Op,
  42                                     InlineAsm::ConstraintCode ConstraintID,
  43                                     std::vector<SDValue> &OutOps) override;
  44
  45   bool SelectBaseAddr(SDValue Addr, SDValue &Base);
  46   bool SelectAddrConstant(SDValue Addr, SDValue &Base, SDValue &Offset);
  47   bool selectNonFIBaseAddr(SDValue Addr, SDValue &Base);
  48
  49   bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
  50   bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt) {
  51     return selectShiftMask(N, Subtarget->getGRLen(), ShAmt);
  52   }
  53   bool selectShiftMask32(SDValue N, SDValue &ShAmt) {
  54     return selectShiftMask(N, 32, ShAmt);
  55   }
  56
  57   bool selectSExti32(SDValue N, SDValue &Val);
  58   bool selectZExti32(SDValue N, SDValue &Val);
  59
  60   bool selectVSplat(SDNode *N, APInt &Imm, unsigned MinSizeInBits) const;
  61
  62   template <unsigned ImmSize, bool IsSigned = false>
  63   bool selectVSplatImm(SDValue N, SDValue &SplatVal);
  64
  65   bool selectVSplatUimmInvPow2(SDValue N, SDValue &SplatImm) const;
  66   bool selectVSplatUimmPow2(SDValue N, SDValue &SplatImm) const;
  67
  68 // Include the pieces autogenerated from the target description.
  69 #include "LoongArchGenDAGISel.inc"
  70 };
  71
  72 } // end namespace llvm
  73
  74 #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H