1 //===-- SPIRVISelLowering.h - SPIR-V DAG Lowering Interface -----*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the interfaces that SPIR-V uses to lower LLVM code into a
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H
15 #define LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H
17 #include "llvm/CodeGen/TargetLowering.h"
22 class SPIRVTargetLowering
: public TargetLowering
{
24 explicit SPIRVTargetLowering(const TargetMachine
&TM
,
25 const SPIRVSubtarget
&STI
)
26 : TargetLowering(TM
) {}
28 // Stop IRTranslator breaking up FMA instrs to preserve types information.
29 bool isFMAFasterThanFMulAndFAdd(const MachineFunction
&MF
,
34 // This is to prevent sexts of non-i64 vector indices which are generated
35 // within general IRTranslator hence type generation for it is omitted.
36 MVT
getVectorIdxTy(const DataLayout
&DL
) const override
{
37 return MVT::getIntegerVT(32);
39 unsigned getNumRegistersForCallingConv(LLVMContext
&Context
,
41 EVT VT
) const override
;
42 MVT
getRegisterTypeForCallingConv(LLVMContext
&Context
, CallingConv::ID CC
,
43 EVT VT
) const override
;
44 bool getTgtMemIntrinsic(IntrinsicInfo
&Info
, const CallInst
&I
,
46 unsigned Intrinsic
) const override
;
50 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H