clang/test/CodeGen/X86/rdrand-builtins.c

   1 // RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-unknown-unknown -target-feature +rdrnd -target-feature +rdseed -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK,X64
   2 // RUN: %clang_cc1 -ffreestanding %s -triple=i386-unknown-unknown -target-feature +rdrnd -target-feature +rdseed -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK,X86
   3
   4 #include <immintrin.h>
   5
   6 int rdrand16(unsigned short *p) {
   7   return _rdrand16_step(p);
   8 // CHECK: @rdrand16
   9 // CHECK: call { i16, i32 } @llvm.x86.rdrand.16
  10 // CHECK: store i16
  11 }
  12
  13 int rdrand32(unsigned *p) {
  14   return _rdrand32_step(p);
  15 // CHECK: @rdrand32
  16 // CHECK: call { i32, i32 } @llvm.x86.rdrand.32
  17 // CHECK: store i32
  18 }
  19
  20 int rdrand64(unsigned long long *p) {
  21   return _rdrand64_step(p);
  22 // X64: @rdrand64
  23 // X64: call { i64, i32 } @llvm.x86.rdrand.64
  24 // X64: store i64
  25
  26 // X86-LABEL: @rdrand64(
  27 // X86-NEXT:  entry:
  28 // X86-NEXT:    [[RETVAL_I:%.*]] = alloca i32, align 4
  29 // X86-NEXT:    [[__P_ADDR_I:%.*]] = alloca ptr, align 4
  30 // X86-NEXT:    [[__LO_I:%.*]] = alloca i32, align 4
  31 // X86-NEXT:    [[__HI_I:%.*]] = alloca i32, align 4
  32 // X86-NEXT:    [[__RES_LO_I:%.*]] = alloca i32, align 4
  33 // X86-NEXT:    [[__RES_HI_I:%.*]] = alloca i32, align 4
  34 // X86-NEXT:    [[P_ADDR:%.*]] = alloca ptr, align 4
  35 // X86-NEXT:    store ptr [[P:%.*]], ptr [[P_ADDR]], align 4
  36 // X86-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[P_ADDR]], align 4
  37 // X86-NEXT:    store ptr [[TMP0]], ptr [[__P_ADDR_I]], align 4
  38 // X86-NEXT:    [[TMP1:%.*]] = call { i32, i32 } @llvm.x86.rdrand.32()
  39 // X86-NEXT:    [[TMP2:%.*]] = extractvalue { i32, i32 } [[TMP1]], 0
  40 // X86-NEXT:    store i32 [[TMP2]], ptr [[__LO_I]], align 4
  41 // X86-NEXT:    [[TMP3:%.*]] = extractvalue { i32, i32 } [[TMP1]], 1
  42 // X86-NEXT:    store i32 [[TMP3]], ptr [[__RES_LO_I]], align 4
  43 // X86-NEXT:    [[TMP4:%.*]] = call { i32, i32 } @llvm.x86.rdrand.32()
  44 // X86-NEXT:    [[TMP5:%.*]] = extractvalue { i32, i32 } [[TMP4]], 0
  45 // X86-NEXT:    store i32 [[TMP5]], ptr [[__HI_I]], align 4
  46 // X86-NEXT:    [[TMP6:%.*]] = extractvalue { i32, i32 } [[TMP4]], 1
  47 // X86-NEXT:    store i32 [[TMP6]], ptr [[__RES_HI_I]], align 4
  48 // X86-NEXT:    [[TMP7:%.*]] = load i32, ptr [[__RES_LO_I]], align 4
  49 // X86-NEXT:    [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP7]], 0
  50 // X86-NEXT:    br i1 [[TOBOOL_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[IF_ELSE_I:%.*]]
  51 // X86:       land.lhs.true.i:
  52 // X86-NEXT:    [[TMP8:%.*]] = load i32, ptr [[__RES_HI_I]], align 4
  53 // X86-NEXT:    [[TOBOOL1_I:%.*]] = icmp ne i32 [[TMP8]], 0
  54 // X86-NEXT:    br i1 [[TOBOOL1_I]], label [[IF_THEN_I:%.*]], label [[IF_ELSE_I]]
  55 // X86:       if.then.i:
  56 // X86-NEXT:    [[TMP9:%.*]] = load i32, ptr [[__HI_I]], align 4
  57 // X86-NEXT:    [[CONV_I:%.*]] = zext i32 [[TMP9]] to i64
  58 // X86-NEXT:    [[SHL_I:%.*]] = shl i64 [[CONV_I]], 32
  59 // X86-NEXT:    [[TMP10:%.*]] = load i32, ptr [[__LO_I]], align 4
  60 // X86-NEXT:    [[CONV2_I:%.*]] = zext i32 [[TMP10]] to i64
  61 // X86-NEXT:    [[OR_I:%.*]] = or i64 [[SHL_I]], [[CONV2_I]]
  62 // X86-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[__P_ADDR_I]], align 4
  63 // X86-NEXT:    store i64 [[OR_I]], ptr [[TMP11]], align 4
  64 // X86-NEXT:    store i32 1, ptr [[RETVAL_I]], align 4
  65 // X86-NEXT:    br label [[_RDRAND64_STEP_EXIT:%.*]]
  66 // X86:       if.else.i:
  67 // X86-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[__P_ADDR_I]], align 4
  68 // X86-NEXT:    store i64 0, ptr [[TMP12]], align 4
  69 // X86-NEXT:    store i32 0, ptr [[RETVAL_I]], align 4
  70 // X86-NEXT:    br label [[_RDRAND64_STEP_EXIT]]
  71 // X86:       _rdrand64_step.exit:
  72 // X86-NEXT:    [[TMP13:%.*]] = load i32, ptr [[RETVAL_I]], align 4
  73 // X86-NEXT:    ret i32 [[TMP13]]
  74 }
  75
  76 int rdseed16(unsigned short *p) {
  77   return _rdseed16_step(p);
  78 // CHECK: @rdseed16
  79 // CHECK: call { i16, i32 } @llvm.x86.rdseed.16
  80 // CHECK: store i16
  81 }
  82
  83 int rdseed32(unsigned *p) {
  84   return _rdseed32_step(p);
  85 // CHECK: @rdseed32
  86 // CHECK: call { i32, i32 } @llvm.x86.rdseed.32
  87 // CHECK: store i32
  88 }
  89
  90 #if __x86_64__
  91 int rdseed64(unsigned long long *p) {
  92   return _rdseed64_step(p);
  93 // X64: @rdseed64
  94 // X64: call { i64, i32 } @llvm.x86.rdseed.64
  95 // X64: store i64
  96 }
  97 #endif