clang/test/CodeGen/arm-vector-align.c

   1 // REQUIRES: arm-registered-target
   2 // RUN: %clang_cc1 -triple thumbv7-apple-darwin \
   3 // RUN:   -target-abi apcs-gnu \
   4 // RUN:   -target-cpu cortex-a8 \
   5 // RUN:   -mfloat-abi soft \
   6 // RUN:   -target-feature +soft-float-abi \
   7 // RUN:   -ffreestanding \
   8 // RUN:   -emit-llvm -w -o - %s | FileCheck %s
   9
  10 #include <arm_neon.h>
  11
  12 // Check that alignment specifier is used in Neon load/store intrinsics.
  13 typedef float AlignedAddr __attribute__ ((aligned (16)));
  14 void t1(AlignedAddr *addr1, AlignedAddr *addr2) {
  15 // CHECK: @t1
  16 // CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32.p0(ptr %{{.*}}, i32 16)
  17   float32x4_t a = vld1q_f32(addr1);
  18 // CHECK: call void @llvm.arm.neon.vst1.p0.v4f32(ptr %{{.*}}, <4 x float> %{{.*}}, i32 16)
  19   vst1q_f32(addr2, a);
  20 }
  21
  22 // Make sure unaligned load/stores do not gain alignment.
  23 void t2(char *addr) {
  24 // CHECK: @t2
  25 // CHECK: load i32, ptr %{{.*}}, align 1
  26   int32x2_t vec = vld1_dup_s32(addr);
  27 // CHECK: store i32 %{{.*}}, ptr {{.*}}, align 1
  28   vst1_lane_s32(addr, vec, 1);
  29 }